Text preview for : SONY VAIO MBX-126 - QUANTA JE5.1.pdf part of SONY MBX-126 Sony Vaio MBX-126
Back to : SONY VAIO MBX-126 - QUANT | Home
1
2
3
4
5
01
Intel Prescott
A
JE5.1 Block Diagram MBX-126
A
478 PIN mPGA
D D R VRAM 16M B X 4
R/G/B
System bus 533MHz
ATI
RADEON 9200
AGP bus
CRT
LVDS SIGNAL
LCD
TV SIGNAL
(M9+X)
NORTH BRIDGE ATI RS200M+
DRAM SIGNAL DDR CLOCK
DDR 266 SO-DIMM 1/2
AVOUT
PCI bus
B
B
TI-PPCI7420B (SN0307009B)
Mini PCI
(Wirless LAN)
Realtek
RTL8100CL
NEC
UPD720101
RTC TIBQ3285LF
South Bridge ALI 1535+
SECONDARY IDE BUS PRIMARY IDE BUS
USB 2.0 Memory Stick PCMCIA Slot0 RJ45 1394 USB*3
AC LINK1
AC LINK2
XBUS
C
ALC203 PCU NS PC87570 LPT
MDC
C
CDROM
HDD EXT.MIC. TPA0312 RJ11
DC JACK
TOUCH PAD
INT.K/B
BIOS
EXT.SPKR.
INT.SPKR.
MAIN POWER BOARD PWS-39
D
T/P SWITCH
POWER SWITCH Bettery LED
Power LED K/B LED
D
T/P BOARD SWX-169
BATTERY
Power SW BOARD SWX-168
QUANTA COMPUTER
S ize D o c u m e n t N u mb e r R ev
Level 1 environment-related substances should NEVER be used. Molding resin, ink, paint and covered wiring material should be procured from the supplier approved as a Sony's green partner. Da te :
1 2 3 4
JE 5.1 M ain B oard
M o n d a y , A u g u st 3 0 , 2 0 0 4 S heet
5
1A
1 of 36
1
2
3
4
5
6
7
8
02
Page List
A
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
Block Diagram Page List Prescott CPU-1 Prescott CPU-2 RS200M-AGTL+ RS200M-DDR I/F RS200M-PCI & AGP I/F RS200M-VIDEO I/F & CLKGEN SYSTEM CONFIGURATION DDR Terminator DDR SODIMMx2 CRT PORT/TV ALI M1535+ (PCI,ISA)-1/2 ALI M1535+ (IDE)-2/2 USB2.0 Controller (NEC-uPD720101) ATI M9+ 1/3 ATI M9+ 2/3 ATI M9+ 3/3 VGA DDR VRAMX2 VGA DDR VRAMX2
A
B
B
1/2 2/2
AGP SSC TI7420-A (CARDBUS+1394+MS) TI7420-B (CARDBUS+1394+MS) Cardbus slot LAN interface RTL8100CL MiniPCI & MDC RTC/POWER GOOD LOGIC IDE/HDD/LPT Connector PCU NS 87570 Int. Keyboard/Bios/FAN VCORE POWER 1 MAX1546(VCORE POWER 2) MAX1632(5V/3V/12V) MAX1844(2.5V/1.8V/1.25V ) MAX1844(VCC1.5) Load Switch
C
C
26 27 28 29 30 31 32 33 34 35 36
D
D
T itle
QUANTA COMPUTER
COVER PAGE
D o c u m e n t N u mb e r
Level 1 environment-related substances should NEVER be used. Molding resin, ink, paint and covered wiring material should be procured from the supplier approved as a Sony's green partner.
1 2 3 4 5 6
S ize B
JE5.1 Main Board
S heet 2
8
R ev 1A of 36
D a t e : T u e s d a y , A u g u st 3 1 , 2 0 0 4
7
1
2
3
4
5
6
7
8
V C C3 C1 5 H A [3 ..3 1] H A [3 .. 31] H A3 H A4 H A5 H A6 H A7 H A8 H A9 HA 10 HA 11 HA 12 HA 13 HA 14 HA 15 HA 16 HA 17 HA 18 HA 19 HA 20 HA 21 HA 22 HA 23 HA 24 HA 25 HA 26 HA 27 HA 28 HA 29 HA 30 HA 31 T57 T58 T60 T62 5 H D[0 ..6 3 ] HD[0 ..6 3 ] H D0 H D1 H D2 H D3 H D4 H D5 H D6 H D7 H D8 H D9 HD 10 HD 11 HD 12 HD 13 HD 14 HD 15 HD 16 HD 17 HD 18 HD 19 HD 20 HD 21 HD 22 HD 23 HD 24 HD 25 HD 26 HD 27 HD 28 HD 29 HD 30 HD 31 HD 32 HD 33 HD 34 HD 35 HD 36 HD 37 HD 38 HD 39 HD 40 HD 41 HD 42 HD 43 HD 44 HD 45 HD 46 HD 47 HD 48 HD 49 HD 50 HD 51 HD 52 HD 53 HD 54 HD 55 HD 56 HD 57 HD 58 HD 59 HD 60 HD 61 HD 62 HD 63 -HDB I0 -HDB I1 -HDB I2 -HDB I3 5 -H D B I[0 ..3] -H D B I[0 .. 3] U 1A Z I F _ S OCK E T 4 7 9
1 A20M FERR INIT LINT0 LINT1 IGNNE SMI SLP STPCLK ADS ADSTB0 ADSTB1 BNR DBSY DEFER DRDY HIT HITM TRDY BPRI BR0 LOCK REQ0 REQ1 REQ2 REQ3 REQ4 RS0 RS1 RS2 DSTBP0 DSTBN0 DSTBP1 DSTBN1 DSTBP2 DSTBN2 DSTBP3 DSTBN3 C6 B6 W5 D1 E5 B2 B5 AB26 Y4 G1 L5 R5 G2 H5 E2 H2 F3 E3 J6 D2 H6 G4 J1 K5 J4 J3 H3 F1 G5 F4 F21 E22 J23 K22 P23 R22 W23 W22
-H A20M - H FE RR - HC P UI NIT IN TR N MI - IG NNE - S MI - SLP - S T P CL K -HA DS - HA _ S T B 0 - HA _ S T B 1 - H B NR - HDB S Y - HDE FE R -HDRDY - HHIT -HHI TM - H TRDY -HB P RI - H B R E Q0 -HL OCK -HRE Q0 -HRE Q1 -HRE Q2 -HRE Q3 -HRE Q4 -HRS 0 -HRS 1 -HRS 2 0 .1 U D1 -H A20M I N T R 13 N M I 13 - I G N N E 13 - S MI 14 -S L P 14 - S T P CL K 14 -HA DS 5 - HA _ S T B 0 5 - HA _ S T B 1 5 - H B NR 5 - HDB S Y 5 - HDE FE R 5 -HDRDY 5 -HHIT 5 -HHITM 5 - H TRDY 5 -HB P RI 5 - H B R E Q0 5 -HL OCK 5 -HRE Q0 -HRE Q1 -HRE Q2 -HRE Q3 -HRE Q4 -HRS 0 5 -HRS 1 5 -HRS 2 5 5 5 5 5 5
2 5
U2 *T C 7 S H 0 8FU -A 2 0 M K GA 2 0 -A 2 0 M 13 K GA 2 0 29
V CORE
03
V C ORE R P1 HT E S T 1 HT E S T 9
- IE RR V CC3 4 . 7 U / 1 0 V /Y 5 V C6 V C C3 - TRIP - H B R E Q0 R15 0 .1 U C7 1K CLOSE TO CPU -CP UR ST I T P _ CL K +
R6 R7 R8 R9 R 10
1 1 1 1 1
2 1K 2 5 6 _1% 2 5 1 .1_1% 2 5 6 0_1% 2 1K
HT E S T 8 HT E S T 3 HT E S T 2 -H A20M NMI - IG NNE IN TR
56X4 R P2
2
1 1
2 2 2
1 3 5 7
2 0 0 x4 R P3
2 4 6 8
1
A
K2 K4 L6 K1 L3 M6 L2 M3 M4 N1 M1 N2 N4 N5 T1 R2 P3 P4 R3 T2 U1 P6 U3 T4 V2 R6 W1 T5 U4 V3 W2 Y1 AB1 B21 B22 A23 A25 C21 D22 B24 C23 C24 B25 G22 H21 C26 D23 J21 D25 H22 E24 G23 F23 F24 E25 F26 D26 L21 G26 H24 M21 L22 J24 K23 H25 M23 N22 P21 M24 N23 M26 N26 N25 R21 P24 R25 R24 T26 T25 T22 T23 U26 U24 U23 V25 U21 V22 V24 W26 Y26 W25 Y23 Y24 Y21 AA25 AA22 AA24 E21 G25 P26 V21
A#3 A#4 A#5 A#6 A#7 A#8 A#9 A#10 A#11 A#12 A#13 A#14 A#15 A#16 A#17 A#18 A#19 A#20 A#21 A#22 A#23 A#24 A#25 A#26 A#27 A#28 A#29 A#30 A#31 A#32 A#33 A#34 A#35 D#0 D#1 D#2 D#3 D#4 D#5 D#6 D#7 D#8 D#9 D#10 D#11 D#12 D#13 D#14 D#15 D#16 D#17 D#18 D#19 D#20 D#21 D#22 D#23 D#24 D#25 D#26 D#27 D#28 D#29 D#30 D#31 D#32 D#33 D#34 D#35 D#36 D#37 D#38 D#39 D#40 D#41 D#42 D#43 D#44 D#45 D#46 D#47 D#48 D#49 D#50 D#51 D#52 D#53 D#54 D#55 D#56 D#57 D#58 D#59 D#60 D#61 D#62 D#63 DBI0 DBI1 DBI2 DBI3
1 1 4 2
2
*RB 5 00 R4
- S MI - S T P CL K - SLP P W R GD_CP U
R1 R2 R3 R5
1 1 1 1
2 2 00 2 2 00 2 2 00 2 2 00 1 3 5 HT E S T 1 0 7 2 4 6 8
2
0
3
2
1
C2 0 .1 U
A
C3 0 .1 U
5
1
U3
D2 - HCP UINIT 2 R B 500
1 1 4 2 3
-CP UINIT - RC
- C P U I N I T 13 -RC 29
I T P _ CL K T DI DB R ESET 29 - P R O C H O T -P ROCHOT - H FE RR T DO TMS
R 12 R 13 R 14 R 16 R 17
1 1 1 1 1
2 1K 2 1 50 2 1 50 2 5 6 0_1% 2 5 6 _1%
HT E S T 4 HT E S T 5 HT E S T 0
1 3 5 7
56X4 R P4
2 4 6 8
2 2 2 1K 2 1K 2 1K 1 1
1 2 4 6 8
C4 0 .1 U
T C 7 S H 0 8FU
R18
*0
2
1
1 3 5 7
56X4
C5 0 .1 U
R430 1 R431 1 R432 1 R433 1
2 7 5 _1% 2 39 2 27 2 6 80
- HCP UINIT I T P CL K 1 I T P CL K 0 R 4 99 1 R 5 00 1 R 5 01 1
B
B
-H D _STBP0 - H D _ S T B N0 -H D _STBP1 - H D _ S T B N1 -H D _STBP2 - H D _ S T B N2 -H D _STBP3 - H D _ S T B N3
-H D _STBP0 - H D _ S T B N0 -H D _STBP1 - H D _ S T B N1 -H D _STBP2 - H D _ S T B N2 -H D _STBP3 - H D _ S T B N3
5 5 5 5 5 5 5 5
V CORE
TCK -T RS T
BCLK0 BCLK1 ITP_CLK1 ITP_CLK0 IERR MCERR DBRESET RESET PWRGOOD SKTOCC COMP0 COMP1 DEP0 DEP1 DEP2 DEP3 THERMDA THERMDC THERMTRIP PROCHOT TESTHI0 TESTHI1 TESTHI2 TESTHI3 TESTHI4 TESTHI5 TESTHI6 TESTHI7 TESTHI8 TESTHI9 TESTHI10 TESTHI11 TESTHI12 BSEL0 BSEL1 TCK TDI TDO TMS TRST VID0 VID1 VID2 VID3 VID4 VID5
AF22 AF23 AD26 AC26 AC3 V6 AE25 AB25 AB23 AF26 L24 P1 J26 K25 K26 L25 B3 C4 A2 C3 AD24 AA2 AC21 AC20 AC24 AC23 AA20 AB22 U6 W4 Y3 A6 AD25 AD6 AD5 D4 C1 D5 F7 E6 AE5 AE4 AE3 AE2 AE1 AD3
CP UCLK + CP UCLK I T P _ CL K I T P _ CL K + - IE RR T96 DB R ESET
CP UCLK + 8 CP UCLK - 8
CP UCLK + CP UCLK -
R 19 R 20
3 3_1% 3 3_1% V CORE
Close to CPU
C8 *1 8P
1
2
C9 C 12
1 1 1 1 1 1 1 1 1 1 1
+
2 2 2 2 2 2 2 2 2 2
0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U
C 10 C 13 C 16 C 19 C 22 C 25 C 28 C 31 C 34 C 37 C 39
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V
C 11 C 14 C 17 C 20 C 23 C 26 C 29 C 32 C 35 C 38 C 40 C 43 C 45 C 47 C 49 C 51 C 53 C 55 C 57 C 59
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V 2 1 0 U / 6 .3 V
C
-CP UR ST PW RGD _C PU T108
-CP URST 5 P W R G D _ C P U 27
C 15 C 18 C 21
CP U_ COM P0 CP U_ COM P1 T117 T119 T121 T123 T H E R M DA T HE RMDC - T R IP -P ROCHOT HT E S T 0 HT E S T 1 HT E S T 2 HT E S T 3 HT E S T 4 HT E S T 5 I T P CL K 0 I T P CL K 1 HT E S T 8 HT E S T 9 HT E S T 1 0 - G HI -D PSLP
CP U_ COM P0 R2 1 CP U_ COM P1 R2 2
1 1
2 4 3_1% 2 4 3_1%
C 24 C 27 C 30 C 33
C
Close to CPU
T H E R M DA 4 T HE RMDC 4 - T RIP 33 32 V C O R E _ S E NS E
C 36
P R 1 164
0
C 41
2 4 7 0 u F / 9 mOh m
C 42 C 44 C 46 C 48 C 50 C 52
T158 BS0 BS1
- G H I 14
- G HI
T156 Q1 MMB T 3 9 0 4
R 23
2 2 1
1 1K
1K
V CORE V CC3
C 54 C 56
9 9
2
R 24
C 58
D
TCK T DI T DO TMS -T RS T P _ V ID0 P _ V ID1 P _ V ID2 P _ V ID3 P _ V ID4 P _ V ID5 P _ V ID0 P _ V ID1 P _ V ID2 P _ V ID3 P _ V ID4 P _ V ID5 32 32 32 32 32 32 P _ V ID0 P _ V ID1 P _ V ID2 P _ V ID3 P _ V ID4 P _ V ID5 T174 T176 T178 T180 T181 T373
- H FE RR
1
3
- F E R R 13
D
R25 R26 V CORE 1K
47K
2 2
1
Q2 MMB T 3 9 04
2
1
V CC3 T itle
QUANTA COMPUTER
CPU Socket -1/2- Signal
D o c u m e n t N u mb e r
-D PSLP
3
1
- C P U S T OP 8 , 1 4 ,3 2
Level 1 environment-related substances should NEVER be used. Molding resin, ink, paint and covered wiring material should be procured from the supplier approved as a Sony's green partner.
1 2 3 4 5 6
S ize B
JE5.1 Main Board
S heet 3
8
R ev 3A of 36
D a t e : T u e s d a y , A u g u st 3 1 , 2 0 0 4
7
1
2
3
4
5
6
7
8
V C ORE
1
1
B P M0 C 1 124 0 . 1 U_ 0 4 0 2 B P M0 B P M1 B P M4 B P M5 B P M1 B P M4 B P M5
R27 R28 R29 R30
1 1 1 1
2 5 1 .1 _ 1 % 2 5 1 .1 _ 1 %
V CC2 .5
04
* 4 .7 K V R O N 29 V C O R E _ O N 32
A
2
AB2 T 1 8 4 AC1 T 1 8 5 V5 T 1 8 6
T187
2
R 4 70 C 6 0 0 .0 1U U4
V CORE
2
C 1 123 0 . 1 U_ 0 4 0 2
2 5 1 .1 _ 1 % 2 5 1 .1 _ 1 %
AF9 AF7 AF5 AF21 AF2 AF19 AF17 AF15 AF13 AF11 AE8 AE6 AE20 AE18 AE16 AE14 A10 A12 A14 A16 A18 A20 A8 AA10 AA12 AA14 AA16 AA18 AA8 AB11 AB13 AB15 AB17 AB19 AB7 AB9 AC10 AC12 AC14 AC16 AC18 AC8 AD11 AD13 AD15 AD17 AD19 AE12 AE10 AD9 AD7
A5 A4
RSP AP0 AP1
2
2
B
2
C P U_ V CCIO
1
C
IMPSEL
R 8 15 0
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
1
D10 D8 D6 D3 J2 J22 J25 J5 K21 K24 K3 K6 L1 L23 L26 L4 M2 M22 M25 M5 N21 N24 N3 N6 P2 P22 P25 P5 R1 R23 R26 E1 D12 D14 D16 D18 D20 D24 D21 AE22 AE24 AE26 AE7 AE9 AF1 AF10 AF12 AF14
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
Thermal Sensor
V CC3 V CC3 R 36 2 00K 33 - S H D N R 37 1 0K 14 T _ A L E RT R448 *1 0K C 6 12 1
2 2 . 2 U / 1 6 V /Y 5 V
R 4 51 2 00 U5
V C C3 C 75
ZIF_SOCKET479
3
3
1 6 4 5
Q3 C H 2 5 07S
VCC ALERT
SMBCLK SMDATA D+ DL M8 6
8 7 2 2 3 1
2 1
C 74 0 .1 U
2
Q4 C H 2 5 07S
T_CRIT_A GND
1
2
1
V CC3
V C C3
R818
1 00K
R 39 1 0K
2
2 1 ,2 9 ,3 0 M B DA T A
3
Q6
1
C H 2 5 07S
K B S MDA T A
2
2 1 , 2 9 ,3 0 M B C L K
3
Q7
V CC5
AF16 AF18 AF20 AF6 AF8 B10 B12 B14 B16 B18 B20 B23 B26 B4 B8 C11 C13 C15 C17 C19 C2 E11 E13 E15 E17 E19 E23 E26 E4 E7 E9 F10 F12 F14 F16 F18 F2 F22 F25 F5 F8 G21 G24 G3 G6 C22 C9 Y5 Y25 Y22 Y2 W6 W3 W24 W21 V4 V26 V23 V1 U5 U25 U22 U2 T6 T3 T24 T21 R4
D
2
C 1 127 0 .1 U
R 8 68 2 7K
R 8 69 5 .1K
C P U _ S E L 32
D
2 2K R870
3
2 1
MMB T 3 9 04 Q51
3
2
C H 2 5 0 7S Q50 T itle
QUANTA COMPUTER
CPU Socket -2/2- Power & Ground
D o c u m e n t N u mb e r
1
Level 1 environment-related substances should NEVER be used. Molding resin, ink, paint and covered wiring material should be procured from the supplier approved as a Sony's green partner.
1 2 3 4 5 6
S ize B
JE5.1 Main Board
S heet 4
8
D a t e : T u e s d a y , A u g u st 3 1 , 2 0 0 4
7
+
VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE
VCC_SENSE VSS_SENSE
VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE
BPM0 BPM1 BPM2 BPM3 BPM4 BPM5 BINIT
A
B11 B13 B15 B17 B19 B7 B9 C10 C12 C14 C16 C18 C20 C8 D11 D13 D15 D17 D19 D7 D9 E10 E12 E14 E16 E18 E20 E8 F11 F13 F15 F17 F19 F9
R 8 55
1 2
0
2
V CORE _ON
1
C 61
2
0 .0 1 U
1 2 3
CNOISE
SD
8 7 6 5
C63 4 . 7 U / 1 0 V /Y 5 V
VIDPWRGD VCCVID VCCVIDLB GTLREF GTLREF GTLREF GTLREF VCCA VSSA VCCIOPLL GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
AD2 AF4 AF3 AA21 AA6 F20 F6 AD20 AD22 AE23 C7 C5 H1 H4 H23 H26 A11 A13 A15 A17 A19 A21 A24 A26 A3 A9 AA1 AA11 AA13 AA15 AA17 AA19 AA23 AA26 AA4 AA7 AA9 AB10 AB12 AB14 AB16 AB18 AB20 AB21 AB24 AB3 AB6 AB8 AC11 AC13 AC15 AC17 AC19 AC2 AC22 AC25 AC5 AC7 AC9 AD1 AD10 AD12 AD14 AD16 AD18 AD21 AD23 AD4 AD8 AE11 AE13 AE15 AE17 AE19 C25
R 8 16 R V IDLB 8 1 7
1 1
1K 0
1
V CC1 .2
2
DELAY ERROR GND VIN FB VOUT
2
1
1
1
C P U _ G T L RE F 1 C P U _ G T L RE F 2 C P U _ G T L RE F 3 C P U _ G T L RE F 4 C P U_V CCA
V CC2 .5
4 2
1
U 1B
VIDPWRGD ,VCCVIDLB , For prescott
AC6 AB5 AC4 Y6 AA5 AB4 AA3
V CC1 .2
2
2
CP U_ VSSA C P U_ V CCIO
2
C 64 0 .1 U
C 65 0 .1 U
C 66 0 .1 U
V CORE L1
1
S I 9 1 8 2 2 DH-1 2 -T C 62 2 . 2 U / 1 6 V /Y 5 V
V CORE C P U_V CCA
1
V CC1 .2 GTLREF=2/3VCORE
R 32 4 7_1%
1
4 . 7 U H / 1 4 0 mA + C67 1 0 0 U /6 .3 V
2
C P U _ G T L RE F 4
1
1
1
C 68 1 U /6 .3V
C69 * 1 0 U / 6 .3 V
C 70 2 20P
1
2
2
1 U /6 .3V
R 33 8 6 .6 _ 1 %
2
C 71
1
CP U_ VSSA
2
B
5 6 U / 6 .3 V C72 L2 4 . 7 U H / 1 4 0 mA
1
2 0 .1 U
K B S MCL K K B S MDA T A T H E R M DA C 73 2 200P T HE RMDC T HE RMDC 3
C
T H E R M DA 3
V CC3
V C C3
R 40 1 0K
1
C H 2 5 07S
K B S MCL K
R ev 3A of 36
1
2
3
4
5
6
7
8
-H D B I[0 .. 3]
-H D B I[0 ..3] 3
U7A 3 H A [3 ..31] H A [ 3 . .31] HA3 HA4 HA5 HA6 HA7 HA8 HA9 H A 10 H A 11 H A 12 H A 13 H A 14 H A 15 H A 16 -HRE Q0 -HRE Q1 -HRE Q2 -HRE Q3 -HRE Q4 H D [0..63]
05
A
A
3 -HRE Q0 3 -HRE Q1 3 -HRE Q2 3 -HRE Q3 3 -HRE Q4 3 - HA _ S T B 0
M24 P22 M23 N26 N25 M22 P25 P24 P21 R26 P26 R25 N22 N21 M25 N23 R21 M26 L26 P23 T24 T26 R24 R22 R23 T25 U26 T21 U25 U22 U24 T22 V25 U21 V21 U23 K24 K25 L21 L23 L25 J23 J22 L24
A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# REQ0# REQ1# REQ2# REQ3# REQ4# ADSTB0# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# ADSTB1# ADS# BNR# BPRI# DEFER# DRDY# DBSY# BR0# LOCK# CPURST# RS2# RS1# RS0# TRDY# HIT# HITM#
PART 1 OF 5
D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# DBI0# DSTBN0# DSTBP0# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DBI1# DSTBN1# DSTBP1# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# DBI2# DSTBN2# DSTBP2# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# DBI3# DSTBN3# DSTBP3#
J24 H23 H26 H25 J25 J26 G25 H24 F25 G26 G21 F23 F24 H22 F22 F26 H21 G22 G23 F21 E25 B25 E23 D24 E26 D26 E24 D22 B26 B24 C23 A24 A25 D23 A26 C26 C25 C24 E21 E20 F18 F20 D20 D21 A23 F19 E18 A22 C22 C21 B21 A21 D18 F17 B22 E19 D19 C19 A20 B20 B19 E17 F15 A19 B18 B17 C18 A18 C17 E15 C16 F14 B16 F16 D16 E16
H D0 H D1 H D2 H D3 H D4 H D5 H D6 H D7 H D8 H D9 HD 10 HD 11 HD 12 HD 13 HD 14 HD 15 - HDB I0 3 - H D _ S T B N0 3 -H D _STBP0 3 HD HD HD HD HD HD HD HD HD HD HD HD HD HD HD HD 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 - HDB I1 3 - H D _ S T B N1 3 -H D _STBP1 3 HD HD HD HD HD HD HD HD HD HD HD HD HD HD HD HD 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 - HDB I2 3 - H D _ S T B N2 3 -H D _STBP2 3 HD HD HD HD HD HD HD HD HD HD HD HD HD HD HD HD 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 - HDB I3 3 - H D _ S T B N3 3 -H D _STBP3 3
HD[0 ..6 3 ] 3
V C C3
HA 31 1K
3
R 8 53
Q48
2
B
C H 2 5 07S
R 8 54 -CP UR ST 4 .7 K
AGTL+ I/F
3
HA 17 HA 18 HA 19 HA 20 HA 21 HA 22 HA 23 HA 24 HA 25 HA 26 HA 27 HA 28 HA 29 HA 30 HA 31 3 - HA _ S T B 1
A D DR. GROUP 0
A D DR. GROUP 1
2
D A T A G R O UP 1
1
D A T A G R O UP 0
B
1
2 1
Q 49 MMB T 3 9 0 4
R43 3 - H B R E Q0
*0
2
1
3 -HA DS 3 - H B NR 3 -HB P RI 3 - HDE FE R 3 -HDRDY 3 - HDB S Y 3 -HL OCK 3 -CP URST 3 - HRS 2 3 - HRS 1 3 - HRS 0 3 - H TRDY 3 - HHIT 3 -HHITM -CP UR ST -HRS 2 -HRS 1 -HRS 0
J21 K26 L22 AA8 AB6 D6 V23 V22
1 4 , 1 6 ,2 9 - S US A
R44
1K 13 - N B _ P C IRS T 27 N B _ P W R G D
SUSSTAT# SYSRST# POWERGOOD COMPVDD COMPVSS COMPCLKVDD COMPCLKVSS P4_VREF VCPU VCPU VCPU VCPU VCPU VCPU VCPU VCPU VCPU VCPU
M IS C.
V CORE
R 45 1K
V CORE
R46 R47 R48 R49
2 4_1% NB _COMP V DD 4 9 .9 _ 1 % N B _ C O MP V S S 7 5_1% 1 0_1%
C
V CC3 R41 4 9 .9 _ 1 % 1 U / 1 0 V /Y 5 V N B _ G T L RE F R42 1 00_1%
N B _ C O M P C L K V DD C15 N B _ C O M P CL K V S S D15 N B _ G T L RE F
PENTIUM IV
E14 K22 K21 M21
D A T A G R O UP 2
Disable HT
C ONTROL
C
V24 A16 G16 G18 G19 H20 J20 M20 N20 W26 P20
V C ORE
C78
C79 220P
C80 220P
RS200MP
V CORE
1
D
+
C 81 4 7 U / 6 .3 V
C 82 0 .1 U
C 83 0 .1 U
C 84 0 .1 U
C 85 0 .1 U
C 86 * 0 .1 U
C 87 0 .1 U
C 88 0 .1 U
C 89 0 .1 U
C 90 0 .1 U
C 91 0 .1 U
D A T A G R O UP 3
D
2
T itle
QUANTA COMPUTER
RS200M 1/4
D o c u m e n t N u mb e r
Level 1 environment-related substances should NEVER be used. Molding resin, ink, paint and covered wiring material should be procured from the supplier approved as a Sony's green partner.
1 2 3 4 5 6
S ize B
JE5.1 Main Board
S heet 5
8
R ev 2A of 36
D a t e : T u e s d a y , A u g u st 3 1 , 2 0 0 4
7
1
2
3
4
5
6
7
8
ATI_RS200M+ - 2 ( DDR Interface )
U 7C 1 0 ,1 1 M A [ 0 ..1 4 ]
A
M D [0 .. 63] M D Q M [ 0 . .7 ] M D Q S [ 0 . .7 ]
M D [ 0 . . 6 3 ] 1 0 ,1 1 M D Q M [ 0 . .7 ] 1 0 ,1 1 M D Q S [ 0 . .7 ] 1 0 ,1 1
06
A
M A [ 0 ..1 4 ] M A0 M A1 M A2 M A3 M A4 M A5 M A6 M A7 M A8 M A9 M A10 M A11 M A12 M A13 M A14 RMDQM0 RMDQM1 RMDQM2 RMDQM3 RMDQM4 RMDQM5 RMDQM6 RMDQM7 1 0 ,1 1 - M S RA S 1 0 ,1 1 - M S CA S 1 0 ,1 1 - M W E 1 0 ,1 1 M C K E RMDQS 0 RMDQS 1 RMDQS 2 RMDQS 3 RMDQS 4 RMDQS 5 RMDQS 6 RMDQS 7 R M C L K0R M C L K0+
AB20 AA19 AB19 AC20 AE21 AD20 AE20 AD19 AC19 AA18 AA20 AC18 AB18 AC21 AD22 AD9 AA9 AB12 AD13 AB15 AE19 AE26 AB25 AF20 AD23 AB21 AE11 AF7 AC8 AC12 AE13 AC15 AE17 AD25 Y24 AD8 AE8
B
DDR I/F
11 M C L K 0 11 M C L K 0 +
R 66 R 67
*0 *0
11 M C L K 1 11 M C L K 1 +
R 68 R 69
*0 *0
11 M C L K 2 11 M C L K 2 +
R 70 R 71
*0 *0
R M C L K 1 - AF22 R M C L K 1 + AE22 R M C L K 2 - AA22 R M C L K 2 + AB22
11 M C L K 3 11 M C L K 3 +
R 72 R 73
*0 *0
R M C L K 3 - AB17 R M C L K 3 + AC17 R M C L K 4 - AF23 R M C L K 4 + AE23
11 M C L K 4 11 M C L K 4 +
R 74 R 75
*0 *0
R M C L K5Y23 R M C L K 5 + AA23 1 0 ,1 1 1 0 ,1 1 1 0 ,1 1 1 0 ,1 1 - M CS 0 - M CS 1 - M CS 2 - M CS 3
C
11 M C L K 5 11 M C L K 5 +
R 76 R 77
*0 *0
AC22 AA21 AF21 AF24 W23 AA24 AF25 AA26 AD7 AD21 AF9 AF18 Y7 Y8 Y9
DDR_A0 PART 3 OF 5 DDR_DQ0 DDR_A1 DDR_DQ1 DDR_A2 DDR_DQ2 DDR_A3 DDR_DQ3 DDR_A4 DDR_DQ4 DDR_A5 DDR_DQ5 DDR_A6 DDR_DQ6 DDR_A7 DDR_DQ7 DDR_A8 DDR_DQ8 DDR_A9 DDR_DQ9 DDR_A10 DDR_DQ10 DDR_A11 DDR_DQ11 DDR_A12 DDR_DQ12 DDR_A13 DDR_DQ13 DDR_A14 DDR_DQ14 DDR_DQ15 DDR_DM0 DDR_DQ16 DDR_DM1 DDR_DQ17 DDR_DM2 DDR_DQ18 DDR_DM3 DDR_DQ19 DDR_DM4 DDR_DQ20 DDR_DM5 DDR_DQ21 DDR_DM6 DDR_DQ22 DDR_DM7 DDR_DQ23 DDR_DQ24 DDR_RAS# DDR_DQ25 DDR_CAS# DDR_DQ26 DDR_DQ27 DDR_WE# DDR_DQ28 DDR_CKE DDR_DQ29 DDR_DQ30 DDR_DQS0 DDR_DQ31 DDR_DQS1 DDR_DQ32 DDR_DQS2 DDR_DQ33 DDR_DQS3 DDR_DQ34 DDR_DQS4 DDR_DQ35 DDR_DQS5 DDR_DQ36 DDR_DQS6 DDR_DQ37 DDR_DQS7 DDR_DQ38 DDR_DQ39 DDR_CK0# DDR_DQ40 DDR_CK0 DDR_DQ41 DDR_DQ42 DDR_CK1# DDR_DQ43 DDR_CK1 DDR_DQ44 DDR_DQ45 DDR_CK2# DDR_DQ46 DDR_CK2 DDR_DQ47 DDR_DQ48 DDR_CK3# DDR_DQ49 DDR_CK3 DDR_DQ50 DDR_DQ51 DDR_CK4# DDR_DQ52 DDR_CK4 DDR_DQ53 DDR_DQ54 DDR_CK5# DDR_DQ55 DDR_CK5 DDR_DQ56 DDR_DQ57 DDR_CS0# DDR_DQ58 DDR_CS1# DDR_DQ59 DDR_CS2# DDR_DQ60 DDR_CS3# DDR_DQ61 DDR_DQ62 TESTMODE DDR_DQ63 VDRM VDRM VDRM VDRM VDRM VDRM VDRM VDRM VDRM VDRM VDRM VDRM VDRM VDRM VDRM VDRM VDRM DDR_VREF
AD6 AE7 AD10 AF10 AE6 AF6 AE9 AE10 AB7 AB8 AB10 AC10 AC7 AB9 AA10 AC9 AB11 AC11 AA13 AC13 AA11 AA12 AB13 AD14 AF11 AE12 AD12 AF12 AF13 AF14 AD15 AE14 AA14 AC14 AA16 AA17 AB14 AA15 AB16 AC16 AF15 AF16 AF17 AD17 AE15 AE16 AE18 AD18 AE24 AE25 Y22 AD26 AD24 Y21 AC24 AC25 AB23 AB26 Y25 W25 AC26 AB24 AA25 W24 Y12 Y13 Y14 Y17 Y18 V20 W20 AC6
R MD0 R MD1 R MD2 R MD3 R MD4 R MD5 R MD6 R MD7 R MD8 R MD9 RMD10 RMD11 RMD12 RMD13 RMD14 RMD15 RMD16 RMD17 RMD18 RMD19 RMD20 RMD21 RMD22 RMD23 RMD24 RMD25 RMD26 RMD27 RMD28 RMD29 RMD30 RMD31 RMD32 RMD33 RMD34 RMD35 RMD36 RMD37 RMD38 RMD39 RMD40 RMD41 RMD42 RMD43 RMD44 RMD45 RMD46 RMD47 RMD48 RMD49 RMD50 RMD51 RMD52 RMD53 RMD54 RMD55 RMD56 RMD57 RMD58 RMD59 RMD60 RMD61 RMD62 RMD63
R P 15 RMDQM0 R 50 RMDQM1 R 51 RMDQM2 R 52 RMDQM3 R 53 RMDQM4 R 54 RMDQM5 R 55 RMDQM6 R 56 RMDQM7 R 57 22 22 22 22 22 22 22 22 M D Q M0 M D Q M1 M D Q M2 22X4 M D Q M3 M D Q M4 M D Q M5 M D Q M6 22X4 M D Q M7 RMD16 RMD17 RMD18 RMD19 R P 20 R MD8 R MD9 RMD10 RMD11 R P 17 R R R R MD0 MD1 MD2 MD3
R P 13
1 3 5 7
2 4 6 8
M M M M
D0 D1 D2 D3
R R R R
MD4 MD5 MD6 MD7
1 3 5 7
22X4 R P 11
2 4 6 8
M M M M
D4 D5 D6 D7
1 3 5 7
2 4 6 8
M D8 M D9 MD10 MD11
RMD12 RMD13 RMD14 RMD15
1 3 5 7
22X4 R P 19
2 4 6 8
MD12 MD13 MD14 MD15
RMDQS 0 R 58 RMDQS 1 R 59 RMDQS 2 R 60 RMDQS 3 R 61 RMDQS 4 R 62 RMDQS 5 R 63 RMDQS 6 R 64 RMDQS 7 R 65
22 22 22 22 22 22 22 22
MDQ S0 MDQ S1 MDQ S2 MDQ S3 MDQ S4 MDQ S5 MDQ S6 MDQ S7
1 3 5 7
22X4 R P 18
2 4 6 8
MD16 MD17 MD18 MD19
RMD20 RMD21 RMD22 RMD23
1 3 5 7
22X4 R P 21
2 4 6 8
MD20 MD21 MD22 MD23
RMD24 RMD25 RMD26 RMD27
1 3 5 7
22X4 RP 9
2 4 6 8
MD24 MD25 MD26 MD27
RMD28 RMD29 RMD30 RMD31
1 3 5 7
22X4 R P 16
2 4 6 8
MD28 MD29 MD30 MD31
B
RMD32 RMD33 RMD34 RMD35
1 3 5 7
22X4 RP 7
2 4 6 8
MD32 MD33 MD34 MD35
RMD36 RMD37 RMD38 RMD39
1 3 5 7
22X4 R P 14
2 4 6 8
MD36 MD37 MD38 MD39
RMD40 RMD41 RMD42 RMD43
1 3 5 7
22X4 R P 12
2 4 6 8
MD40 MD41 MD42 MD43
RMD44 RMD45 RMD46 RMD47
1 3 5 7
22X4 RP 8
2 4 6 8
MD44 MD45 MD46 MD47
RMD48 RMD49 RMD50 RMD51
1 3 5 7
22X4 R P 10
2 4 6 8
MD48 MD49 MD50 MD51
RMD52 RMD53 RMD54 RMD55
1 3 5 7
22X4
2 4 6 8
MD52 MD53 MD54 MD55
C
RP 6
RMD56 RMD57 RMD58 RMD59 2 . 5 V S US C92 0 .1 U
1 3 5 7
22X4
2 4 6 8
MD56 MD57 MD58 MD59
RMD60 RMD61 RMD62 RMD63
1 3 5 7
22X4
2 4 6 8
MD60 MD61 MD62 MD63
M V R E F _ DIM 11 C 93 1 U / 1 0 V /Y 5 V C94 0 .1 U
2 . 5 V S US
RS200MP
D
D
2 . 5 V S US
C 95 4 7 U / 6 .3 V
C 96 0 .1 U
C 97 0 .1 U
C 98 0 .1 U
C 99 0 .1 U
C100 0 .1 U
C101 0 .1 U
C102 0 .1 U
C103 0 .1 U
C104 0 .1 U
C105 0 .1 U
C106 0 .1 U
C107 0 .1 U
C108 0 .1 U
T itle
QUANTA COMPUTER
RS200M 2/4
D o c u m e n t N u mb e r
Level 1 environment-related substances should NEVER be used. Molding resin, ink, paint and covered wiring material should be procured from the supplier approved as a Sony's green partner.
1 2 3 4 5 6
S ize B
JE5.1 Main Board
S heet 6
8
R ev 1A of 36
D a t e : T u e s d a y , A u g u st 3 1 , 2 0 0 4
7
1
2
3
4
5
6
7
8
9,13,15,22,25,26 A D[0..31] 9,13,15,22,25,26 -CBE[0..3]
A D [0..31] VCCAGP - C B E [0..3] GAD[0..31] 16
For external graphics
ST0 ST1 ST2 R653 R654 R655 R657 R658 R659 R660 R661 R662 R663 R664 R665 R667 R668 R647 R648 RP110 2 8.2KX4 4 RP111 8.2KX4 8.2K 8.2K 8.2K 8.2K 8.2K 8.2K 8.2K 8.2K 8.2K 8.2K 8.2K 8.2K 8.2K 8.2K 8.2K 8.2K (1.6A) VCC1.8 U7E - GIRD Y - GTR DY -GDEVSEL -GSTOP GPAR - GRBF - GWBF - GREQ - GGNT AD_STB0 AD_STB1 -GPIPE - GSERR SBA2 SBA5 SBA0 SBA7 SBA6 SBA3 SBA4 SBA1 -AD_STB0 -AD_STB1 -GCBE[0..3] 16 VCCAGP -GFRAME SB_STB -SB_STB R656 R666 R671 8.2K 8.2K 8.2K
PART 5 OF 5
07
K10 K11 K12 K15 K16 K17 L10 L11 L12 L15 L16 L17 M10 M11 M12 M15 M16 M17 R10 R11 R12 R15 R16 R17 T10 T11 T12 T15 T16 T17 U10 U11 U12 U15 U16 U17 G10 G11 K1 H3 P7 L7 K7 H7 VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_3.3V VDD_3.3V VDD_AGP VDD_AGP VDD_AGP VDD_AGP VDD_AGP VDD_AGP GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND A1 A17 E4 AC23 N4 J1 Y26 AD4 AF8 AF19 N24 V26 D17 K23 AF1 C20 G24 AF26 E22 B2 B23 D25 G8 G9 G12 G13 G15 G20 J7 G7 K13 K14 K20 L13 L14 L20 D11 M7 M13 M14 G17 N7 N10 N11 N12 N13 N14 N15 N16 N17 P10 P11 P12 P13 P14 P15 P16 P17 R7 R13 R14 R20 T7 T13 T14
VCC3 R78 R79 RP22
A
U7B
1 1 1 3 5 7 1 3 5 7 1 3 5 7 1 1 1 1 1 3 5 7 1 3 5 7
2 8.2K 2 8.2K 2 8.2Kx4 4 6 8 2 8.2Kx4 4 6 8 2 8.2Kx4 4 6 8 2 2 2 2
8.2K 8.2K 8.2K 8.2K
S E RIRQ 13,22,26 - PERR 15,22,25,26 - SERR -STOP - I RD Y -REQ0 13,15,22,25,26 13,15,22,25,26 13,15,22,25,26 22
RP23
-DEVSEL 13,15,22,25,26 -FRAME 13,15,22,25,26 PAR 13,15,22,25,26 - TRD Y 13,15,22,25,26 - INTF - INTC - INTD - INTE -GNT3 -REQ3 -REQ2 -GNT2 13,15 13,15,22 13,22,26 13,15 26 26 25 25
RP24
RP26
2 8.2Kx4 4 6 8 2 8.2Kx4 4 6 8 2
-GNT0 22 -GNT1 15 -REQ1 15 - C LKRUN 14,15,25,26 - INTA 13,16,22 - INTB 13,22,25 -PHLDA 13 -PHOLD 13
R669 R670
8.2K 8.2K
RP27
B
T236 T237 T238 T239 T240 T241 T242 T243 T244 T245
-PHOLD -PHLDA -REQ0 -REQ1 -REQ2 -REQ3 -GNT0 -GNT1 -GNT2 -GNT3
13 -PHOLD 13 -PHLDA 22 15 25 26 - REQ0 -REQ1 -REQ2 -REQ3
-PHOLD -PHLDA -REQ0 -REQ1 -REQ2 -REQ3 -GNT0 -GNT1 -GNT2 -GNT3
T2 R4 V3 U5 U6 T5 V2 V1 U2 T6
PCI_SBREQ# PCI_SBGNT# PCI_BREQ0# PCI_BREQ1# PCI_BREQ2# PCI_BREQ3#/PCI_CLK3 PCI_GNT0# PCI_GNT1# PCI_GNT2# PCI_GNT3#/PCI_CLK4
-GRBF 16 -GSTOP 16 - GTRDY 16 -GWBF 16 -GREQ 16 -GGNT 16 R649 R650 22 IDSEL_CB 15 IDSEL_USB20 25 IDSEL_LAN 26 IDSEL_MP R87 R88 R89 R91
1 1 1 1
2 2 2 2
100_1% AD21 100_1% AD23 100_1% AD29 100_1% AD20
22 -GNT0 15 - GNT1 25 - GNT2 26 -GNT3 VCC5
AGP_REQ# AGP_GNT# AGP_SBA0 AGP_SBA1 AGP_SBA2 AGP_SBA3 AGP_SBA4 AGP_SBA5 AGP_SBA6 AGP_SBA7 AGP_ST0 AGP_ST1 AGP_ST2 AGP_VOLTAGE_DETECTED AGP_VREF4X
D4 D5 D1 E3 D2 E1 F2 F1 G2 G1 C2 E6 C1 B1 R3
- GREQ - GGNT SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
SBA[0..7] 16
VCC1.5 VCC3
1 1
2 0_0805 2 *0_0805
C
T1
-A G P_DECT
AGP 2X 4X
VCCAGP 3.3V 1.5V
VCC3
VDD_5V VPCI VPCI VPCI VPCI VPCI VPCI
T23 U13 U14 U20 Y20 AD11 Y19 Y16 Y15 Y11 Y10 AD16 T20
C110 0 .1U
Close to NB
R806 1 R807 1 VCCAGP R95
GND GND GND GND GND GND GND GND GND GND GND GND GND
AGP
T227 T228 T229 T230 T231 T232 T233 T234 T235
PAR -FRAME - I RD Y - TRD Y - INTA -DEVSEL -STOP - SERR - P CIREQ
13,15,22,25,26 PAR 13,15,22,25,26 -FRAME 13,15,22,25,26 - I RD Y 13,15,22,25,26 - TRD Y 13,16,22 - INTA 13,15,22,25,26 -DEVSEL 13,15,22,25,26 -STOP 13,15,22,25,26 - SERR 9,14 - P CIREQ
PAR -FRAME - I RD Y - TRD Y - INTA -DEVSEL -STOP - SERR - P CIREQ
AB3 AA4 AA5 AB1 T4 AB4 AB5 AB2 R6
PCI_PAR PCI_FRAME# PCI_IRDY# PCI_TRDY# INTA# PCI_DEVSEL# PCI_STOP# PCI_SERR# PCI_ACTIVE_REQ#
AGP_CBE#0 AGP_CBE#1 AGP_CBE#2 AGP_CBE#3 AGP_DEVSEL# AGP_FRAME# AGP_IRDY# AGP_PAR AGP_PIPE# AGP_RBF# AGP_SERR# AGP_STOP# AGP_TRDY# AGP_WBF#
M3 H1 M5 J6 N6 M6 N5 R5 E5 D3 P5 P4 P6 F6
-GCBE0 -GCBE1 -GCBE2 -GCBE3 -GDEVSEL -GFRAME - GIRD Y GPAR -GPIPE - GRBF - GSERR -GSTOP - GTR DY - GWBF -GDEVSEL 16 -GFRAME 16 - GIRD Y 16 GPAR 16
14,16 - AGP_BUSY 8,16 PNL_DATA 16 ATI_ENAVDD 8,16 PNL_CLK 14,16 -AGP_STP 8,16 -ATI_ENABL 14,15,25,26 - C LKRUN
R789 R753 R754 R755 R756 R757 R758
1 1 1 1 1 1 1
2 2 2 2 2 2 2
*0 *0 *0 *0 *0 *0 *0
- GGNT GAD4 - GRBF - GIRD Y - GREQ SBA2 SBA4
VCC3 (90mA) VCCAGP (22mA)
PWR/GND
R871 100/F
T223 T224 T225 T226
-CBE0 -CBE1 -CBE2 -CBE3
AD3 AC1 AA3 Y1
PCI_CBE0# PCI_CBE1# PCI_CBE2# PCI_CBE3#
AGP_SBSTB AGP_SBSTB# AGP_ADSTB0 AGP_ADSTB0# AGP_ADSTB1 AGP_ADSTB1#
F3 E2 M2 M1 H5 H4
SB_STB -SB_STB AD_STB0 -AD_STB0 AD_STB1 -AD_STB1
SB_STB 16 -SB_STB 16 AD_STB0 16 -AD_STB0 16 AD_STB1 16 -AD_STB1 16
CO R E PWR
R463 R464 R465 R466
T189 T191 T193 T194 T195 T196 T197 T198 T199 T200 T201 T202 T203 T204 T205 T206 T207 T208 T209 T210 T211 T212 T213 T214 T215 T216 T217 T218 T219 T220 T221 T222
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
AA7 AF5 AD5 AF4 AF3 AE4 AE3 AC4 AE2 AE1 AD2 AC3 AD1 AE5 AC5 AC2 AA1 AA2 Y2 AA6 Y5 Y4 Y6 W5 W4 W3 W2 W6 V6 V5 W1 V4
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PART 2 OF 5
AGP_AD0 AGP_AD1 AGP_AD2 AGP_AD3 AGP_AD4 AGP_AD5 AGP_AD6 AGP_AD7 AGP_AD8 AGP_AD9 AGP_AD10 AGP_AD11 AGP_AD12 AGP_AD13 AGP_AD14 AGP_AD15 AGP_AD16 AGP_AD17 AGP_AD18 AGP_AD19 AGP_AD20 AGP_AD21 AGP_AD22 AGP_AD23 AGP_AD24 AGP_AD25 AGP_AD26 AGP_AD27 AGP_AD28 AGP_AD29 AGP_AD30 AGP_AD31
R1 R2 P2 P1 P3 N2 N3 N1 L1 L3 L2 K3 K2 J2 J3 H2 M4 L6 L5 L4 K5 K6 K4 J5 H6 J4 G3 G5 G6 G4 F4 F5
GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31
Default : External Gfx Internal Gfx : Remove : R653~R655,R657~R665, R667~R670,R647, R648, RP110,RP111,R649,R806, R807,R652.
A
PCI/AGP I/F
6 8 2 4 6 8
1 3 5 7 1 3 5 7
Insatll : R753~R758,R789,R650,R651, R474,R475,R478,C642,R479, R480,U45.
B
For internal
graphics
1
C
1 0
Inter.
VCC3 (15mA)
external
AF2 Y3 T3 U7 V7 W7
AGP_ST1 AGP_ST2 -AGP_DECT
2 0 2 0
ST0 ST1 ST2
ST0 ST1 ST2
16 16 16
RS200MP
PUT ON THE SOLDER SIDE OF RS200M
VCCAGP VCC3
RS200MP
R473 *20K R474 *20K R475 *20K
1K_1% VCCAGP
For internal graphics used(R474,R475,R478)
-AGP_DECT
R651 1 R652 1
2 *10K 2 1K
C111 0 .1U
R97 1K_1% C116 22U/16V C117 0 .1U C118 1U/6.3V C119 0 .1U C120 0 .1U C121 1U/6.3V C112 * 0 .1U C113 0 .1U C114 0 .1U C115 0 .1U
(40~108MHZ)
6 7 8 S1 S0 XOUT
VCC1.8
VCC3
R476
D
R477 *20K
R478 *20K
U45
VDD 2
VCC3 C124 C125 10U/6.3V C126 0 .1U C130 1U/6.3V C147 * 0.1U C148 0 .1U C149 0 .1U C150 0 .1U C151 0 .1U
D
*20K L V D S _ SPEC L : D IS A B LE H : E N A B LE R761 1 AGP_ST1 AGP_ST2 *0
10U/6.3V
2
R479 R480
LVDS_SPEC 5 *22 1 *33 4
SSCC XIN/CLK DSOUT GND
C642 * 0 .1U C134 0 .1U C136 10U/6.3V C137 10U/6.3V C138 1U/6.3V C139 0 .1U C140 0 .1U C142 0 .1U
+ C133 47U/6.3V
C143 * 0 .1U
C144 0 .1U
C145 0 .1U
C146 0 .1U
Title
QUANTA COMPUTER
RS200M 3/4
JE5.1 Main Board
Sheet 7
8
2
1
3
Level 1 environment-related substances should NEVER be used. Molding resin, ink, paint and covered wiring material should be procured from the supplier approved as a Sony's green partner.
2 3 4 5 6
Size D o cument Number C us tom
Rev 2A of 36
*SM560
1
Date: Tuesday, August 31, 2004
7
1
2
3
4
5
6
7
8
For internal graphics AVDD AVDD PLVDD VCC1.8 A2VDD VCC2.5 +3.3VNB MNB-201209-0120A L4 L5 0_0805 MNB-201209-0120A L6 C152 0 .1U C153 0 .1U C154 0 .1U L3 VCC3 R 1OUT0-_R R 1OUT0+_R R 1OUT1-_R R 1OUT1+_R R 1OUT2-_R R 1OUT2+_R R1CLK0-_R R1CLK0+_R R 2OUT0-_R R 2OUT0+_R R 2OUT1-_R R 2OUT1+_R R 2OUT2-_R R 2OUT2+_R R2CLK0-_R R2CLK0+_R R762 R763 R764 R765 R766 R767 R768 R769 R770 R771 R772 R773 R774 R775 R776 R777
close to M9 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 R 1OUT0R1OUT0+ R 1OUT1R1OUT1+ R 1OUT2R1OUT2+ R1CLK0R1CLK0+ R 2OUT0R2OUT0+ R 2OUT1R2OUT1+ R 2OUT2R2OUT2+ R2CLK0R2CLK0+
08
A
1
MNB-201209-0120A
A
U7D C155 10U/6.3V C156 1 U/10V/Y5V
2
1
G14 A10 A11 C11 A9
C159 0 .1U
+3.3V AVDD AVSSN AVSSQ A2VDD A2VSSN A2VDDQ A2VSSQ
Default :External Gfx Internal Gfx : Remove :
PART 4 OF 5
2
C157 10U/6.3V
C158 1 U/10V/Y5V
A2VDD
A8 C8 B8
TXOUT_U0N TXOUT_U0P TXOUT_U1N TXOUT_U1P TXOUT_U2N TXOUT_U2P TXCLK_UN TXCLK_UP TXOUT_L0N TXOUT_L0P TXOUT_L1N TXOUT_L1P TXOUT_L2N TXOUT_L2P TXCLK_LN TXCLK_LP LPVDD LPVSS LVDDR LVDDR LVSSR LVSSR C_R
B5 C5 C6 B6 A6 A7 C7 B7 A2 A3 C3 B3 C4 B4 A4 A5 F8 D7 D8 E8 E7 F7 C9 D9 E9 B9 F10 F9 U4 F13
R 1OUT0-_R R 1OUT0+_R R 1OUT1-_R R 1OUT1+_R R 1OUT2-_R R 1OUT2+_R R1CLK0-_R R1CLK0+_R
close to NB
R642,R749,R750,R643,R740~R742
TV_COMP_R R778 C R T_R_R R779 C RT_G_R R780 CRT_B_R R781 HS YNC _ R R782 V S YN C_R R783 DDC2BC_R R784 DDC2BD_R R785 *0 *0 *0 *0 *0 *0 *0 *0 TV_COMP 16,23 C RT_R 12,16 CRT_G 12,16 CRT_B 12,16 H S YNC 12,16 V S YNC 12,16 DDC2BC 12,16 DDC2BD 12,16
Install : R762~R785
RS200M_X1 CPUCLK+ CPUCLKH C LK IN H C LK IN # A G P _ F B C L K IN _R PCLK_SB PCLK_MP PCLK_7420 PCLK_LAN
B
R104
0
C160 1 C161 1 C164 1 C165 1 C166 1 C172 1 C176 1 C177 1 C178 1 C182 1 C183 1
2 8.2P 2 8.2P 2 *10P 2 *10P 2 *10P 2 *22P
RS200M_X2 R106 75_1% C167 R105 1M C162 10P 14.318MHz/20PF/30PPM
AVDD C163 0 .1U
PLVDD Y1
W22 W21 A12 A14
THERMALDIODE_N THERMALDIODE_P
LVDS
2
C168 10U/6.3V
2 *22P 2 *22P 2 *22P 2 *22P
R107 499 R740 R741 R742 75_1% 75_1% 75_1% C R T_R_R C RT_G_R CRT_B_R V S YN C_R HS YNC _ R
LPVSS L8
CRT
E10 D10 C10 E11 F11 B10 B12 B11 D13 E13
NB_RSET
RS200M_X1 RS200M_X2 H C LK IN H C LK IN #
OSC14M
2 *10P
R108 R109 33_1% 33_1%
RSET XTLIN XTLOUT HCLKIN HCLKIN#
LVSSR
R110 R111 TV_COMP_R R2SET R642 R115
75_1% 75_1% 75_1% 715_1%
CLK66_AGP
C859 1
2 *10P
SVID
Y_G COMP_B R2SET DACSCL DACSDA
R108,R109 close to Pin D13,E13 R112,R114 close to Pin B13,B14
R112 R114
33_1% S Y S _ F B C L K OU T#_R B13 33_1% S Y S _ F B C L K OU T_R B14 22 22 22 S B _ P C I C L K _ IN T_R P C I C L K 0 _ I N T_R C L K 6 6 _A GP _R
SYS_FBCLKOUT# SYS_FBCLKOUT PCI_CLKF PCICLK_NB AGPCLK AGPCLKIN/AGP_FBCLKIN EXT_MEM_CLK/AGP_FBCLKOUT USBCLK REF27/PCICLK5 OSC
VCC3 C187 C186 0 .1U 0 .1U
R643 22 ohm for external AGP . Del R643 22 ohm for internal AGP .
13 PCLK_SB
R119
U3 E12 D12
DDC2BC_R DDC2BD_R R122
R749 R750 10K
4.7K 4.7K
VCC3
16 CLK66_AGP
P CICLK0_INT R121 CLK66_AGP R643
6 4
U8
VDD GND CLK1 CLK2 CLK3 CLK4
3 2 5 7 8
PCLKNEC PCLKMP PCLK7420 PCLKLAN
R117 R116 R118 R120
0 22 22 10
PCLK_NEC 15 PCLK_MP 26 PCLK_7420 22 PCLK_LAN 25
R125
22
A G P _ F B C L K IN _R C13 A G P _ F B C L K OU T_R C12 22 48M_CLK_R
PCICLK_STOP# CPUSTOP#
R126
10K
VCC3 -PCISTOP 14 -CPUSTOP 3,14,32 VCC3
48M_CLK
R675
U1 B15 F12
P CICLK0_INT
C
1
REF CLKOUT
13 OSC14M
OSC14M
R129
22
S B _ O S C _ IN T_R
ICS9112
23 14M_CODEC VCC3
CLK. GEN.
SYSCLK SYSCLK#
C14 D14
C P U C L K _ I N T_R C PUCLK#_INT_R
R127 R128
56_1% 56_1%
CPUCLK+ 3 CPUCLK- 3
C
R130
22
RS200MP
C1116 33P C1117 33P VCC3
C649 C982 C983 0 .1U 0 .1U
6 4
U70
VDD GND CLK1 CLK2 CLK3 CLK4
*22P
2
2
3 2 5 7 8
R744 MS C L K_48M_R R745
USB_CLK
22 22
USBCLK 14 MSCLK_48M 22
2
PCLK_NEC
RED GREEN BLUE DACVSYNC DACHSYNC
2
C179 1 U/10V/Y5V MNB-201209-0120A C180 1 U/10V/Y5V
C170 0 .1U 1 U/10V/Y5V
C169
C171 0 .1U
A13 A15
PLLVSS0 PLLVSS1
LPVDD
C173 1 U/10V/Y5V
1
C175 10U/6.3V VCC1.8
10P
PLLVDD0 PLLVDD1
2
1
R 2OUT0-_R R 2OUT0+_R R 2OUT1-_R R 2OUT1+_R R 2OUT2-_R R 2OUT2+_R R2CLK0-_R R2CLK0+_R
1
L7 MNB-201209-0120A C174 0 .1U
VCC1.8
1
C181 10U/6.3V
L VDDR
B
1
REF CLKOUT
1
48M_CLK
1
C949 *10P
5
8
C601 *10P
LCD
C ON2 LCDVCC
OR1OUT0OR1OUT0+ OR1OUT1OR1OUT1+ OR1OUT2OR1OUT2+ OR1CLK0OR1CLK0+ OR2OUT0OR2OUT0+ OR2OUT1OR2OUT1+ OR2OUT2OR2OUT2+ OR2CLK0OR2CLK0+
R135 10K
VCC3 QCIPN:AL07SZ04009 NC7SZ04P5X
C188 1
2
0 .1U
NC7WZ08K8X
NC7WZ08K8X
ICS9112
16 R1OUT016 R1OUT0+ *RFCMF1632140M2T1 16 R1OUT116 R1OUT1+ *RFCMF1632140M2T1
D
3
1
R134 1K R136 10K U11B HN1B01FU
1
3
5 4
R138 10K
D
16 R1OUT216 R1OUT2+ *RFCMF1632140M2T1 16 R1CLK016 R1CLK0+ *RFCMF1632140M2T1
3 2
4 1 LP3
3 2
4 1 LP4
RFCMF1632140M2T1
Hold Hold
16 16 16 16 16 16 16 16
R2OUT0R2OUT0+ R2OUT1R2OUT1+ R2OUT2R2OUT2+ R2CLK0R2CLK0+
3 2 RFCMF1632140M2T1 3 2 RFCMF1632140M2T1 3 2 RFCMF1632140M2T1 3 2
4 1 4 1 4 1 4 1
LP5 LP6 LP7 LP8
V IN D ISPON (0.3V~3.0V)
R140 3.3K
1
R141 10K
2 6
C195 0 .1U U11A HN1B01FU
B RIGHT 29 Title
QUANTA COMPUTER
RS200M 4/4
JE5.1 Main Board
Sheet 8
8
R142 10K
2
1
Level 1 environment-related substances should NEVER be used. Molding resin, ink, paint and covered wiring material should be procured from the supplier approved as a Sony's green partner.
1 2 3
R2out : First channel
Size D o cument Number C us tom
2
3 2
4 1 LP2
C191 * 10U/10V/Y5V
4
3 2
4 1 LP1
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
7,16 -ATI_ENABL PNL_DATA 7,16 PNL_CLK 7,16 VCC3 VCC5
2
U10
4
13,27 P WROK
5 6
U9B
14 D ISP_ON
1 7 2
U9A
D ISPON
3
R133 0
QCIPN:AL07WZ08002
Rev 2A of 36
LCD-FOXCONN(HT1320)
4 5 6 7
41 42
Date: Tuesday, August 31, 2004
1
2
3
4
5
6
7
8
A D [ 0 . .31] A D [ 0 . . 3 1 ] 7 , 1 3 , 1 5 ,2 2 ,2 5 ,2 6
09
A
BS1 R 1 44 *2 .7K R 1 45
3 *2 .7K V C C3 A D [ 3 1 . . 3 0 ] : C L K S P EED D E F A U L T : 01 A D 14 V C C3 0 0: 0 1: 1 0: 11 : 1 0 0 MH Z 1 3 3 MH Z 1 6 6 MH Z 6 6 MH Z R 1 51 2 .7K V C C3 A D 1 4 : A GT L + VDDQ
A D 31
R 1 47 BS0
2 .7K 3 1 .5K
R 1 48
*2 .7K 0 : 1 . 2 V MOB I L E P A RT 1 : 1 . 7 V D E S K T OP PART
A
R 1 49
2 .7K
R 1 50
A D 30
R 1 52
*2 .7K
A D 12
R 1 56
2 .7K A D [ 1 2 ] : F L A T P A N E L ID MSB
R 1 55 A D 29 R 1 57
*2 .7K 2 .7K
V CC3
A D 2 9 : R S 2 0 0 M F U L L C ON F I GU R A T I ON DEFAULT:1 0 : F U L L C ON F I GU R A T I ON 1 : U S E S D E F A U L T V A L UES V CC3
R 1 60 A D 28 R 1 61
2 .7K *2 .7K
V CC3
A D 2 8 : S P R E A D S P E C T R U M E NABLE DEFAULT:1 0 : D I S A B LE 1: EN A B LE
RP 28 1
3 5 7
A D [ 7 . . 4 ] : F L A T PANEL ID S W1 AD7 R167 R171 R175 R178 2 .7 K 2 .7 K 2 .7 K 2 .7 K L C DID3 L C DID2 L C DID1 L C DID0 L C DID0 L C DID1 L C DID2 L C DID3
2 1 0 K X4 4 6 8
B
B
1 2 3 4
8 7 6 5
1
R 1 64 A D 27 R 1 65
*2 .7K 2 .7K
V CC3
A D 2 7 : MC E R R OB S E R V A T I ON DEFAULT: 0 0: EN A B LE 1 : D I S A B LE
AD6 AD5 AD4
D IP4X2 R 1 68 A D 26 R 1 70 *2 .7K 2 .7K V CC3 A D 26: B U S PA R K IN G DEFAULT : 0 0: EN A B LE 1 : D I S A B LE
2 3 4
ON
R 1 72 A D 25 R 1 74
*2 .7K 2 .7K
V CC3
A D 2 5 : B I N I T # OB S E R V A T ION DEFAULT : 0 0: EN A B LE 1 : D I S A B LE A D 3 : A _ L I N K E N ABLE DEFAULT: 0 0 : P C I - 3 3 MH z, MU L T I P OI N T C ON N E C T I ON 1 : A _ L I N K , P OI N T T O P OI N T I N T E R C ON N E C T
AD3 R 1 77 A D 24
C
R 1 81
2 .7K
2 .7K *2 .7K
V CC3
R 1 79
A D 2 4 : I OQ E N A B LE DEFAULT : 1 0 : S E T I OQ T O 1 1 : S E T I OQ T O 1 2 AD2
R 1 83 R 1 84
*2 .7K 2 .7K
V CC3
A D 2 : A U T O C A L I B A T I ON ENABLE DEFAULT:0 0 : A U T O C A L I B R A T I ON ENABLE 1 : A U T O C A L I B R A T I ON D ISABLE
C
R 1 87 AD1 R 1 88
*2 .7K 2 .7K
V CC3
A D 1 : F r c S h o r t R e s et DEFAULT: 0 0 : N OR MA L OP E R A T I ON 1 : T E S T MODE
R 1 85 A D 22 R 1 86
*2 .7K 2 .7K V CC3
A D 2 2 : R E F 2 7 E N A B LE DEFAULT : 1 0 : P C I C L K 5 OU T P U T 1 : 2 7 M H z R E F E R E N C E C L OC K I N P U T
R 1 91 AD0 R 1 92
2 .7K *2 .7K
V CC3
A D 0 : P C I / A GP C ON F I G. DEFAULT : 1 1 : E X T E R T A L A GP 66 MHz 0 : I N T E R N A L A GP 3 3 MHz
R 1 89 A D 21 R 1 90
*2 .7K 2 .7K
V CC3
A D 2 1 : C L K _ B Y P A S S ( T EST ONLY) DEFAULT : 0 0 : N OR MA L 1 : T E S T MODE
The AD0 signal strapping pull high for external AGP . The AD0 signal strapping pull low for internal AGP .
P C I _ P R E QA C T # : I N T E R N A L C L OC K GE N . DEFAULT : 1 0 : D I S A B LE 1: EN A B LE
A D 20
D
R 1 93
2 .7K
A D 2 0 : P C I C L K E X P A N S I ON DEFAULT : 0 1 : P C I _ R E Q# 3 , P C I _ GN T # 3 U S E D A S P C I C L K 0 : P C I _ R E Q# 3 , P C I _ GN T # 3 U S E D A S R E Q/ GN T 7 ,14 -P C IR E Q R 1 94 2 .7K V CC3
D
R 1 95 - C BE3 R 1 96 R 1 97 - C BE0 -C B E[0..3] R 1 98
2 .7K *2 .7K *2 .7K 2 .7K
V CC3
C B E # 3 : P R OD T E S T DEFAULT : 1 0 : S H OR T T I ME R S 1 : N OR MA L OP E R A T I ON C B E #0:R ESER VE T itle
V CC3
QUANTA COMPUTER
SYSTEM CONFIG
D o c u m e n t N u mb e r
- C B E [ 0 ..3 ] 7 , 1 3 , 1 5 ,2 2 ,2 5 ,2 6
2 3
Level 1 environment-related substances should NEVER be used. Molding resin, ink, paint and covered wiring material should be procured from the supplier approved as a Sony's green partner.
4 5 6
S ize B
JE5.1 Main Board
S heet 9
8
R ev 1A of 36
D a t e : T u e s d a y , A u g u st 3 1 , 2 0 0 4
1 7
1
2
3
4
5
6
7
8
DDR TERMINATOR
V T T _ MEM M D8 MD12 MD13 MD15 MD11 M D0 M D4 6 ,11 M D Q S0 M D6 M D7 MD20 MD16 R P 44 1 V T T _ MEM MD10 6 ,1 1 M D Q M1 6 ,1 1 M D Q S 1 56X4 6 ,1 1 M D Q M0 RP 43 1
A
6 ,1 1 M D [ 0 . . 6 3 ] 6 ,1 1 M A [ 0 ..1 4 ] 6 ,1 1 M D Q M [ 0 . .7 ] 6 ,1 1 M D Q S [ 0 . .7 ]
M D [0 .. 63] M A [ 0 ..1 4 ] M D Q M [ 0 . .7 ] M D Q S [ 0 . .7 ] V T T _ MEM 2 . 5 V S US C 2 28 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .0 1U *0 .0 1U 0 .0 1U 0 .0 1U 0 .0 1U 0 .0 1U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U C229 C232 C235 C238 C241 C244 C247 C250 C252 C266 C269 C272 C275 C277 C279 C281 C283 C284 C307 C310 * 1 0 U / 6 .3 V C282 C604 C605 1 0 U / 6 .3 V C222 * 1 0 U / 6 .3 V C320 1 0 U / 6 .3 V * 1 0 U / 6 .3 V
C
10
2 . 5 V S US C 2 25 0 .1 U 2 . 5 V S US C226 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U * 0 .1 U 0 .1 U 1 000P 1 000P 1 000P 1 000P 1 000P 1 000P 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U
B A
R P 46
R P 45
6 , 1 1 M D Q M2 6 ,11 M D Q S2
R P 33 MD19 MD22 MD18 MD29 MD25
R P 39
6 ,11 M D Q S3 MD36 MD37 MD32 MD33
B
3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7
2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8
56X4
M D9 RP 32 M D5 M D1 MD14 MD17 MD21 M D3 M D2 MD27 MD26 MD31 MD30 MD24 MD28 MD23
56X4
RP 47
56X4
RP 49
56X4 6 ,1 1 M D Q M3
RP 40
3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7
2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8
56X4
56X4 V T T _ MEM 56X4 6 , 1 1 - M S CA S 56X4 6 ,1 1 - M W E - M S CA S M A10 -MW E M A2 M A0 M A3 M A6 M A4 RP 34 1
C196 C209 C215
0 .1 U C 2 31 0 .1 U C 2 34 0 .1 U C 2 37 0 .1 U C 2 40 0 .1 U C 2 43 0 .1 U C 2 46 0 .1 U C 2 49 0 .1 U C 2 64 0 .1 U C 2 67 0 .1 U C 2 70 0 .1 U C 2 73 0 .1 U C 2 76 0 .1 U C 2 78 0 .1 U C 2 80
2 33X4 4 6 8 2 33X4 4 6 8 2 33X4 4 6 8 2 33X4 4 6 8 2 33X4 4 6 8
V T T _ MEM 2 . 5 V S US
C197 C205 C216 C227 C271
56X4
3 5 7 RP 51 1 3 5 7
RP 38 1
R P 42 1
56X4 MD40 MD41 56X4 6 ,1 1 M D Q M5 6 ,1 1 M D Q S 5 R P 1 05
6 , 1 1 M D Q M4 6 ,11 M D Q S4
R P 41 MD34 MD35 MD39 MD38 MD44 MD45 MD46 MD47 MD52 MD48 MD50 MD55 MD60 MD56 MD59 MD63
R P 35
56X4
R P 48
56X4 6 ,1 1 M D Q M6 56X4
MD49 MD53 MD42 MD43 MD61 MD54 MD51 MD62 MD58 MD57
6 ,11 M D Q S6
R P 30
6 ,1 1 M D Q M7
1 3 5 7 RP 37 1 3 5 7 RP 36 1 3 5 7 RP 29 1 3 5 7
2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8
56X4
6 ,11 -M C S3 6 ,11 -M C S2 6 , 1 1 - M S RA S
56X4
56X4
M A14 M A1 M A13 - M CS 3 M A5 - M CS 2 - M S RA S M A7 M A12 M A9 M A8 M A11
C285 C289 C305 C311 C202 C210
3 5 7 RP 50 1 3 5 7 RP 52 1 3 5 7
C 2 88 C 2 91 C637 0 .1 U C 3 02 0 .1 U C 3 04 C639 0 .1 U V T T _ MEM C640 C641 0 .1 U C602 0 .1 U
56X4
6 ,11 -M C S0
- M CS 0
R200
33
6 ,1 1 M C K E - M CS 1
R201
33
C638
R P 31
56X4
6 ,11 -M C S1
R202
33
6 ,11 M D Q S7
* 1 0 U / 6 .3 V 1 0 U / 6 .3 V
C
C 2 87 C 2 90 C 2 93 C 3 03 C 3 06 C 3 09 C 2 04 C 2 12 C 2 86 C 2 92
0 .1 U C321 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U V T T _ MEM C625 C626 C627 C628 C629 C630 C631 C632 C199 C217 C207 C248 C253 C255 C268 C274 C236 C230 0 .1 U 0 .1 U 0 .1 U *0 .1 U 0 .1 U *0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U 0 .1 U
MA Terminator
D
C 3 08 C 3 12 C 2 42
6 , 1 1 M A [ 0 ..1 4 ]
MA[0..14] M A0 M A1 M A2 M A3 M A4 M A5 M A6 M A7 - M S RA S - M S CA S -MW E MC KE - M CS 0 - M CS 1 - M CS 2 - M CS 3
D
C 1 98 C 2 03 C 2 06 C 2 11 C 2 14
C 2 94 47P
C 2 95 47P
C 2 96 47P
C 2 97 47P
C 2 98 47P
C 2 99 47P
C 3 00 47P
C 3 01 47P C 2 56 47P C 2 57 47P C 2 58 47P C 2 59 47P C 2 60 47P C 2 61 47P C 2 62 47P C 2 63 47P
C 2 18 C 2 20 C 2 24
BETWEEN NB & 1ST DIMM
M A8 M A9 M A10 M A11 M A12 M A13 M A14
E
C 3 13 47P
C 3 14 47P
C 3 15 47P
C 3 16 47P
C 3 17 47P
C 3 18 47P
C 3 19 47P
T itle
QUANTA COMPUTER
Memory -1/2- Terminator
D o c u m e n t N u mb e r
E
BETWEEN NB & 1ST DIMM
1 2 3
Level 1 environment-related substances should NEVER be used. Molding resin, ink, paint and covered wiring material should be procured from the supplier approved as a Sony's green partner.
4 5 6
S ize B
JE5.1 Main Board
S heet 10
8
R ev 1A of 36
D a t e : T u e s d a y , A u g u st 3 1 , 2 0 0 4
7
A
B
C
D
E
DDR - Modules
2 . 5 V S US
2 . 5 V S US
11
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 DU DU DU DU DU/RESET# DU/A13 DU/BA2 PAD PAD SA0 SA1 SA2 5 7 13 17 6 8 14 18 19 23 29 31 20 24 30 32 41 43 49 53 42 44 50 54 55 59 65 67 56 60 66 68 127 129 135 139 128 130 136 140 141 145 151 153 142 146 152 154 163 165 171 175 164 166 172 176 177 181 187 189 178 182 188 190 85 123 124 200 86 97 98 201 202
R205 1 0K MD63 MD62 MD61 MD60 MD59 MD58 MD57 MD56 MD55 MD54 MD53 MD52 MD51 MD50 MD49 MD48 MD47 MD46 MD45 MD44 MD43 MD42 MD41 MD40 MD39 MD38 MD37 MD36 MD35 MD34 MD33 MD32 MD31 MD30 MD29 MD28 MD27 MD26 MD25 MD24 MD23 MD22 MD21 MD20 MD19 MD18 MD17 MD16 M D7 M D6 M D5 M D4 M D3 M D2 M D1 M D0 MD15 MD14 MD13 MD12 MD11 MD10 M D9 M D8
4
9 10 21 22 33 34 36 45 46 57 58 69 70 81 82 92 93 94 113 114 131 132 143 144 155 156 157 167 168 179 180 191 192
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
4
6 , 1 0 M A [ 0 ..1 4 ]
M A0 M A1 M A2 M A3 M A4 M A5 M A6 M A7 M A8 M A9 M A10 M A11 M A12 M A13 M A14
112 111 110 109 108 107 106 105 102 101 115 100 99 117 116 12 26 48 62 134 148 170 184 78 11 25 47 61 133 147 169 183 77
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 BA0 BA1 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 RAS# WE# CAS# S0# S1# CKE0 CKE1 CK0 CK0# CK1 CK1# CK2 CK2# SDA SCL CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 VREF VREF VDDSPD VDDID
CON3
DDR_SODIMM-STD
6 , 1 0 M D Q M [ 0 . .7 ]
M D Q M7 M D Q M6 M D Q M5 M D Q M4 M D Q M3 M D Q M2 M D Q M0 M D Q M1
3
6 ,10 6 ,10 6 ,10 6 ,10 6 ,10 6 ,10 6 ,10 6 ,10
MDQS7 MDQS6 MDQS5 MDQS4 MDQS3 MDQS2 MDQS0 MDQS1
MDQ S7 MDQ S6 MDQ S5 MDQ S4 MDQ S3 MDQ S2 MDQ S0 MDQ S1
6 , 1 0 - M S RA S 6 ,10 -M WE 6 , 1 0 - M S CA S
- M S RA S 118 - M W E 119 - M S CA S 120
6 , 1 0 - M CS 0 6 , 1 0 - M CS 1
121 122 96 95 35 37 160 158 89 91 193 195 71 73 79 83 72 74 80 84
6 ,10 M C KE 6 ,10 M C KE
2
6 6 6 6 6 6
M C LK1+ M C LK1M C LK3+ M C LK3M C LK5+ M C LK5-
14 S MB DA T A 14 S M B CL K
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 DU DU DU DU DU/RESET# DU/A13 DU/BA2 PAD PAD SA0 SA1 SA2
5 7 13 17 6 8 14 18 19 23 29 31 20 24 30 32 41 43 49 53 42 44 50 54 55 59 65 67 56 60 66 68 127 129 135 139 128 130 136 140 141 145 151 153 142 146 152 154 163 165 171 175 164 166 172 176 177 181 187 189 178 182 188 190 85 123 124 200 86 97 98 201 202 194 196 198
MD63 MD62 MD61 MD60 MD59 MD58 MD57 MD56 MD55 MD54 MD53 MD52 MD51 MD50 MD49 MD48 MD47 MD46 MD45 MD44 MD43 MD42 MD41 MD40 MD39 MD38 MD37 MD36 MD35 MD34 MD33 MD32 MD31 MD30 MD29 MD28 MD27 MD26 MD25 MD24 MD23 MD22 MD21 MD20 MD19 MD18 MD17 MD16 M D7 M D6 M D5 M D4 M D3 M D2 M D1 M D0 MD15 MD14 MD13 MD12 MD11 MD10 M D9 M D8
M D [0 .. 63]
M D [ 0 . . 6 3 ] 6 ,1 0
M A0 M A1 M A2 M A3 M A4 M A5 M A6 M A7 M A8 M A9 M A10 M A11 M A12 M A13 M A14
112 111 110 109 108 107 106 105 102 101 115 100 99 117 116 12 26 48 62 134 148 170 184 78 11 25 47 61 133 147 169 183 77
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 BA0 BA1 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 RAS# WE# CAS# S0# S1# CKE0 CKE1 CK0 CK0# CK1 CK1# CK2 CK2# SDA SCL CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 VREF VREF VDDSPD VDDID
M D Q M7 M D Q M6 M D Q M5 M D Q M4 M D Q M3 M D Q M2 M D Q M0 M D Q M1
MDQ S7 MDQ S6 MDQ S5 MDQ S4 MDQ S3 MDQ S2 MDQ S0 MDQ S1
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
9 10 21 22 33 34 36 45 46 57 58 69 70 81 82 92 93 94 113 114 131 132 143 144 155 156 157 167 168 179 180 191 192
CON4
DDR_SODIMM-RVS
3
- M S RA S 118 - M W E 119 - M S CA S 120
6 , 1 0 - M CS 2 6 , 1 0 - M CS 3
121 122 96 95 35 37 160 158 89 91 193 195 71 73 79 83 72 74 80 84
6 ,10 M C KE 6 ,10 M C KE
6 6 6 6 6 6
M C LK4+ M C LK4M C LK0+ M C LK0M C LK2+ M C LK2-
2
14 S MB DA T A 14 S M B CL K
R 4 39 34 M V R E F _ DIMM *0 V C C3 2 . 5 V S US M V R E F _ DIM
M V R E F _ DIM V CC3 2 . 5 V S US R 2 06 10K
1 2 197 199
1 2 197 199
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
3 4 15 16 27 28 38 39 40 51 52 63 64 75 76 87 88 90 103 104 125 126 137 138 149 150 159 161 162 173 174 185 186
2 . 5 V S US
1
3 4 15 16 27 28 38 39 40 51 52 63 64 75 76 87 88 90 103 104 125 126 137 138 149 150 159 161 162 173 174 185 186
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
R207
1 0K
194 196 198
2
1
V C C3
R 4 40 1 50 M V R E F _ DIM 6 M V R E F _ DIM R 4 41 1 50 S ize B M V R E F _ DIM
1
C600 1 U /6 .3V
C 3 22 1 U / 6 .3 V
C 3 23 0 .1 U
C324 1000P
C646 1 U / 6 .3 V
C647 1 U / 6 .3 V
C648 1 U / 6 .3 V
T itle
QUANTA COMPUTER
Memory -2/2- SODIMM
D o c u m e n t N u mb e r
Level 1 environment-related substances should NEVER be used. Molding resin, ink, paint and covered wiring material should be procured from the supplier approved as a Sony's green partner.
A B C D
JE5.1 Main Board
S heet
E
R ev 1A 11 of 36
D a t e : T u e s d a y , A u g u st 3 1 , 2 0 0 4
1
2
3
4
5
6
7
8
V CC5
V C C3
V CC3 D5 RB 411D
3 2
V C C5
D6 *DA 2 0 4U
3
D7 *DA 2 0 4U
12
A
1
3 1 1 1 1
R 2 11 4 .7 K R212 4 .7K R213 4 .7K R 2 14 4 .7 K
2
2
2
2
2
2
A
33 8 ,16 D D C 2 B C
1
Q17 C H 2 5 07S
3 2
L 10
2
1
1
2
C R T - S CK
33
8 ,16 D D C 2 B D
1
Q18 C H 2 5 0 7S
3
L 11
1
2 1 1 1 1
C R T - S DA
2
2
2
U D Z S 6 .2B
2
C 3 26 120P
D 54
C 3 27 120P
D 55
U D Z S 6 .2B
V C C5
1
1
3
D8 *DA 2 0 4U
3
D9 *DA 2 0 4U
1 3
D 10 *DA 2 0 4U
2
2
ML B -1 6 0 8 0 8 -0 2 2 0 B 8 ,16 C R T _ R
B
L 12
2
C RT -R
B
1
2
ML B -1 6 0 8 0 8 -0 2 2 0 B 8 ,16 C R T _ G
1
2
16
C RT -R
L 13
CRT -G
ML B -1 6 0 8 0 8 -0 2 2 0 B 8 ,16 C R T _B L 14
1
2
C331 1 0P C 3 32 10P C 3 33 10P D 57
C R T -B CRT -G
2
2
2
1
1
D 56
1
R 2 15 7 5_1%
C328 6 8P
R216 7 5 _1%
C329 6 8P
R217 7 5_1%
C 3 30 68P
1
1
1
C R T -B D 58
2
2
2
2
2
UDZ S 6 .2 B
UDZ S 6 .2 B
2
6 1 7 2 8 3 9 4 10 5
C O N5 C R T _CONN D Z 1 1 A 9 1 -H7 -1 7 P
11 12 13 14 15
C R T - S DA CRT -HS C R T -V S C R T - S CK
1
1
1
1
1
2
2
2
1
U D Z S 6 .2B
V CC5
1
R218 V C C5
D 13
R B 4 1 1D
3 2
V CC5
D11 *DA 2 0 4U
1
3
D12 *DA 2 0 4U
1
1 0K
2
3
2
C
1 8
2
17
8 ,16 H S Y N C
2 I
G
U13A T C 7 W 1 2 6FU O
C
33 L 15
6
1
2
CRT -HS
7 8
4
U13B T C 7 W 1 2 6FU O
8 ,16 V S Y N C
5 I
G
33 L 16
3
1
2 1 1
D59 C 3 35 120P
C R T -V S
1
1
D 60
4
2
2
D
2
U D Z S 6 .2B
2
C334 1 20P
U D Z S 6 .2B
D
T itle
QUANTA COMPUTER
CRT PORT/TV
D o c u m e n t N u mb e r
Level 1 environment-related substances should NEVER be used. Molding resin, ink, paint and covered wiring material should be procured from the supplier approved as a Sony's green partner.
1 2 3 4 5 6
S ize B
JE5.1 Main Board
S heet 12
8
R ev 1A of 36
D a t e : T u e s d a y , A u g u st 3 1 , 2 0 0 4
7
1
2
3
4
5
6
7
8
V C C3
R 2 19 R 2 20
1 0K 1 0K
- P D M A _ GNT - P D M A _ RE Q V CC5 R V CC3 R V C C5 V CC3 V C C5
V CC3
V CC5
13
C 3 50 0 .1 U C 3 5 1 C 3 52 0 .1 U 0 .1 U C 3 5 3 C 3 5 4 C 3 55 0 .1 U 0 .1 U 0 .1 U C356 0 .1 U R V CC3 R V CC5
A
C338 V C C5 R 2 21 1 0K IOCHRDY R222
C339
C 3 4 0 C 3 41 0 .1 U 0 .1 U
C 3 4 2 C 3 4 3 C 3 44 0 .1 U 0 .1 U 0 .1 U
C 3 4 5 C 3 46 0 .1 U 0 .1 U
C347 0 .1 U
C 3 4 8 C 3 49
* 1 0 U / 6 .3 V 1 0 U / 6 .3 V
R6 R8 R14
G15 K16
R7 R13
P15
1K U14A
A
Y2 3 2 .7 6 8 K /2 0 P P M o s c 3 2 kx1 o s c 3 2 kx2
8 ,2 7 P W R O K - S B _ P CIRS T 8 O S C 14M R225 22
1 2
R 2 26 C 3 63 10P
4 3
10M C 3 64 10P V C C3 R228 *1 0K
14 C L K 3 2 K O 3 - FE RR 3 -CP UINIT 3 - IG NNE 3 I NTR 3 N MI 3 -A 2 0 M 14 S B _ GP O2 9 29 I O C H R D Y 1 4 ,2 9 A E N
U10 U4 C5 D10 W6 Y6 V13 A12 B13 C14 C13 B12 C12 A14 N17 M17 N18 E5 E4 T3 E8 A3 D4 C4 A4 B4 D5 B5 C11 A10
F6 F7 F14 P6
E10 G6 N6 N15 R15
T10
F15
1 0 U / 1 0 V /Y 5 V * 1 0 U / 1 0 V /Y 5 V
PWG SPDIFIN PCIRST# OSC14M OSC32KI OSC32KII CLK32KO FERR# CPURST INIT IGNNE# INTR NMI A20M#
P A R T 1 OF 2
T248
ACRESET# ACSYNC ACBITCLK ACSDATAIN0 ACSDATAIN1 ACSDATAOUT ACGPUP ACGPDOWN ACGPMUTE
Y9 P4 P5 W9 Y8 U1 U3 R5 U2 R4 T4 V1 V2 V3 W1 W2 W3 Y1 Y2
VCCR5D1 VCCR5D2
VCCR3E1 VCCR3E2 VCCR3E3
VCCF1 VCCF2
VCC3C1 VCC3C2 VCC3C3 VCC3C4
UPSPWR
VCC5A1 VCC5A2 VCC5A3 VCC5A4 VCC5A5
VCC3B
VCCG
R223 A C_S Y NC#_R B I T CL K S DIN0 S DIN1 A C _ D A T A _ OUT # _ R R 2 2 4 - V O L UP _ S B - V O L UP _ S B 1 - V O L D N_ S B - MUT E _ S B 3 - MUT E _ S B - V O L D N_ S B 5
0
0
7
T249 1 0 K x4 R P 5 4
2 4 6 8
- A C RS T 2 3 ,2 6 S Y N C 2 3 ,2 6 B I T CL K 2 3 ,2 6 S D I N 0 23 S D I N 1 26 S D O U T 2 3 ,2 6
C357
C 3 58 1 U / 6 .3 V
C359 0 .1 U
C360 0 .1 U
C361 0 .1 U
C 3 62 0 .1 U
1 0 U / 6 .3 V
CPU INTERFACE
ACMIDITXD_IRQ0O ACMIDIRXD_IRQ3O ACGAME0 ACGAME1 ACGAME2 ACGAME3 ACGAME4 ACGAME5 ACGAME6 ACGAME7
V C C5 A C G A ME 0 A C G A ME 1 A C G A ME 2 A C G A ME 3 A C G A ME 4 A C G A ME 5 A C G A ME 6 A C G A ME 7 A C G A ME 3 A C G A ME 2 A C G A ME 1 A C G A ME 0 A C G A ME 7 A C G A ME 6 A C G A ME 5 A C G A ME 4 1 0 K x4 1
V CC5
-A 2 0 M
IOCHRDY - P D M A _ GNT - P D M A _ RE Q T250
APICCS#_PCS2# APICREQ# APICGNT# LRCLK_PDMAGNT# SCLK_PDMAREQ# PCMDATA PCICLK FRAME# IRDY# TRDY# STOP# DEVSEL# SERR# PAR PHOLD# PHLDA# CBE0# CBE1# CBE2# CBE3# AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
M1535+
3 5 7 1 3 5 7
* 1 0 K x4
2 RP 55 4 6 8 2 4 6 8
RP 56 - S B _ P CIRS T
3 V S US U 77 T C 7 S H 3 2FU
B
8 P C LK_SB 7 , 1 5 ,2 2 ,2 5 ,2 6 - F R A ME 7 , 1 5 ,2 2 ,2 5 ,2 6 - I R D Y 7 , 1 5 ,2 2 ,2 5 ,2 6 - T R D Y 7 , 1 5 ,2 2 ,2 5 ,2 6 -S T OP 7 , 1 5 ,2 2 ,2 5 ,2 6 - D E V S E L 7 , 1 5 ,2 2 ,2 5 ,2 6 - S E R R 7 , 1 5 ,2 2 ,2 5 ,2 6 P A R 7 -P HOL D 7 - P H L DA 7 , 9 , 1 5 ,2 2 ,2 5 ,2 6 - C B E [ 0 ..3 ]
1 2 3
5
4 IRQSER SIRQI SIRQII IRQ8# PCS0# PCS1# SPLED ROMKBCS# RTCAS RTCRW RTCDS RUNENT0 RUNENT1 RUNENT2 RUNENT3 IOR# IOW# MEMR# MEMW# SA0_LAD0 SA1_LAD1 SA2_LAD2 SA3_LAD3 SA4 SA5 SA6 SA7 SA8_SD8 SA9_SD9 SA10_SD10 SA11_SD11 SA12_SD12 SA13_SD13 SA14_SD14 SA15_SD15 BIOSA16 BIOSA17 BIOSA18 XD0 XD1 XD2 XD3 XD4 XD5 XD6 XD7 N19 N16 P16 Y12 P20 R16 Y13 T20 R20 R19 R18 Y3 V4 W4 Y4
- S CI - U S B _ S MI T252 - S CI R229 1 S E R I R Q 7 , 2 2 ,2 6 I R Q 1 4 28 I R Q 1 5 28 - I R Q 8 27 - S B _ P CS 0 14 - S B _ P CS 1 14 3 V S US S B _ S P L E D 14 - R O M C S 1 4 ,2 9 R T C _ A S 27 R T C _ R W 27 R T C _ D S 27 - S C I 29 - U S B _ S MI 15 - S B _ P CIRS T R 2 30 8 .2 K U15 T C 7 S H 3 2FU 4 - P C I RS T
- N B _ P C IRS T 5
B
-C BE0 -C BE1 -C BE2 -C BE3 A D0 A D1 A D2 A D3 A D4 A D5 A D6 A D7 A D8 A D9 A D10 A D11 A D12 A D13 A D14 A D15 A D16 A D17 A D18 A D19 A D20 A D21 A D22 A D23 A D24 A D25 A D26 A D27 A D28 A D29 A D30 A D31
B7 A5 B3 D2 A9 B9 C9 A8 B8 C8 D8 A7 C7 D7 E7 A6 B6 C6 D6 E6 C3 A2 B2 C2 A1 B1 C1 D3 D1 E3 E2 E1 F3 F2 F1 G2 F4 F5 G3 G4 G5 H4
1 2 3
7 , 9 , 1 5 ,2 2 ,2 5 ,2 6 A D [ 0 . . 3 1 ]
5
- P C I RS T 1 5 , 1 6 ,2 2 ,2 4 ,2 5 ,2 6 ,2 8
PCI BUS INTERFACE
PCI Configration DEVICE uPD720101 RTL8100BL MINI PCI
C
2 1 0K 2 1 0K
IDSEL 23 29 20 21
-GNT -REQ 1 2 3 0
T13 U13 T14 R 2 3 2 U14 R 2 3 3 V19 Y18 W18 V18 Y17 W17 V17 U17 T17 R17 Y16 W16 V16 U16 T16 W15 V15 U15 T15 U20 U19 U18 Y20 W20 V20 Y19 W19
S A0 S A1 S A2 S A3 S A4 S A5 S A6 S A7 S A8 S A9 S A10 S A11 S A12 S A13 S A14 S A15 S A16 S A17 S A18
22 22
-I OR -I OW - M E MR - M E MW
V CC5 R V CC5
- I O R 29 - I O W 29 - M E MR 29 - M E MW 29
- U S B _ S MI R 4 8 9 1
V C C5 R P 64 -I OW -I OR - M E MW - M E MR
1 3 5 7 2 4 6 8 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7
2 1 0 K x4 4 6 8
R P 57 1 1 0 K x4 R P 58 1 0 K x4 1
C
TI7420
S D4 S A0 S D3 S D7 S A7 S A5 S A4 S A6 S A [ 0 ..1 8 ] S A [ 0 ..1 8 ] 2 7 ,2 9 S A13 S A14 S A8 S A9 S A12 S A10 S A11 S A15 S D [ 0 . . 7 ] 2 7 ,2 9 S A16 S A17 S A18
3 5 7
R P 59
3 5 7
2 4 6 8
S S S S
D5 D2 D1 D0
2 1 0 K x4 4 6 8
R P 60
7 , 1 6 ,2 2 7 , 2 2 ,2 5 7 , 1 5 ,2 2 7 , 2 2 ,2 6 7 ,15 7 ,15
- I NT A - I NT B -INT C -INT D - I NT E -INTF
INTA#_MI INTB#_S0 INTC#_S1 INTD#_S2 INTE# INTF#_MOTORON#
S S S S S S S S
D0 D1 D2 D3 D4 D5 D6 D7
2 1 0 K x4 4 6 8
R P 62
R P 61 1 0 K x4 2
4 6 8
1 3 5 7
S D6 S A3 S A2 S A1
2 1 0 K x4 4 6 8
R P 63
H8 H9 H10 H11 H12 H13 J8 J9 J10 J11 J12 J13 K8 K9 K10 K11 K12 K13 L8 L9 L10 L11 L12 L13 M8 M9 M10 M11 M12 M13 N8 N9 N10 N11 N12 N13
2 1 0 K x4 4 6 8
D
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
D
B I T CL K S DIN1 S DIN0
1 3 5 7
1 0 K x4
2 4 6 8
RP 65
T itle
QUANTA COMPUTER
1535+ 2/2
D o c u m e n t N u mb e r
Level 1 environment-related substances should NEVER be used. Molding resin, ink, paint and covered wiring material should be procured from the supplier approved as a Sony's green partner.
1 2 3 4 5 6
S ize B
JE5.1 Main Board
S heet 13
8
R ev 1A of 36
D a t e : T u e s d a y , A u g u st 3 1 , 2 0 0 4
7
1
2
3
4
5
6
7
8
- SB _LDRQ
R 2 34
100K
V CC3
14
A
D43 V C C3 V CC3 V CC5 2 4 ,2 9 P C M R S T E N
1
1SS355
2
- T H RM -1 5 3 5 P ME - B A T L OW
R236 R237 R238
10K 10K 10K
V CC5 R V CC3 R V CC3
R239
TO DDR
A
R 2 41 4 .7 K
R 2 42 4 .7 K
R240 1 0K
U 1 4B P A R T 2 OF 2 - D N B S W O N R 2 44 10K 10K 10K
4 .7K
11 S M B CL K 11 S MB DA T A V CC5 29 I R Q 1 2 V CC5 29 I R Q 1 T257 T258 R P 68 1 5 K x4 1 29 - K B S MI 8 U S B C LK R 2 48 R 2 50 10K 10K T256
T2 T7 U7 T11 T12 V12 U11 U12
SMBALERT# SMBCLK SMBDATA MSCLK MSDATA
FANIN2/USBP6P FANOUT1/USB5P FANOUT2/USB5P NC1/SPDIF_OU LFRAME# LDRQ# LB# LLB#_CPUPWG GPO34 GPO35 SPKR PWRBTN# ACPWR THRM# PME# RI# RSMRST# SMI# STPCLK# SLEEP# ZZ_RATIO# CPUSTP# PCISTP# PCIREQ# OFFPWR0 OFFPWR1 OFFPWR2 SQWO SLPBTN# SUSPEND# CLKRUN#_IRQ12O OFFCDPWR_RSMENT3 DRV0# DRV1# MOT0# MOT1# FDDIR# STEP# HDSEL# WDATA# DENSEL WGATE# RDATA# TRK0# INDEX# WPROT# DSKCHG# RTS1# CTS1# DTR1# DSR1# DCD1# RI1# SIN1 SOUT1 RTS2# CTS2# DTR2# DSR2# DCD2# RI2# SIN2 SOUT2 PRINIT# SLCTIN# STROB# AUTOFD# SLCT BUSY PRNACK# ERROR# PE PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7
Y5 W5 V5 D9 N20 P17 W11 Y11 P18 P19 T19 Y15 Y10 T18 W12 V11 W10 A13 B14 D12 E12 C10 B10 B11 V14 W14 Y14
T253 T255 T317 T369 - S B _L DRQ - S B _LB - B A T L OW S B _ G P O3 4 S B _ G P O3 5 P C S P K 23 - D NB S W ON - T H RM -1 5 3 5 P ME -RI - R S MRS T - S MI 3 - S T P CL K 3 -S L P 3 V CC3 - C P U S T OP 3 , 8 ,3 2 - P C IS T OP 8 - P C I R E Q 7 ,9 - CP U_GHI - S US B 29 - S U S C 29 - D N B S W O N 29 R 2 54 10K D P R S L P V R 32 -RI - S US A R 2 46 R 2 47
R V CC3 R V CC3 R V CC5 1 00K *1 00K
KEYBOARD INTERFACE
- O CCB - B A T L OW 29 - C OM1PD
R251 R252
V C C3 V C C5
KBINH_IRQ1I KBCLK KBDATA USBPWREN# USBCLK USBP0P USBP0N USBP1P USBP1N USBP2P USBP2N USBP3P USBP3N OVCR0#/SEL_MODE0/H0_OVCR# OVCR1#/SEL_MODE1/H1_OVCR# OVCR2#/INC_CCFT/USB5N OVCR3#/DEC_CCFT/USB6N
3 5 7 1 R P 69 3 1 5 K x4 5 7
V C C3
2
MBID
P U S B P3N P U S B P2N P U SBP2P P U S B P IN P U SBP3P R502 R503 R504 R505 R506 R507 R508
2 4 6 8 2 4 6 8
P U S B P ON P U S B P OP
USB INTERFACE
*10K 10K *10K 10K 10K *10K 10K
V9 H5 P U S B P OP W8 P U S B P ON V8 U9 P U S B P IN Y7 P U SBP2P W7 P U S B P2N V7 P U SBP3P U8 P U S B P3N T8 M B I D0 T5 M B I D1 T6 M B I D2 U5 P O V C R 3 U6 L4 L3 M1
R260 100K
R V C C5 V C C3 V C ORE R 2 43
3 V S US 5 V S US
R 2 56 R 2 57
33 1 0K
47K
R 2 45 1 5 , 2 2 ,2 5 ,2 6 - P ME 1K
10K
2
R 2 55
1
Q 21
3
C H 2 5 07S
-1 5 3 5 P ME
B
IRRXH IRRX IRTX
R 2 58
33
1
3
Q20 MMB T 3 9 04
IrDA
- G HI 3
B
V C C3 7 , 1 6 - A G P _ B US Y 7 ,1 6 -A GP _ S T P
R259
2 0K
E9 D11 E11 G19 H18 H17 H16 G20 J17 J18
CLK66 AGPBUSY_CBLIDP AGPSTP#_CBLIDS PIDEDRQ PIDEDAK# PIDERDY PIDEIOR# PIDEIOW# PIDECS1# PIDECS3# PIDEA0 PIDEA1 PIDEA2 PIDED0 PIDED1 PIDED2 PIDED3 PIDED4 PIDED5 PIDED6 PIDED7 PIDED8 PIDED9 PIDED10 PIDED11 PIDED12 PIDED13 PIDED14 PIDED15 SIDEDRQ SIDEDAK# SIDERDY SIDEIOR# SIDEIOW# SIDECS1# SIDECS3# SIDEA0 SIDEA1 SIDEA2 SIDED0 SIDED1 SIDED2 SIDED3 SIDED4 SIDED5 SIDED6 SIDED7 SIDED8 SIDED9 SIDED10 SIDED11 SIDED12 SIDED13 SIDED14 SIDED15
S B _ S QW O V6 2 1 0K V10 R 2 6 2 1 - S US A W13
R V CC5 - S US A 5 , 1 6 ,2 9
V C C3
28 P D A 0 28 P D A 1 28 P D A 2
P DA 0 P DA 1 P DA 2 P D D0 P D D1 P D D2 P D D3 P D D4 P D D5 P D D6 P D D7 P D D8 P D D9 P DD10 P DD11 P DD12 P DD13 P DD14 P DD15
FLOPPY DISK INTERFACE
28 P D D R E Q 28 - P D D A C K 28 P I O R D Y 28 - P D I O R 28 - P D I O W 28 - P D C S 1 28 - P D C S 3
A11 T9 K19 K20 K17 K18 L16 L17 M19 L18 J19 L19 M18 L20 J20 M16 M20 H1 J4 J3 H3 G1 J2 H2 J5 K3 K1 L2 K5 J1 L1 K4 K2 R2 R3 P1 R1 L5 M4 M3 T1 M5 P2 P3 N1 N2 N3 N4 N5 M2
P P P P P P P P D0 D1 D2 D3 D4 D5 D6 D7
1
R264 T318 T259 T319 T260 T320 T321 T322 T323 T261 T324 T325 T326 T327 T328 T329 - RT S 1 T330 T331 T332 T333 T334 T335 T336 R271 M9 SEL T _ A L ERT T337 - OCCB - C O M1 P D P R T _ ON
2
1 0K
- C L K R U N 7 , 1 5 ,2 5 ,2 6 3 V S US D17
R 8 56 *10K
H : Ext Gfx L : Int. Gfx
2
1
1 SS355
- L ID
30 D18
M9 SEL R 8 57
H20 H19 J16 G17 F20 F18 F16 E19 D20 D18 B20 C20 D19 E18 E20 F17 F19 G16 G18 C17 B18 A18 E17 D17 C19 A20
SDA0 SDA1 SDA2 S D D0 S D D1 S D D2 S D D3 S D D4 S D D5 S D D6 S D D7 S D D8 S D D9 S DD10 S DD11 S DD12 S DD13 S DD14 S DD15
2
1
1SS355
R V CC3
*10K
2
R265 - R S MRS T C369
1
100K
R V CC3
1
2 4 .7 U /10V
High
V CC5 R266 2 .2 K T_ALERT Internal KEY PS2 MODE E n able internal K EY V CC5 R267 R268 R269 V CC5 R270 R272 T _ A L E RT 4 T264 R275 D IS P _ O N 8 V CC5 10K - I N IT 28 - S L IN 28 -STB 28 - A F D 28 S L CT 28 B U S Y 28 - A CK 28 - E R R 28 PE 28 V CC5 R273 R274 R276 R277 4 .7 K 1K 1K 1K 10K 10K *10K 10K 1K S B _ G P O3 4 - S B _LB D i s a b le C hip test mode A c t i v e h i g h t o p o we r -RTS1 C LK 3 2KO S B _ S PLED SB _SQWO - S B _PC S0 - S B _PC S1 - S B _ P CS 0 13 - S B _ P CS 1 13 C L K 3 2 K O 13 S B _ S P L E D 13 S I O B ase A D D R 0x3F0 3 2 K C L K T e s t Mo d e E n a b l e A T p o we r Mo d e P e n t i um II mode D i s a b l e 4 Mb F l a s h R OM m o d e G P I 2 4 , GP O3 0 f u n c t i o n s
Low
Internal KEY AT MODE D i sable internal K EY S I O B ase A D D R 0x370 3 2 K C L K T e s t Mo d e D i s a b l e A T X p o we r Mo d e P e n t i u m/K7 mode E n a b l e 4 M b F l a s h R OM m o d e I O C H R D Y,A EN functions
C
28 P D D [ 0 . . 1 5 ]
P D D [0 ..1 5]
28 S D D R E Q 28 - S D D A C K 28 S I O R D Y 28 - S D I O R 28 - S D I O W 28 - S D C S 1 28 - S D C S 3 28 S D A 0 28 S D A 1 28 S D A 2
SERIAL PORT INTERFACE
IDE INTERFACE
C
1535+
10K
A19 C18 B19 A17 D16 B16 E15 C15 A15 D14 E13 D13 E14 B15 D15 A16 C16 E16 B17
E n a b l e C hip test mode A c t i v e l o w t o p o we r
PRINTER PORT INTERFACE
V CC5 V CC5 V CC5
R278 R279 R280 R281
10K 10K 10K 10K
S B _ G P O2 9 AEN - R O MC S S B _ G P O3 5
S B _ GP O2 9 13 AEN 1 3 ,2 9
H , H N ormal operation
- R O M C S 1 3 ,2 9
F l a s h R OM m o d e selection
L,L L,H H,L L,L
R eserve E n a b l e 8 Mb F l a s h R OMs i ze D i s a b l e a l l F U N C i n t h i s C ON F I G E n a b l e L P C F l a s h R OM
D
D
I C M 1 5 3 5 A L I S B + S UP E R IO
28 S D D [ 0 . . 1 5 ]
S D D [0 ..1 5]
P D [ 0 . . 7 ] 28
T itle
QUANTA COMPUTER
1535+ 2/2
D o c u m e n t N u mb e r
Level 1 environment-related substances should NEVER be used. Molding resin, ink, paint