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A B C D E
CHIPSET P4M800_CE + VT8237_PLUS
M SI
MS-7211 Ver:0A TITLE SHEET
COVER SHEET 1
4
CPU: 4
BLOCK DIAGRAM 2
Intel Prescott LGA775 -Mainstream CPU
PWR And CLOCK Map 3
System Chipset: GPIO/MEMORY/PCI/HW STRPPING 4
North Bridge : VIA P4M800 Ver:CE PROCESSOR ( Intel LGA775) 5,6,7
South Bridge : VIA VT8237R Plus
NORTH BRIDGE P4M800_CE 8,9,10,11
On Board Chipset: DIMM1&2 12
LPC Super I/O -- W83627EHF
DIMM1&2 Terminations 13
LAN --- RTL 8100C (10/100) / 8110SB (Giga)
AC'97 Codec --Realtek ALC655 AGP SLOT 14
BIOS --LPC FLASH ROM VGA Connector 15
Clock Generator RTM862-520 / ICS950917AF 16
3
CLOCK Chip : 3
CLOCK Generator -- Realtek RTM862-520 SOUTH BRIDGE (VT8237R Plus) 17,18,19
/ ICS ICS950917AF PCI Slot 1 & 2 20
Main Memory: Realtek 8100C/8110SB 21
DDR * 2 (Max 2GB) 22
Super I/O & FAN 83627EHF-D
AC97 Realtek ALC655 23
Expansion Slots:
PCI 2.3 SLOT * 2 IDE Connectors , KB/MS 24
USB Connectors 25
PWM:
VRM10.1 Intersil 6566 3Phase COM / Parallel Port 26
MS7 ACPI Controller 27
2 VRM 10.1 - Intersil 6566_3 Phases 28 2
ATX & F_Panel & BIOS 29
PCB Components & EMI 30
1 1
MICRO-START INT'L CO.,LTD.
Title
C O VER SHEET
S ize D o c u m e n t Number Rev
Custom M S-7211 0A
Date: Thursday, July 28, 2005 S h eet 1 of 32
A B C D E
1
Block Diagram
mainstream
VRM 10.1 TDP=84W
Intersil 6566 Intel Prescott Processor-LGA775 Iccmax=78A
Icctdc=68A
3Phase
FSB
2X/4X/8X
AGP 1.5V 64bit DDR
Connector P4M800_CE 2 DDR
DIMM
VCORE= +2.5VNB
VDIMM= +2.5VDIMM
Modules
VDDQ= +1.5VAGP
VLINK= +2.5V
V-Link/8bits/S533M
UltraDMA 33/66/100 PCI CNTRL
IDE Primary
PCI Slot 1
PCI Slot 2
IDE Secondary PCI ADDR/DATA
VT8237_PLUS
USB Port 0 PCI
A VCC25= +2.5V
VCC33= +3.3V
LAN A
USB Port 1 Realtek
8100C/8110SB
USB Port 2 USB
LPC Bus
USB Port 3
USB Port 4
LPC SIO
USB Port 5 W inbond
83627EHF
USB Port 6
USB Port 7
AC'97 Link LPC FLASH Serial
FDD Parallel
AC'97 Codec ROM X2
SATA prot1 and KEYBOARD
port2
MOUSE
MICRO-START INT'L CO.,LTD.
Title
BLOCK DIAGRAM
Size D o cument Number Rev
Custom MS-7211 0A
Date: Thursda y, July 28, 2005 Sheet 2 of 32
1
8 7 6 5 4 3 2 1
P4M800_CE PLATFORM POWER DELIVERY MAP
P4M800 PLATFORM CLOCK GENERATOR MAP 3.3V 5V 5VSB 12V
PROCESSOR VCCP 1.2V~1.425V
VRM
D PROCESSOR 1.2V D
Intel LGA775 Processor
1.2V VREG
CPU HOST AGP SLOT 1.5V
CLK
2.5V VREG
GUICK NB GCLK_NB 66MHz NORTH BRIDGE VCCP
DCLKO
P4M800_CE 1.5V VREG NORTH BRIDGE VCC_AGP
DCLKI
NORTH BRIDGE +2.5V 3A
CLOCK GENERATOR
3VSB VREG NORTH BRIDGE SYSEM MEMORY
VCC_DDR
MEM CLK 2 DDR DIMM
0~5/CLK#0~5
Modules DDR 2.5V DDR DIMM1 / DIMM2 / DIMM3 2.5V
VREG
C 14.318MHZ SB14MHz VTT 1.25V DDR VTT 1.25V C
VREG
33MHz APIC
VCLK
48MHZ USB VT8237R_PLUS 2.5V VREG
SOUTH BRIDGE +2.5V 550mA Vlink=70mA
150mA
SOUTH BRIDGE VCC3
SPCLK
2.5VSB 10mA
SOUTH BRIDGE RESUME 2.5V_SB
VREG
FWH_CLK FWH 120mA
SOUTH BRIDGE RESUME VCC3_SB
SOUTH BRIDGE RTC 3.3V
PCI CLK 1~2 PCI Slot 1~2
LAN VCC3_SB
Realtek 8100C/8110SB
25MHZ from Crystal
B FWH 3.3V B
SIOPCLK LPC SIO
Winbond LPC SUPER I/O 3.3V
SIO48MHZ 83627EHF-E
LPC SUPER I/O VCC5
AC97XIN CK-409 3.3V
AL C655
AGP CLK AC97 VDD5 AC97 VDD5
AGP SLOT VREG
+12V : 0.1U 25V X 5
A +12V_MOS: 4.7U 35V X 1 A
1U 16V X 2
1000U 16V X 4
MICRO-START INT'L CO.,LTD.
Title
PWR And CLOCK Map
Size Document Number Rev
Custom MS-7211 0A
Date: Thursday, July 28, 2005 Sheet 3 of 32
8 7 6 5 4 3 2 1
1
VT8237R_PLUS GPIO Function Define
Default Default
PIN NAME Function Function define PIN NAME Function Function define USB Port DATA +/- OC#
GPI0
GPO0 (VDDS) GPO0 4.7K ohm Pull up to VCC3_SB (VBAT) GPI0 1M ohm Pull up to VBAT USB1-
I1394_USB1 USB1+
GPI1 USB0-
GPO1(VDDS) GPO1 4.7K ohm Pull up to VCC3_SB (VSUS3) GPI1 ATADET0=>Detect IDE1 ATA100/66 USB0+ OC#1
Rear
GPO2/SUSA# GPI2/EXTSMI# ( OC#0~3 )
(VDDS) SUSA# 4.7K ohm Pull up to VCC3_SB (VSUS3) EXTSMI# 4.7K ohm Pull up to VCC3_SB USB2-
LAN_USB1 USB2+
GPI3/RING# USB3-
GPO3/SUSST#(VDDS) SUSST# 4.7K ohm Pull up to VCC3_SB (VSUS3) RING# RING# 4.7K ohm Pull up to VCC3_SB USB3+
GPI4/LID#
GPO4/SUSCLK(VDDS) SUSCLK 4.7K ohm Pull up to VCC3_SB (VSUS3) LID# ATADET1=>Detect IDE2 ATA100/66 USB4-
JUSB1 USB4+
USB6-
GPO5/CPUSTP# CPUSTP# 4.7K ohm Pull up to VCC3 GPI5/BATLOW# (VDDS) BATLOW# 4.7K ohm Pull up to VCC3_SB USB6+
Front OC#4
GPO6/PCISTP# PCISTP# 4.7K ohm Pull up to VCC3 GPI6/AGPBZ AGPBZ 4.7K ohm Pull up to VCC3 USB5- ( OC#4~7 )
JUSB2 USB5+
USB7-
GPO7/GNT5 GPO7 8.2K ohm Pull up to VCC3 GPI7/REQ5 GPI7 8.2K ohm Pull up to VCC3 USB7+
* GPO8/GPI8/VGATE GPI8 4.7K ohm Pull up to VCC3 * GPI8/VGATE GPI8 4.7K ohm Pull up to VCC3
* GPO9/GPI9/UDPWREN UDPWREN NC * GPI9/UDPWREN UDPWREN NC PCI RESET DEVICE
* GPO10/GPI10/PICD0 GPI10 1K ohm Pull up to VCC3 * GPI10/PICD0 GPI10 1K ohm Pull up to VCC3 Signals Target
PCIRST#1 PCI slot 1-2
* GPO11/GPI11/PICD1 GPI11 1K ohm Pull up to VCC3 * GPI11/PICD1 GPI11 1K ohm Pull up to VCC3 PCIRST#2 NB , Super I/O , LPC, LAN
* GPO12/GPI12/INTE# GPI12 8.2K ohm Pull up to VCC3 * GPI12/INTE# GPI12 8.2K ohm Pull up to VCC3 HD_RST# Primary, Scondary IDE
* GPO13/GPI13/INTF# GPI13 8.2K ohm Pull up to VCC3 * GPI13/INTF# GPI13 8.2K ohm Pull up to VCC3
DDR DIMM Config.
* GPO14/GPI14/INTG# GPI14 8.2K ohm Pull up to VCC3 * GPI14/INTG# GPI14 8.2K ohm Pull up to VCC3
* GPO15/GPI15/INTH# GPI15 8.2K ohm Pull up to VCC3 * GPI15/INTH# GPI15 8.2K ohm Pull up to VCC3 DEVICE ADDRESS CLOCK
GPO20/GPI20
/ACSDIN2/PCS0#
GPI20/ACSDIN2
4.7K ohm Pull down
GPI16/INTRUDER#
INTRUDER# 1M ohm Pull up to VBAT DCLKA0/MDCLKA#0
(VBAT)
GPO21/GPI21/ACSDIN3 GPI21/ACSDIN3 DIMM 1 1010000B DCLKA1/MDCLKA#1
/PCS1#/SLPBTN# 4.7K ohm Pull down GPI17/CPUMISS CPUMISS 4.7K ohm Pull up to VCC3_SB DCLKA2/MDCLKA#2
DCLKA3/MDCLKA#3
A A
GPO22/GPI22/GHI# GPI22 4.7K ohm Pull up to VCC3 GPI18/AOLGP1/THRM# AOLGP1 4.7K ohm Pull up to VCC3_SB
DIMM 2 1010001B DCLKA4/MDCLKA#4
GPO23/GPI23/DPSLP GPI23 4.7K ohm Pull up to VCC3 GPI19/APICCLK APICCLK APICCLK DCLKA5/MDCLKA#5
GPO24/GPI24 /GPIOA GPI24 BSEL1
GPO25/GPI25 /GPIOB GPI25 4.7K ohm Pull down
PCI Config.
GPO26/GPI26/SMBDT2
(VDDS) SMBDT2 2.7K ohm Pull up to VCC3_SB DEVICE MCP1 INT Pin REQ#/GNT# IDSEL CLOCK CLK GEN PIN OUT
GPO27/GPI27/SMBCK2 PCI Slot 1 PIRQ#B PCIREQ#1 AD19 PCI_CLK1 14
(VDDS) SMBCK2 2.7K ohm Pull up to VCC3_SB PIRQ#C PCIGNT#1
GPO28/GPI28/VIDSEL
GPO28
/VIDSEL SATA_LED PIRQ#D
GPO29 PIRQ#A
GPO29/GPI29/VRDSLP /VRDSLP 4.7K ohm Pull down PCI Slot 2 PIRQ#C PCIREQ#2 AD20 PCI_CLK2 15
GPO30/GPI30 /GPIOC GPI30 BSEL0 PIRQ#D PCIGNT#2
PIRQ#A
GPO31/GPI31 /GPIOD GPI31 4.7K ohm Pull down PIRQ#B
PIRQ#E AD17 LAN_CLK 11
PCIREQ#0
LAN 8110SB PCIGNT#0
MICRO-START INT'L CO.,LTD.
Title
GPIO/MEMORY/PCI/HW STRPPING
Size D o cument Number Rev
Custom
MS-7211 0A
Date: Thursday, July 28, 2005 Sheet 4 of 32
1
8 7 6 5 4 3 2 1
CPU SIGNAL BLOCK
VCC_V RM_SENSE [28]
VSS_VRM _SENSE [28]
TP3
VID[0..5] [28]
[8] HA#[3..33]
D D
V ID5
V ID4
V ID3
V ID2
V ID1
V ID0
HA#33
HA#32
HA#21
HA#20
HA#19
HA#10
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
HA#9
AM7
AM5
AM3
AM2
AG5
AG4
AG6
AH5
AH4
AC5
AD6
AC2
AN3
AN4
AN5
AN6
AB4
AB5
AA5
AA4
AB6
AK3
AK4
AF4
AF5
AL4
AL6
AL5
AJ6
AJ5
AJ3
W6
W5
M4
M5
U4
U5
U6
R4
Y4
Y6
V4
V5
P6
T4
T5
L4
L5
U5A
R32 62R0402
ITP_CLK1
ITP_CLK0
DBR#
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
A16#
A15#
A14#
A13#
A12#
A11#
A10#
A9#
A8#
A7#
A6#
A5#
A4#
A3#
VID7#
VID6#
VID5#
VID4#
VID3#
VID2#
VID1#
VID0#
VCC_SENSE
RSVD
RSVD
VSS_SENSE
H DBI#0 A8
[8] HDBI#[0..3] DBI0#
H DBI#1 G11
H DBI#2 DBI1#
D19 AN7
H DBI#3 DBI2# VID_SELECT CPU_GTLRE F0
C20 H1 CPU_G TLREF0 [6]
DBI3# GTLREF0 CPU_GTLRE F1
H2 CPU_G TLREF1 [6]
-EDRDY GTLREF1 GTLREF_SEL
TP14 F2 H29 TP8
IERR# EDRDY# GTLREF_SEL
[6] IERR# AB2
IERR# H_BPM#5 RN3A
AB3 AG3 2 1 VTT_OU T_RIGHT
MCERR# BPM5# H_BPM#4 RN4B 8P4R-51R
[6,19] FERR# R3 AF2 4 3
FERR#/PBE# BPM4# H_BPM#3 RN4D 8P4R-51R
[19] STP CLK# M3 AG2 8 7
STPCLK# BPM3# H_BPM#2 RN6C 8P4R-51R
AD3 AD2 6 5
BINIT# BPM2# H_BPM#1 RN3B 8P4R-51R
[19] HINIT# P3 AJ1 4 3
INIT# BPM1# H_BPM#0 RN3C 8P4R-51R
H4 AJ2 6 5
RSP# BPM0#
[8] HDB SY# B2 G5 TP9
DBSY# PCREQ# H REQ#4
[8] HDRDY# C1 J6 HREQ#[0..4] [8]
DRDY# REQ4# H REQ#3
[8] HTRDY# E3 K6
TRDY# REQ3# H REQ#2
M6
REQ2# H REQ#1
[8] HADS# D2 J5
ADS# REQ1# H REQ#0
[8] HLOCK# C3 K4
LOCK# REQ0#
[8] HBNR# C2
C BNR# H_TESTHI12 R50 62R C
[8] HIT# D4 W2
HIT# TESTHI12 H_TESTHI11 RN13A 1 8P4R-62R
[8] HITM# E4 P1 2
HITM# TESTHI11 H_TESTHI10 RN13B 3 8P4R-62R
[8] HBPRI# G8 H5 4
VTT_OU T_RIGHT BPRI# TESTHI10 H_TESTHI9 RN13D 7 8P4R-62R
[8] HDE FER# G7 G4 8
DEFER# TESTHI9 H_TESTHI8 RN13C 5 8P4R-62R
G3 6 VTT_OUT_ LEFT
RN6B 8P4R-51R H_ TDI AD1 TESTHI8
3 4 F24
RN4A 8P4R-51R H _TDO AF1 TDI TESTHI7
1 2 G24
RN6A 8P4R-51R H_TMS AC1 TDO TESTHI6
1 2 G26
RN4C 8P4R-51R H_TRS T#AG1 TMS TESTHI5
5 6 G27
RN6D 8P4R-51R H_TCK AE1 TRST# TESTHI4
7 8 G25
TCK TESTHI3 H_TESTHI2 _7 R84 62R
[22] CPU _TMPA AL1 F25 V_FSB_V TT
THERMDA TESTHI2 H_TESTHI1 R55 62R
[22] VTIN_GND AK1 W3
THERMDC TESTHI1 H_TESTHI0 R85 62R
[6,29] THERMTRIP# M2 F26
THERMTRIP# TESTHI0 RSVD_AK6 R44 X_62R
[18] CPUMISS AE8 AK6 VTT_OU T_RIGHT
GND/SKTOCC# RSVD RSVD_G6 R74 X_62R
[6] PRO CHOT# AL2 G6
PROCHOT# RSVD