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AN526
PIC16C5X / PIC16CXXX Math Utility Routines
Author: Amar Palacherla Microchip Technology Inc.
TABLE 1: PERFORMANCE SPECS
Spec Speed Efficient Code Efficient Program Memory 35 16 Instruction Cycles 37 71
PLEASE NOTE: This application note uses the old Microchip Math Routine format. It is intended for reference purposes only and is being provided for those of you still implementing Binary Coded Decimal(BCD) routines. For any new designs, please refer to application notes contained in Microchip's Embedded Control Handbook Volume II - Math Library.
FIGURE 1: Flowchart for Unsigned 8x8 Multiply
8x8 Multiply
INTRODUCTION
This application note provides some utility math routines for Microchip's PIC16C5X and PIC16CXXX series of 8-bit microcontrollers. The following math outlines are provided: · · · · · · · · · · 8x8 unsigned multiply 16x16 double precision multiply Fixed Point Division (Table 3) 16x16 double precision addition 16x16 double precision subtraction BCD (Binary Coded Decimal) to binary conversion routines Binary to BCD conversion routines BCD addition BCD subtraction Square root
Count = 8
H_Byte = L_Byte = 0
W Multiplicand Clear Carry Bit
Rotate Right Multiplier Thru Carry
Carry = 1? H_Byte = H_Byte + W
These are written in native assembly language and the listing files are provided. They are also available on a disk (MS-DOS®). All the routines provided can be called as subroutines. Most of the routines have two different versions: one optimized for speed and the other optimized for code size. The calling sequence of each routine is explained at the beginning of each listing file.
Rotate Right H_Byte
Rotate Right L_Byte
SINGLE PRECISION UNSIGNED MULTIPLICATION (8x8)
This routine computes the product of two 8-bit unsigned numbers and produces a 16-bit result. Two routines are provided: one routine is optimized for speed (by writing a straight line code) and the other routine has been written to reduce the code size (a looped code). The listing of these routines are given in Appendices A and B. The performance specs for the routines are shown in Table 1. MS-DOS is a registered trademark of Microsoft Corporation.
© 1997 Microchip Technology Inc.
Count = Count - 1
Carry = 0?
Return
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DOUBLE PRECISION MULTIPLY
This routine computes the product of two 16-bit numbers and produces a 32-bit result. Both signed and unsigned arithmetic are supported. Two routines are provided: one routine is optimized for speed (by writing a straight line code) the other routine has been written to reduce code size (a looped code). The listing of these routines are given in Appendices C and D. The performance specs for routines are shown in Table 2. of the dividend, the divisor is subtracted and the corresponding quotient bit as well as the next add or subtract operation is determined by the carry bit [1]. Unfortunately, no simple method exists for performing two's complement binary division, thereby requiring negate operations during a preprocessing phase. It is important to note that with the dividend initially loaded into the accumulator, an overflow of the final quotient will result if the high half of the dividend is greater than or equal to the divisor [1], indicating that the n-bit range of the quotient will be exceeded. Because of the inherent byte structure of the PICmicroTM family of microcontrollers, a more creative and efficient implementation of the above algorithms is possible. In what follows, partial remainder is initialized at zero and is separated from the dividend, thereby avoiding any alignment logic overhead and yielding a quotient with the same number of bits as the dividend and a remainder with the same number as the divisor. Furthermore, routines are named in format FXDxxyyz, where xx is the number of bits in the dividend, yy is the number of bits in the divisor, and z indicates a signed or unsigned routine. Macros are used for core sections of each routine, thereby permitting simple switching between restoring and nonrestoring methods. The signed macros are exclusively a variation of the nonrestoring method, taking advantage of the zero MSb of the arguments after the preprocessing negation. Both restoring and nonrestoring macros are included for the unsigned case, with selection based on best worst case or best average performance as desired. For example, the unsigned macros exhibit the following performance data: # of Cycles (TCY) 32/16 restore nonrestore max. ave. max. ave. 561 481 481 466 16/16 240 208 240 233 16/8 193 173 190 183
TABLE 2: PERFORMANCE SPECS
Spec Speed Efficient Code Efficient Program Memory 240 33 Instruction Cycles 233 333
The code in Appendices C and D has been setup for unsigned arithmetic and the performance specs in the table above is for unsigned arithmetic. If signed arithmetic is desired, edit the line with "SIGNED equ FALSE" to "SIGNED equ TRUE" then re-assemble the code. In case of signed multiply, both operands are assumed to be 16-bit 2's complement numbers. Conditional assembly is supported by MPASM. If you have an older version, please contact the Microchip Technology sales office nearest you.
DOUBLE PRECISION DIVISION
Fixed Point Divide Routines
Fixed point division is fundamentally a conditional shift and subtract operation, resulting in a quotient and a remainder, with standard methods related to simple binary long division by hand calculation. Typically, a processor with n-bit operands uses a fixed accumulator of 2n bits containing the dividend. In standard restoring division, the dividend is left shifted by one bit and the divisor is subtracted from the high half of the accumulator, referred to as the partial remainder. If the result is positive, the divisor was less than or equal to the partial remainder and the corresponding quotient bit in the LSb of the accumulator is set to one. If the result is negative, the divisor was greater than the partial remainder and the dividend is restored by adding back the divisor to the high half of the accumulator and setting the LSb to zero. This process is repeated for each of the n bits in the divisor, resulting in an n-bit quotient in the low half of the accumulator and the n-bit remainder in the high half, and requiring n subtractions and on average n/2 additions [1]. Nonrestoring division, requiring a total of at most n+1 subtractions and additions, offers potential for speed improvement by allowing a negative partial remainder during the calculation with a final addition of the divisor if the final remainder is negative. After the first left shift
This demonstrates that while the nonrestoring algorithm is preferred for the 32/16 case, the restoring method is preferred for the 16/16 case, with the choice for the 16/8 case a function of user requirements. These optimization complications are a result of trade-offs between the number of instructions required for the restore operations verses the added logic requirements. Finally, additional routines with tacit MSb equal to zero in each argument are included, yielding significant speed improvement. These routines can also be called in the signed case when the arguments are known to be positive for a small benefit.
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Routines
It is useful to note that the additional routines FXD3115U, FXD1515U, and FXD1507U can be called in a signed divide application in the special case where AARG > 0 and BARG > 0, thereby offering some improvement in performance.
References
1. 2. 3. Cavanagh, J.J.F., "Digital Computer Arithmetic," McGraw-Hill,1984. Hwang, K., "Computer Arithmetic," John Wiley & Sons, 1979. Scott, N.R., "Computer Number Systems & Arithmetic," Prentice Hall, 1985.
Data RAM Requirements
The following contiguous data RAM locations are used by the fixed point divide routines: ACC+B0 ACC+B1 ACC+B2 ACC+B3 ACC+B4 ACC+B5 SIGN BARG+B0 BARG+B1 TEMP+B0 TEMP+B1 = = = = = = AARG+B0 AARG+B1 AARG+B2 AARG+B3 REM+B0 REM+B1 AARG and ACC
remainder sign in MSb BARG temporary storage
where Bx = x.
TABLE 3: Fixed Point Divide Routines
Routine FXD3216S FXD3216U FXD3215U FXD3115U FXD1616S FXD1616U FXD1615U FXD1515U FXD1608S FXD1608U FXD1607U FXD1507U Cycles 414 485 390 383 214 244 197 191 146 196 130 125 32-bit/16-bit -> 32-bit/16-bit -> 32-bit/15-bit -> 31-bit/15-bit -> 16-bit/16-bit -> 16-bit/16-bit -> 16-bit/15-bit -> 15-bit/15-bit -> 16-bit/08-bit -> 16-bit/08-bit -> 16-bit/07-bit -> 15-bit/07-bit -> Function 32.16 signed fixed point divide 32.16 unsigned fixed point divide 32.15 unsigned fixed point divide 31.15 unsigned fixed point divide 16.16 signed fixed point divide 16.16 unsigned fixed point divide 16.15 unsigned fixed point divide 15.15 unsigned fixed point divide 16.08 signed fixed point divide 16.08 unsigned fixed point divide 16.07 unsigned fixed point divide 15.07 unsigned fixed point divide
© 1997 Microchip Technology Inc.
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TABLE 4: PIC16CXXX Fixed Point Divide Performance Data
Routine 16 / 8 Signed 16 / 8 Unsigned 16 / 7 Unsigned 15 / 7 Unsigned 16 / 16 Unsigned 16 / 16 Unsigned 16 / 15 Unsigned 16 / 15 Unsigned 32 / 16 Unsigned 32 / 16 Unsigned 32 / 15 Unsigned 31 / 15 Unsigned Max. Cycles 146 196 130 125 214 244 197 191 414 485 390 383 Min. Cycles 135 156 130 125 187 180 182 177 363 459 359 353 Program Memory 146 195 129 124 241 243 216 218 476 608 451 442 Data Memory 5 4 4 4 7 6 6 6 9 9 8 8
DOUBLE PRECISION ADDITION & SUBTRACTION
This routine adds or subtracts two 16-bit numbers and produces a 16-bit result. This routine is used by other double precision routines. The listing of these routines is given in Appendix E. The performance specs for the routines are shown below:
BCD TO BINARY CONVERSION
This routine converts a five digit BCD number to a 16-bit binary number. The listing of this routine is given in Appendix F. The performance spec for the routine is shown below:
TABLE 6: PERFORMANCE SPECS
Spec BCD to Binary Program Memory 30 Instruction Cycles 121
TABLE 5: PERFORMANCE SPECS
Spec Addition Subtraction Program Memory 7 14 Instruction Cycles 8 17
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BINARY TO BCD CONVERSION
Two routines are provided: one routine converts a 16-bit binary number to a five-digit BCD number and the other routine converts an 8-bit binary number to a two-digit BCD number. The listing of these routines are given in Appendices G and H. The performance specs for the routines are shown below:
BCD ADDITION & SUBTRACTION
These two routines perform a two-digit unsigned BCD addition and subtraction. The results are the sum (or difference) in one file register and with a overflow carry-bit in another file register. The performance specs for the routines are shown below:
TABLE 8: PERFORMANCE SPECS
Spec Program Memory Instruction Cycles 29 31 23 (Worst Case) 21 (Worst Case)
TABLE 7: PERFORMANCE SPECS
Spec Binary (8-Bit) to BCD Binary (16-Bit) to BCD Program Memory 10 30 Instruction Cycles 81 (Worst Case) 719 BCD Addition BCD Subtraction
FIGURE 2: Flowchart for Binary to BCD Conversion
Binary to BCD Count = 16 R0 = 0, R1 = 0, R2 = 0 Shift S0, S1 Left into R0, R1, R2 (One Bit) Binary to BCD Conversion In: BCD #In R0, R1, R2 Out: Binary #In S0, S1 BCD MSD LSD R0, R1, R2 MSD LSD
The listing files for the above two routines are given in Appendices J and K. The flow charts for BCD addition and BCD subtraction are given in Figure 3 and Figure 4, respectively.
FIGURE 3: Flowchart for BCD Addition
Unsigned BCD Addition Perform Binary Addition
S0, S1 Yes
Carry = 0 ? N Adjust BCD Adjust R2 Adjust BCD Adjust R1 Adjust BCD Adjust R0
Y
R0 = MSD R2 = LSD S0 = High Order Byte S1 = Low Order Byte Return
DC = 1? No
LSD > 9? No
Yes
Add 6 to LSD Yes
CY = 1? No
Adjust BCD
FSR = 2 Digit BCD # Y LSD = LSD + 3 MSD > 9? No Yes
LSD +3>7 N
Add 6 to LSD
RETURN MSD +3>7 N Return Y MSD = MSD + 3
© 1997 Microchip Technology Inc.
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FIGURE 4: Flowchart for BCD Subtraction
U BCD SUB
SQUARE ROOT
Often in many applications one needs to find the square root of a number. Of many numerical methods to find the square root of a number, the Newton-Raphson method is very attractive because of its fast convergence rate. In this method the square root of a number, "N", is obtained from the approximate solution of: f(Y) = Y2 N = 0 The function "f(Y)" can be expanded about Y0 using first order Taylor polynomial expansion as:
Equation 1: f(Y) = f (Y0) + (Y Y0) f'(Y0) + (Y Y0) 2f" (Y0) / 2 ! + ....
Do 2's Complement Binary Addition
DC = 0 ? N
Y
If X is a root of f(Y), then f(X) = 0: LSD > 9 ? N Y
f(X) = f(Y0) + (x Y0) f' (Y0) + (X - Y0) 2f" (Y0) / 2 ! + ... = 0
Subtract 6 from LSD Y N
If Y0 is an approximate root of f(Y), then higher order terms are negligible. Therefore:
Equation 2: f(Y0) + (X Y0) f' (Y0) [i.e., X = Y0 f(Y0) / f' (Y0)]
CY = 0 ?
Thus, X is a better approximation for Y0. From this, the sequence {Xn} can be generated:
Equation 3: Xn = Xn 1 f(Xn 1) / f' (Xn 1), n 1
From equation 1 and equation 3 we get,
Equation 4: Xn = 0.5* {Xn 1 + N/Xn 1}
MSD > 9 ? N Return
Y
The initial approximate root of N is taken to be N/2. If the approximate range of N is known a priori, then the total number of iterations may be cut down by starting with a better approximate root than N/2. Subtract 6 from MSD This program, as listed in Appendix K, computes the square root of a 16-bit number. This routine uses double precision math routines (division and addition) as described in the previous pages of this application note. The divide routines are integrated into the source listing. For fixed point divide routines, see Appendices L - O.
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Please check the Microchip BBS for the latest version of the source code. Microchip's Worldwide Web Address: www.microchip.com; Bulletin Board Support: MCHIPBBS using CompuServe® (CompuServe membership not required).
APPENDIX A:
MPASM 01.40 Released MULT8X8S.ASM 1-16-1997 12:54:42 PAGE 1
LOC OBJECT CODE VALUE
LINE SOURCE TEXT
00000009 00000010 00000012 00000013 00000014
00000001
0000 0001 0002 0003 0004 0005 0006 0007 0008 0009
0072 0073 0C08 0034 0209 0403 0330 0603 01F2 0332
00001 00002 00003 00004 00005 00006 00007 00008 00009 00010 00011 00012 00013 00014 00015 00016 00017 00018 00019 00020 00021 00022 00023 00024 00025 00026 00027 00028 00029 00030 00031 00032 00033 00034 00035 00036 00001 00002 00224 00037 00038 00039 00040 00041 00042 00043 00044 00045 00046 00047 00048 00049 00050 00051
LIST P = 16C54, n = 66 ; ;******************************************************************* ; 8x8 Software Multiplier ; ( Code Efficient : Looped Code ) ;******************************************************************* ; ; The 16 bit result is stored in 2 bytes ; ; Before calling the subroutine " mpy ", the multiplier should ; be loaded in location " mulplr ", and the multiplicand in ; " mulcnd " . The 16 bit result is stored in locations ; H_byte & L_byte. ; ; Performance : ; Program Memory : 15 locations ; # of cycles : 71 ; Scratch RAM : 0 locations ; ; ; Program: MULT8x8S.ASM ; Revision Date: ; 1-13-97 Compatibility with MPASMWIN 1.40 ; ; This routine is optimized for code efficiency (looped code) ; For time efficiency code refer to "mult8x8F.asm"(straight line code) ;******************************************************************* ; mulcnd equ 09 ; 8 bit multiplicand mulplr equ 10 ; 8 bit multiplier H_byte equ 12 ; High byte of the 16 bit result L_byte equ 13 ; Low byte of the 16 bit result count equ 14 ; loop counter ; ; include "p16c5x.inc" LIST ;P16C5X.INC Standard Header File, Ver. 3.30 Microchip Technology, Inc. LIST Same equ 1
; ; ***************************** Begin Multiplier Routine mpy_S clrf H_byte clrf L_byte movlw 8 movwf count movf mulcnd,W bcf STATUS,C ; Clear the carry bit in the status Reg. loop rrf mulplr, F btfsc STATUS,C addwf H_byte,Same rrf H_byte,Same
© 1997 Microchip Technology Inc.
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000A 0333 000B 02F4 000C 0A06 00052 rrf L_byte,Same 00053 decfsz count, F 00054 goto loop 00055 ; 000D 0800 00056 retlw 0 00057 ; 00058 ;******************************************************************** 00059 ; Test Program 00060 ;********************************************************************* 000E 0CFF 00061 main movlw 0FF 000F 0030 00062 movwf mulplr ; multiplier (in mulplr) = 0FF 0010 0CFF 00063 movlw 0FF ; multiplicand(W Reg ) = 0FF 0011 0029 00064 movwf mulcnd 00065 ; 0012 0900 00066 call mpy_S ; The result 0FF*0FF = FE01 is in locations 00067 ; ; H_byte & L_byte 00068 ; 0013 0A13 00069 self goto self 00070 ; 01FF 00071 org 01FF 01FF 0A0E 00072 goto main 00073 ; 00074 END MEMORY USAGE MAP (`X' = Used, `-' = Unused) 0000 : XXXXXXXXXXXXXXXX XXXX------------ ---------------- ---------------01C0 : ---------------- ---------------- ---------------- ---------------X All other memory blocks unused. Program Memory Words Used: Program Memory Words Free: Errors : Warnings : Messages : 0 0 reported, 0 reported, 21 491
0 suppressed 0 suppressed
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© 1997 Microchip Technology Inc.
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Please check the Microchip BBS for the latest version of the source code. Microchip's Worldwide Web Address: www.microchip.com; Bulletin Board Support: MCHIPBBS using CompuServe® (CompuServe membership not required).
APPENDIX B:
MPASM 01.40 Released MULT8X8F.ASM 1-16-1997 12:54:10 PAGE 1
LOC OBJECT CODE VALUE
LINE SOURCE TEXT
00000009 00000010 00000012 00000013
00000001
0000 0072 0001 0073
00001 00002 00003 00004 00005 00006 00007 00008 00009 00010 00011 00012 00013 00014 00015 00016 00017 00018 00019 00020 00021 00022 00023 00024 00025 00026 00027 00028 00029 00030 00031 00032 00033 00034 00035 00001 00002 00224 00036 00037 00038 00039 00040 00041 00042 00043 00044 00045 00046 00047 00048 00049 00050 00051
LIST P = 16C54, n = 66 ; ;******************************************************************* ; 8x8 Software Multiplier ; ( Fast Version : Straight Line Code ) ;******************************************************************* ; ; The 16 bit result is stored in 2 bytes ; ; Before calling the subroutine " mpy ", the multiplier should ; be loaded in location " mulplr ", and the multiplicand in ; " mulcnd " . The 16 bit result is stored in locations ; H_byte & L_byte. ; ; Performance : ; Program Memory : 35 locations ; # of cycles : 37 ; Scratch RAM : 0 locations ; ; ; Program: MULT8x8F.ASM ; Revision Date: ; 1-13-97 Compatibility with MPASMWIN 1.40 ; ; This routine is optimized for speed efficiency (straight line code) ; For code efficiency, refer to "mult8x8S.asm" (looped code) ;******************************************************************* ; mulcnd equ 09 ; 8 bit multiplicand mulplr equ 10 ; 8 bit multiplier H_byte equ 12 ; High byte of the 16 bit result L_byte equ 13 ; Low byte of the 16 bit result ; ; include "p16c5x.inc" LIST ; P16C5X.INC Standard Header File, Ver. 3.30 Microchip Technology, Inc. LIST Same ; ;**** ; mult equ 1
Define a macro for adding & right shifting MACRO btfsc addwf rrf rrf ENDM bit mulplr,bit H_byte,Same H_byte,Same L_byte,Same ; Begin macro
**
; End of macro ; ; ***************************** Begin Multiplier Routine mpy_F clrf H_byte clrf L_byte
© 1997 Microchip Technology Inc.
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0002 0209 0003 0403 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F 0010 0011 0012 0013 0014 0015 0016 0017 0018 0019 001A 001B 001C 001D 001E 001F 0020 0021 0022 0023 0610 01F2 0332 0333 0630 01F2 0332 0333 0650 01F2 0332 0333 0670 01F2 0332 0333 0690 01F2 0332 0333 06B0 01F2 0332 0333 06D0 01F2 0332 0333 06F0 01F2 0332 0333 00052 00053 00054 M M M M 00055 M M M M 00056 M M M M 00057 M M M M 00058 M M M M 00059 M M M M 00060 M M M M 00061 M M M M 00062 00063 00064 00065 00066 00067 00068 00069 00070 00071 00072 00073 00074 00075 00076 00077 00078 00079 00080 00081 movf bcf mult btfsc addwf rrf rrf mult btfsc addwf rrf rrf mult btfsc addwf rrf rrf mult btfsc addwf rrf rrf mult btfsc addwf rrf rrf mult btfsc addwf rrf rrf mult btfsc addwf rrf rrf mult btfsc addwf rrf rrf ; retlw 0 ; ;******************************************************************** ; Test Program ;********************************************************************* main movlw 0FF movwf mulplr ; multiplier (in mulplr) = 0FF movlw 0FF movwf mulcnd ; multiplicand(in mulcnd) = 0FF ; call mpy_F ; The result 0FF*0FF = FE01 is in locations ; ; H_byte & L_byte ; self goto self ; org 01FF goto main ; END `-' = Unused) mulcnd,W ; move the multiplicand to W reg. STATUS,C ; Clear the carry bit in the status Reg. 0 mulplr,0 H_byte,Same H_byte,Same L_byte,Same 1 mulplr,1 H_byte,Same H_byte,Same L_byte,Same 2 mulplr,2 H_byte,Same H_byte,Same L_byte,Same 3 mulplr,3 H_byte,Same H_byte,Same L_byte,Same 4 mulplr,4 H_byte,Same H_byte,Same L_byte,Same 5 mulplr,5 H_byte,Same H_byte,Same L_byte,Same 6 mulplr,6 H_byte,Same H_byte,Same L_byte,Same 7 mulplr,7 H_byte,Same H_byte,Same L_byte,Same
0024 0800
0025 0026 0027 0028
0CFF 0030 0CFF 0029
0029 0900
002A 0A2A 01FF 01FF 0A25
MEMORY USAGE MAP (`X' = Used,
0000 : XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXX----- ----------------
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01C0 : ---------------- ---------------- ---------------- ---------------X All other memory blocks unused. Program Memory Words Used: Program Memory Words Free: 44 468
Errors : Warnings : Messages :
0 0 reported, 0 reported,
0 suppressed 0 suppressed
© 1997 Microchip Technology Inc.
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AN526
Please check the Microchip BBS for the latest version of the source code. Microchip's Worldwide Web Address: www.microchip.com; Bulletin Board Support: MCHIPBBS using CompuServe® (CompuServe membership not required).
APPENDIX C:DOUBLE PRECISION MULTIPLICATION LISTING (LOOPED)
MPASM 01.40 Released DBL_MPYS.ASM 1-16-1997 12:53:00 PAGE 1
LOC OBJECT CODE VALUE
LINE SOURCE TEXT
00000010 00000011 00000012 00000013 00000014 00000015 00000016 00000017 00000018 00000019 0000001F
000001FF 00000001
00001 00002 00003 00004 00005 00006 00007 00008 00009 00010 00011 00012 00013 00014 00015 00016 00017 00018 00019 00020 00021 00022 00023 00024 00025 00026 00027 00028 00029 00030 00031 00032 00033 00034 00035 00036 00037 00038 00039 00040 00041 00042 00043 00044 00045 00046 00047 00048 00001 00002 00224 00049 00050 00051
LIST P = 16C54, n = 66 ; ;******************************************************************* ; Double Precision Multiplication ; ; ( Optimized for Code Size : Looped Code ) ; ;*******************************************************************; ; Multiplication: ACCb(16 bits)*ACCa(16 bits) -> ACCb,ACCc (32 bits) ; (a) Load the 1st operand in location ACCaLO & ACCaHI (16 bits) ; (b) Load the 2nd operand in location ACCbLO & ACCbHI (16 bits) ; (c) CALL D_mpy ; (d) The 32 bit result is in location (ACCbHI,ACCbLO,ACCcHI,ACCcLO) ; ; Performance : ; Program Memory : 033 ; Clock Cycles : 333 ; ; Note : The above timing is the worst case timing, when the ; register ACCb = FFFF. The speed may be improved if ; the register ACCb contains a number ( out of the two ; numbers ) with less number of 1s. ; The performance specs are for Unsigned arithmetic (i.e, ; with "SIGNED equ FALSE"). ; ; The performance specs are for Unsigned arithmetic (i.e, ; with "SIGNED equ FALSE"). ; ; ; Program: DBL_MPYS.ASM ; Revision Date: ; 1-13-97 Compatibility with MPASMWIN 1.40 ; ;*******************************************************************; ; ACCaLO equ 0x10 ACCaHI equ 0x11 ACCbLO equ 0x12 ACCbHI equ 0x13 ACCcLO equ 0x14 ACCcHI equ 0x15 ACCdLO equ 0x16 ACCdHI equ 0x17 temp equ 0x18 sign equ 0x19 Flags equ 0x1F ; include "p16c5x.inc" LIST ;P16C5X.INC Standard Header File, Ver. 3.30 Microchip Technology, Inc. LIST PIC54 TRUE equ equ 1FFH 1 ; Define Reset Vector
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00000000 00000007 0000 00000001 00052 00053 00054 00055 00056 00057 00058 00059 00060 00061 00062 00063 00064 00065 00066 00067 00068 00069 00070 00071 00072 00073 00074 00075 00076 00077 00078 00079 00080 00081 00082 00083 00084 00085 00086 00087 00088 00089 00090 00091 00092 00093 00094 00095 00096 00097 00098 00099 00100 00101 00102 00103 00104 00105 00106 00107 00108 00109 00110 00111 00112 00113 00114 00115 00116 FALSE MSB equ equ 0 7
0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B
041F 0210 01F2 0603 02B3 0603 051F 0211 01F3 061F 0503 0800
000C lsb's)
org 0 ;******************************************************************* SIGNED equ TRUE ; Set This To `TRUE' if the routines ; ; for Multiplication & Division needs ; ; to be assembled as Signed Integer ; ; Routines. If `FALSE' the above two ; ; routines ( D_mpy & D_div ) use ; ; unsigned arithmetic. ;******************************************************************* ; Double Precision Addition ( ACCb + ACCa -> ACCb ) ; D_add bcf Flags,C ;Clear temp Carry bit movf ACCaLO,W ; Addition ( ACCb + ACCa -> ACCb ) addwf ACCbLO, F ;add lsb btfsc STATUS,C ;add in carry incf ACCbHI, F btfsc STATUS,C bsf Flags,C movf ACCaHI,W addwf ACCbHI, F ;add msb btfsc Flags,C bsf STATUS,C retlw 0 ;******************************************************************* ; Double Precision Multiply ( 16x16 -> 32 ) ; ( ACCb*ACCa -> ACCb,ACCc ) : 32 bit output with high word ; in ACCb ( ACCbHI,ACCbLO ) and low word in ACCc ( ACCcHI,ACCcLO ). ; D_mpyS ;results in ACCb(16 msb's) and ACCc(16 ; IF SIGNED CALL S_SIGN ENDIF ; mloop call rrf rrf btfsc call rrf rrf rrf rrf decfsz goto setup ACCdHI, F ACCdLO, F STATUS,C D_add ACCbHI, F ACCbLO, F ACCcHI, F ACCcLO, F temp, F mloop ;rotate d right ;need to add?
000C 0935
000D 000E 000F 0010 0011 0012 0013 0014 0015 0016 0017
0926 0337 0336 0603 0900 0333 0332 0335 0334 02F8 0A0E
;loop until all bits checked
; IF SIGNED btfss sign,MSB retlw 0 comf ACCcLO, F incf ACCcLO, F btfsc STATUS,Z decf ACCcHI, F comf ACCcHI, F btfsc STATUS,Z comf ACCbLO, F incf ACCbLO, F btfsc STATUS,Z decf ACCbHI, F comf ACCbHI, F retlw 0
0018 0019 001A 001B 001C 001D 001E 001F 0020 0021 0022 0023 0024 0025
07F9 0800 0274 02B4 0643 00F5 0275 0643 0272 02B2 0643 00F3 0273 0800
; negate ACCa ( -ACCa -> ACCa )
neg_B
; negate ACCb
ELSE
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00117 00118 00119 00120 00121 00122 00123 00124 00125 00126 00127 00128 00129 00130 00131 00132 00133 00134 00135 00136 00137 00138 00139 00140 00141 00142 00143 00144 00145 00146 00147 00148 00149 00150 00151 00152 00153 00154 00155 00156 00157 00158 00159 00160 00161 00162 00163 00164 00165 00166 00167 00168 00169 00170 00171 00172 00173 00174 00175 00176 00177 00178 00179 00180 00181 00182 retlw ENDIF 0 ; ;******************************************************************* ; setup movlw .16 ; for 16 shifts movwf temp movf ACCbHI,W ; move ACCb to ACCd movwf ACCdHI movf ACCbLO,W movwf ACCdLO clrf ACCbHI clrf ACCbLO retlw 0 ; ;******************************************************************* ; neg_A comf ACCaLO, F ; negate ACCa ( -ACCa -> ACCa ) incf ACCaLO, F btfsc STATUS,Z decf ACCaHI, F comf ACCaHI, F retlw 0 ; ;******************************************************************* ; Assemble this section only if Signed Arithmetic Needed ; IF SIGNED ; S_SIGN movf ACCaHI,W xorwf ACCbHI,W movwf sign btfss ACCbHI,MSB ; if MSB set go & negate ACCb goto chek_A ; comf ACCbLO, F ; negate ACCb incf ACCbLO, F btfsc STATUS,Z decf ACCbHI, F comf ACCbHI, F ; chek_A btfss ACCaHI,MSB ; if MSB set go & negate ACCa retlw 0 goto neg_A ; ENDIF ; ;******************************************************************* ; Test Program ;******************************************************************* ; Load constant values to ACCa & ACCb for testing ; main movlw 1 movwf ACCaHI movlw 0FF ; loads ACCa = 01FF movwf ACCaLO ; movlw 0x7F movwf ACCbHI movlw 0xFF ; loads ACCb = 7FFF movwf ACCbLO ; call D_mpyS ; Here (ACCb,ACCc) = 00FF 7E01 ; self goto self ;
0026 0027 0028 0029 002A 002B 002C 002D 002E
0C10 0038 0213 0037 0212 0036 0073 0072 0800
002F 0030 0031 0032 0033 0034
0270 02B0 0643 00F1 0271 0800
0035 0036 0037 0038 0039 003A 003B 003C 003D 003E
0211 0193 0039 07F3 0A3F 0272 02B2 0643 00F3 0273
003F 07F1 0040 0800 0041 0A2F
0042 0043 0044 0045 0046 0047 0048 0049
0C01 0031 0CFF 0030 0C7F 0033 0CFF 0032
004A 090C 004B 0A4B
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01FF 01FF 0A42 00183 00184 00185 org goto END PIC54 main
MEMORY USAGE MAP (`X' = Used,
`-' = Unused)
0000 : XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX 0040 : XXXXXXXXXXXX---- ---------------- ---------------- ---------------01C0 : ---------------- ---------------- ---------------- ---------------X All other memory blocks unused. Program Memory Words Used: Program Memory Words Free: 77 435
Errors : Warnings : Messages :
0 0 reported, 0 reported,
0 suppressed 0 suppressed
© 1997 Microchip Technology Inc.
DS00526E-page 15
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Please check the Microchip BBS for the latest version of the source code. Microchip's Worldwide Web Address: www.microchip.com; Bulletin Board Support: MCHIPBBS using CompuServe® (CompuServe membership not required).
APPENDIX D:DOUBLE PRECISION MULTIPLICATION LISTINGS (FAST)
MPASM 01.40 Released DBL_MPYF.ASM 1-16-1997 12:52:26 PAGE 1
LOC OBJECT CODE VALUE 00001 00002 00003 00004 00005 00006 00007 00008 00009 00010 00011 00012 00013 00014 00015 00016 00017 00018 00019 00020 00021 00022 00023 00024 00025 00026 00027 00028 00029 00030 00031 00032 00033 00034 00035 00036 00037 00038 00039 00040 00041 00042 00043 00044 00001 00002 00224 00045 00046 00047 00048 00049 00050 00051
LINE SOURCE TEXT
00000010 00000011 00000012 00000013 00000014 00000015 00000016 00000017 00000018 00000019
LIST P = 16C54, n = 66 ; ;******************************************************************* ; Double Precision Multiplication ; ; ( Optimized for Speed : straight Line Code ) ; ;*******************************************************************; ;Multiplication : ACCb(16 bits) * ACCa(16 bits) -> ACCb,ACCc (32 bits) ; (a) Load the 1st operand in location ACCaLO & ACCaHI (16 bits) ; (b) Load the 2nd operand in location ACCbLO & ACCbHI (16 bits) ; (c) CALL D_mpy ; (d) The 32 bit result is in location (ACCbHI,ACCbLO,ACCcHI,ACCcLO) ; ; Performance : ; Program Memory : 240 ; Clock Cycles : 233 ; ; Note : The above timing is the worst case timing, when the ; register ACCb = FFFF. The speed may be improved if ; the register ACCb contains a number (out of the two ; numbers) with less number of 1s. ; ; The performance specs are for Unsigned arithmetic (i.e, ; with "SIGNED equ FALSE"). ; ; Program: DBL_MPYF.ASM ; Revision Date: ; 1-13-97 Compatibility with MPASMWIN 1.40 ; ;*******************************************************************; ; ACCaLO equ 10 ACCaHI equ 11 ACCbLO equ 12 ACCbHI equ 13 ACCcLO equ 14 ACCcHI equ 15 ACCdLO equ 16 ACCdHI equ 17 temp equ 18 sign equ 19 ; include "p16c5x.inc" LIST ;P16C5X.INC Standard Header File, Ver. 3.30 Microchip Technology, Inc. LIST PIC54 TRUE FALSE equ equ equ 1FFH 1 0 ; Define Reset Vector
000001FF 00000001 00000000 0000
org 0 ;*******************************************************************
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00000000 00052 00053 00054 00055 00056 00057 00058 00059 00060 00061 00062 00063 00064 00065 00066 00067 00068 00069 00070 00071 00072 00073 00074 00075 00076 00077 00078 00079 00080 00081 00082 00083 00084 00085 00086 00087 00088 00089 00090 00091 00092 00093 00094 00095 00096 M M M M M M M M M M M M M M M M M 00097 M M M SIGNED equ FALSE ; Set This To `TRUE' if the routines ; ; for Multiplication & Division needs ; ; to be assembled as Signed Integer ; ; Routines. If `FALSE' the above two ; ; routines ( D_mpy & D_div ) use ; ; unsigned arithmetic. ;******************************************************************* ; multiplication macro ; mulMac MACRO LOCAL NO_ADD ; rrf ACCdHI, F ;rotate d right rrf ACCdLO, F btfss STATUS,C ; need to add? goto NO_ADD ; no addition necessary movf ACCaLO,W ; Addition ( ACCb + ACCa -> ACCb ) addwf ACCbLO, F ;add lsb btfsc STATUS,C ; add in carry incf ACCbHI, F movf ACCaHI,W addwf ACCbHI, F ;add msb NO_ADD rrf ACCbHI, F rrf ACCbLO, F rrf ACCcHI, F rrf ACCcLO, F ; ENDM ; ;*******************************************************************; ; Double Precision Multiply ( 16x16 -> 32 ) ; ( ACCb*ACCa -> ACCb,ACCc ) : 32 bit output with high word ; in ACCb ( ACCbHI,ACCbLO ) and low word in ACCc ( ACCcHI,ACCcLO ). ; D_mpyF ;results in ACCb(16 msb's) and ACCc(16 lsb's) ; IF SIGNED CALL S_SIGN ENDIF ; call setup ; ; use the mulMac macro 16 times ; mulMac LOCAL NO_ADD ; rrf ACCdHI, F ;rotate d right rrf ACCdLO, F btfss STATUS,C ; need to add? goto NO_ADD ; no addition necessary movf ACCaLO,W ; Addition ( ACCb + ACCa -> ACCb ) addwf ACCbLO, F ; add lsb btfsc STATUS,C ; add in carry incf ACCbHI, F movf ACCaHI,W addwf ACCbHI, F ; add msb NO_ADD rrf ACCbHI, F rrf ACCbLO, F rrf ACCcHI, F rrf ACCcLO, F ; mulMac LOCAL NO_ADD ; rrf ACCdHI, F ; rotate d right
0000
0000 09E2
0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 0337 0336 0703 0A0B 0210 01F2 0603 02B3 0211 01F3 0333 0332 0335 0334
0000 000F 0337
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0010 0011 0012 0013 0014 0015 0016 0017 0018 0019 001A 001B 001C 0336 0703 0A19 0210 01F2 0603 02B3 0211 01F3 0333 0332 0335 0334 M M M M M M M M M M M M M M 00098 M M M M M M M M M M M M M M M M M 00099 M M M M M M M M M M M M M M M M M 00100 M M M M M M M M M M M M M M M rrf btfss goto movf addwf btfsc incf movf addwf rrf rrf rrf rrf mulMac LOCAL ; rrf rrf btfss goto movf addwf btfsc incf movf addwf rrf rrf rrf rrf mulMac LOCAL ; rrf rrf btfss goto movf addwf btfsc incf movf addwf rrf rrf rrf rrf mulMac LOCAL ; rrf rrf btfss goto movf addwf btfsc incf movf addwf rrf rrf rrf ACCdHI, F ACCdLO, F STATUS,C NO_ADD ACCaLO,W ACCbLO, F STATUS,C ACCbHI, F ACCaHI,W ACCbHI, F ACCbHI, F ACCbLO, F ACCcHI, F ; rotate d right ; ; ; ; ; need to add? no addition necessary Addition ( ACCb + ACCa -> ACCb ) add lsb add in carry ACCdHI, F ACCdLO, F STATUS,C NO_ADD ACCaLO,W ACCbLO, F STATUS,C ACCbHI, F ACCaHI,W ACCbHI, F ACCbHI, F ACCbLO, F ACCcHI, F ACCcLO, F ; rotate d right ; ; ; ; ; need to add? no addition necessary Addition ( ACCb + ACCa -> ACCb ) add lsb add in carry ACCdHI, F ACCdLO, F STATUS,C NO_ADD ACCaLO,W ACCbLO, F STATUS,C ACCbHI, F ACCaHI,W ACCbHI, F ACCbHI, F ACCbLO, F ACCcHI, F ACCcLO, F ; rotate d right ; ; ; ; ; need to add? no addition necessary Addition ( ACCb + ACCa -> ACCb ) add lsb add in carry ACCdLO, F STATUS,C NO_ADD ACCaLO,W ACCbLO, F STATUS,C ACCbHI, F ACCaHI,W ACCbHI, F ACCbHI, F ACCbLO, F ACCcHI, F ACCcLO, F ; need to add? ; no addition necessary ; Addition ( ACCb + ACCa -> ACCb ) ;add lsb ; add in carry
; add msb
NO_ADD
; NO_ADD
0000 001D 001E 001F 0020 0021 0022 0023 0024 0025 0026 0027 0028 0029 002A 0337 0336 0703 0A27 0210 01F2 0603 02B3 0211 01F3 0333 0332 0335 0334
; add msb
NO_ADD
; NO_ADD
0000 002B 002C 002D 002E 002F 0030 0031 0032 0033 0034 0035 0036 0037 0038 0337 0336 0703 0A35 0210 01F2 0603 02B3 0211 01F3 0333 0332 0335 0334
; add msb
NO_ADD
; NO_ADD
0000 0039 003A 003B 003C 003D 003E 003F 0040 0041 0042 0043 0044 0045 0337 0336 0703 0A43 0210 01F2 0603 02B3 0211 01F3 0333 0332 0335
; add msb
NO_ADD
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0046 0334 M M 00101 M M M M M M M M M M M M M M M M M 00102 M M M M M M M M M M M M M M M M M 00103 M M M M M M M M M M M M M M M M M 00104 M M M M M M M M M rrf ; mulMac LOCAL ; rrf rrf btfss goto movf addwf btfsc incf movf addwf rrf rrf rrf rrf mulMac LOCAL ; rrf rrf btfss goto movf addwf btfsc incf movf addwf rrf rrf rrf rrf mulMac LOCAL ; rrf rrf btfss goto movf addwf btfsc incf movf addwf rrf rrf rrf rrf mulMac LOCAL ; rrf rrf btfss goto movf addwf btfsc ACCdHI, F ACCdLO, F STATUS,C NO_ADD ACCaLO,W ACCbLO, F STATUS,C ; rotate d right ; ; ; ; ; need to add? no addition necessary Addition ( ACCb + ACCa -> ACCb ) add lsb add in carry ACCdHI, F ACCdLO, F STATUS,C NO_ADD ACCaLO,W ACCbLO, F STATUS,C ACCbHI, F ACCaHI,W ACCbHI, F ACCbHI, F ACCbLO, F ACCcHI, F ACCcLO, F ; rotate d right ; ; ; ; ; need to add? no addition necessary Addition ( ACCb + ACCa -> ACCb ) add lsb add in carry ACCdHI, F ACCdLO, F STATUS,C NO_ADD ACCaLO,W ACCbLO, F STATUS,C ACCbHI, F ACCaHI,W ACCbHI, F ACCbHI, F ACCbLO, F ACCcHI, F ACCcLO, F ; rotate d right ; ; ; ; ; need to add? no addition necessary Addition ( ACCb + ACCa -> ACCb ) add lsb add in carry ACCdHI, F ACCdLO, F STATUS,C NO_ADD ACCaLO,W ACCbLO, F STATUS,C ACCbHI, F ACCaHI,W ACCbHI, F ACCbHI, F ACCbLO, F ACCcHI, F ACCcLO, F ;rotate d right ; ; ; ; ; need to add? no addition necessary Addition ( ACCb + ACCa -> ACCb ) add lsb add in carry NO_ADD ACCcLO, F
0000 0047 0048 0049 004A 004B 004C 004D 004E 004F 0050 0051 0052 0053 0054 0337 0336 0703 0A51 0210 01F2 0603 02B3 0211 01F3 0333 0332 0335 0334
; add msb
NO_ADD
; NO_ADD
0000 0055 0056 0057 0058 0059 005A 005B 005C 005D 005E 005F 0060 0061 0062 0337 0336 0703 0A5F 0210 01F2 0603 02B3 0211 01F3 0333 0332 0335 0334
; add msb
NO_ADD
; NO_ADD
0000 0063 0064 0065 0066 0067 0068 0069 006A 006B 006C 006D 006E 006F 0070 0337 0336 0703 0A6D 0210 01F2 0603 02B3 0211 01F3 0333 0332 0335 0334
; add msb
NO_ADD
; NO_ADD
0000 0071 0072 0073 0074 0075 0076 0077 0337 0336 0703 0A7B 0210 01F2 0603
© 1997 Microchip Technology Inc.
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0078 0079 007A 007B 007C 007D 007E 02B3 0211 01F3 0333 0332 0335 0334 M M M M M M M M 00105 M M M M M M M M M M M M M M M M M 00106 M M M M M M M M M M M M M M M M M 00107 M M M M M M M M M M M M M M M M M 00108 M M M incf movf addwf rrf rrf rrf rrf mulMac LOCAL ; rrf rrf btfss goto movf addwf btfsc incf movf addwf rrf rrf rrf rrf mulMac LOCAL ; rrf rrf btfss goto movf addwf btfsc incf movf addwf rrf rrf rrf rrf mulMac LOCAL ; rrf rrf btfss goto movf addwf btfsc incf movf addwf rrf rrf rrf rrf mulMac LOCAL ; rrf ACCdHI, F ; rotate d right ACCdHI, F ACCdLO, F STATUS,C NO_ADD ACCaLO,W ACCbLO, F STATUS,C ACCbHI, F ACCaHI,W ACCbHI, F ACCbHI, F ACCbLO, F ACCcHI, F ACCcLO, F ; rotate d right ; ; ; ; ; need to add? no addition necessary Addition ( ACCb + ACCa -> ACCb ) add lsb add in carry ACCdHI, F ACCdLO, F STATUS,C NO_ADD ACCaLO,W ACCbLO, F STATUS,C ACCbHI, F ACCaHI,W ACCbHI, F ACCbHI, F ACCbLO, F ACCcHI, F ACCcLO, F ; rotate d right ; ; ; ; ; need to add? no addition necessary Addition ( ACCb + ACCa -> ACCb ) add lsb add in carry ACCdHI, F ACCdLO, F STATUS,C NO_ADD ACCaLO,W ACCbLO, F STATUS,C ACCbHI, F ACCaHI,W ACCbHI, F ACCbHI, F ACCbLO, F ACCcHI, F ACCcLO, F ; rotate d right ; ; ; ; ; need to add? no addition necessary Addition ( ACCb + ACCa -> ACCb ) add lsb add in carry ACCbHI, F ACCaHI,W ACCbHI, F ACCbHI, F ACCbLO, F ACCcHI, F ACCcLO, F ; add msb
NO_ADD
; NO_ADD
0000 007F 0080 0081 0082 0083 0084 0085 0086 0087 0088 0089 008A 008B 008C 0337 0336 0703 0A89 0210 01F2 0603 02B3 0211 01F3 0333 0332 0335 0334
; add msb
NO_ADD
; NO_ADD
0000 008D 008E 008F 0090 0091 0092 0093 0094 0095 0096 0097 0098 0099 009A 0337 0336 0703 0A97 0210 01F2 0603 02B3 0211 01F3 0333 0332 0335 0334
; add msb
NO_ADD
; NO_ADD
0000 009B 009C 009D 009E 009F 00A0 00A1 00A2 00A3 00A4 00A5 00A6 00A7 00A8 0337 0336 0703 0AA5 0210 01F2 0603 02B3 0211 01F3 0333 0332 0335 0334
; add msb
NO_ADD
; NO_ADD
0000 00A9 0337
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00AA 00AB 00AC 00AD 00AE 00AF 00B0 00B1 00B2 00B3 00B4 00B5 00B6 0336 0703 0AB3 0210 01F2 0603 02B3 0211 01F3 0333 0332 0335 0334 M M M M M M M M M M M M M M 00109 M M M M M M M M M M M M M M M M M 00110 M M M M M M M M M M M M M M M M M 00111 M M M M M M M M M M M M M M M rrf btfss goto movf addwf btfsc incf movf addwf rrf rrf rrf rrf mulMac LOCAL ; rrf rrf btfss goto movf addwf btfsc incf movf addwf rrf rrf rrf rrf mulMac LOCAL ; rrf rrf btfss goto movf addwf btfsc incf movf addwf rrf rrf rrf rrf mulMac LOCAL ; rrf rrf btfss goto movf addwf btfsc incf movf addwf rrf rrf rrf ACCdHI, F ACCdLO, F STATUS,C NO_ADD ACCaLO,W ACCbLO, F STATUS,C ACCbHI, F ACCaHI,W ACCbHI, F ACCbHI, F ACCbLO, F ACCcHI, F ; rotate d right ; ; ; ; ; need to add? no addition necessary Addition ( ACCb + ACCa -> ACCb ) add lsb add in carry ACCdHI, F ACCdLO, F STATUS,C NO_ADD ACCaLO,W ACCbLO, F STATUS,C ACCbHI, F ACCaHI,W ACCbHI, F ACCbHI, F ACCbLO, F ACCcHI, F ACCcLO, F ; rotate d right ; ; ; ; ; need to add? no addition necessary Addition ( ACCb + ACCa -> ACCb ) add lsb add in carry ACCdHI, F ACCdLO, F STATUS,C NO_ADD ACCaLO,W ACCbLO, F STATUS,C ACCbHI, F ACCaHI,W ACCbHI, F ACCbHI, F ACCbLO, F ACCcHI, F ACCcLO, F ; rotate d right ; ; ; ; ; need to add? no addition necessary Addition ( ACCb + ACCa -> ACCb ) add lsb add in carry ACCdLO, F STATUS,C NO_ADD ACCaLO,W ACCbLO, F STATUS,C ACCbHI, F ACCaHI,W ACCbHI, F ACCbHI, F ACCbLO, F ACCcHI, F ACCcLO, F ; ; ; ; ; need to add? no addition necessary Addition ( ACCb + ACCa -> ACCb ) add lsb add in carry
; add msb
NO_ADD
; NO_ADD
0000 00B7 00B8 00B9 00BA 00BB 00BC 00BD 00BE 00BF 00C0 00C1 00C2 00C3 00C4 0337 0336 0703 0AC1 0210 01F2 0603 02B3 0211 01F3 0333 0332 0335 0334
; add msb
NO_ADD
; NO_ADD
0000 00C5 00C6 00C7 00C8 00C9 00CA 00CB 00CC 00CD 00CE 00CF 00D0 00D1 00D2 0337 0336 0703 0ACF 0210 01F2 0603 02B3 0211 01F3 0333 0332 0335 0334
; add msb
NO_ADD
; NO_ADD
0000 00D3 00D4 00D5 00D6 00D7 00D8 00D9 00DA 00DB 00DC 00DD 00DE 00DF 0337 0336 0703 0ADD 0210 01F2 0603 02B3 0211 01F3 0333 0332 0335
; add msb
NO_ADD
© 1997 Microchip Technology Inc.
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00E0 0334 M M 00112 00113 00114 00115 00116 00117 00118 00119 00120 00121 00122 00123 00124 00125 00126 00127 00128 00129 00130 00131 00132 00133 00134 00135 00136 00137 00138 00139 00140 00141 00142 00143 00144 00145 00146 00147 00148 00149 00150 00151 00152 00153 00154 00155 00156 00157 00158 00159 00160 00161 00162 00163 00164 00165 00166 00167 00168 00169 00170 00171 00172 00173 00174 00175 rrf ; ; IF SIGNED btfss sign,MSB retlw 0 comf ACCcLO incf ACCcLO btfsc STATUS,Z decf ACCcHI comf ACCcHI btfsc STATUS,Z comf ACCbLO incf ACCbLO btfsc STATUS,Z decf ACCbHI comf ACCbHI retlw 0 0 ACCcLO, F
; negate ACCa ( -ACCa -> ACCa )
neg_B
; negate ACCb
ELSE retlw ENDIF
00E1 0800
00E2 00E3 00E4 00E5 00E6 00E7 00E8 00E9 00EA
0C10 0038 0213 0037 0212 0036 0073 0072 0800
00EB 00EC 00ED 00EE 00EF 00F0
0270 02B0 0643 00F1 0271 0800
; ;******************************************************************* ; setup movlw .16 ; for 16 shifts movwf temp movf ACCbHI,W ;move ACCb to ACCd movwf ACCdHI movf ACCbLO,W movwf ACCdLO clrf ACCbHI clrf ACCbLO retlw 0 ; ;******************************************************************* ; neg_A comf ACCaLO, F ; negate ACCa ( -ACCa -> ACCa ) incf ACCaLO, F btfsc STATUS,Z decf ACCaHI, F comf ACCaHI, F retlw 0 ; ;******************************************************************* ; Assemble this section only if Signed Arithmetic Needed ; IF SIGNED ; S_SIGN movf ACCaHI,W xorwf ACCbHI,W movwf sign btfss ACCbHI,MSB ; if MSB set go & negate ACCb goto chek_A ; comf ACCbLO ; negate ACCb incf ACCbLO btfsc STATUS,Z decf ACCbHI comf ACCbHI ; chek_A btfss ACCaHI,MSB ; if MSB set go & negate ACCa retlw 0 goto neg_A ; ENDIF ;
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00176 00177 00178 00179 00180 00F1 0C01 00181 00F2 0031 00182 00F3 0CFF 00183 00F4 0030 00184 00185 00F5 0C7F 00186 00F6 0033 00187 00F7 0CFF 00188 00F8 0032 00189 00F9 0800 00190 00191 00FA 0000 00192 00193 00FB 09F1 00194 00FC 0900 00195 00196 00FD 0AFD 00197 00198 01FF 00199 01FF 0AFA 00200 00201 MEMORY USAGE MAP (`X' ;******************************************************************* ; Test Program ;******************************************************************* ; Load constant values to ACCa & ACCb for testing ; loadAB movlw 1 movwf ACCaHI movlw 0FF ; loads ACCa = 01FF movwf ACCaLO ; movlw 07F movwf ACCbHI movlw 0FF ; loads ACCb = 7FFF movwf ACCbLO retlw 0 ; main nop ; call loadAB ;result of multiplying ACCb*ACCa->(ACCb,ACCc) call D_mpyF ; Here (ACCb,ACCc) = 00FF 7E01 ; self goto self ; org PIC54 goto main END = Used, `-' = Unused)
0000 0040 0080 00C0 01C0
: : : : :
XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX ----------------
XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX ----------------
XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX ----------------
XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXX----------------X
All other memory blocks unused. Program Memory Words Used: Program Memory Words Free: 255 257
Errors : Warnings : Messages :
0 0 reported, 0 reported,
0 suppressed 0 suppressed
© 1997 Microchip Technology Inc.
DS00526E-page 23
AN526
Please check the Microchip BBS for the latest version of the source code. Microchip's Worldwide Web Address: www.microchip.com; Bulletin Board Support: MCHIPBBS using CompuServe® (CompuServe membership not required).
APPENDIX E:DOUBLE PRECISION ADDITION AND SUBTRACTION LISTING
MPASM 01.40 Released DBL_ADD.ASM 1-16-1997 12:50:38 PAGE 1
LOC OBJECT CODE VALUE 00001 00002 00003 00004 00005 00006 00007 00008 00009 00010 00011 00012 00013 00014 00015 00016 00017 00018 00019 00020 00021 00022 00023 00024 00025 00026 00027 00028 00029 00030 00031 00032 00033 00034 00035 00036 00037 00038 00039 00001 00002 00224 00040 00041 00042 00043 00044 00045 00046 00047 00048 00049 00050 00051 00052 00053
LINE SOURCE TEXT
00000010 00000011 00000012 00000013
LIST P = 16C54, n = 66 ; ;******************************************************************* ; Double Precision Addition & Subtraction ; ;*******************************************************************; ; Addition : ACCb(16 bits) + ACCa(16 bits) -> ACCb(16 bits) ; (a) Load the 1st operand in location ACCaLO & ACCaHI ( 16 bits ) ; (b) Load the 2nd operand in location ACCbLO & ACCbHI ( 16 bits ) ; (c) CALL D_add ; (d) The result is in location ACCbLO & ACCbHI ( 16 bits ) ; ; Performance : ; Program Memory : 07 ; Clock Cycles : 08 ;*******************************************************************; ; Subtraction : ACCb(16 bits) - ACCa(16 bits) -> ACCb(16 bits) ; (a) Load the 1st operand in location ACCaLO & ACCaHI ( 16 bits ) ; (b) Load the 2nd operand in location ACCbLO & ACCbHI ( 16 bits ) ; (c) CALL D_sub ; (d) The result is in location ACCbLO & ACCbHI ( 16 bits ) ; ; Performance : ; Program Memory : 14 ; Clock Cycles : 17 ; ; ; Program: DBL_ADD.ASM ; Revision Date: ; 1-13-97 Compatibility with MPASMWIN 1.40 ; ;*******************************************************************; ; ACCaLO equ 10 ACCaHI equ 11 ACCbLO equ 12 ACCbHI equ 13 ; include "p16c5x.inc" LIST ;P16C5X.INC Standard Header File, Ver. 3.30 Microchip Technology, Inc. LIST PIC54 equ 1FFH ; Define Reset Vector
000001FF 0000
0000 0908
0001 0210 0002 01F2
org 0 ;******************************************************************* ; Double Precision Subtraction ( ACCb - ACCa -> ACCb ) ; D_sub call neg_A ; At first negate ACCa; Then add ; ;******************************************************************* ; Double Precision Addition ( ACCb + ACCa -> ACCb ) ; D_add movf ACCaLO,W addwf ACCbLO, F ; add lsb
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0003 0004 0005 0006 0007 0603 02B3 0211 01F3 0800 00054 00055 00056 00057 00058 00059 00060 00061 00062 00063 00064 00065 00066 00067 00068 00069 00070 00071 00072 00073 00074 00075 00076 00077 00078 00079 00080 00081 00082 00083 00084 00085 00086 00087 00088 00089 00090 00091 00092 00093 00094 00095 00096 btfsc incf movf addwf retlw ; ; neg_A STATUS,C ACCbHI, F ACCaHI,W ACCbHI, F 0 ; add in carry ; add msb
0008 0009 000A 000B 000C 000D
0270 02B0 0643 00F1 0271 0800
comf incf btfsc decf comf retlw
ACCaLO, F ACCaLO, F STATUS,Z ACCaHI, F ACCaHI, F 0
; negate ACCa ( -ACCa -> ACCa )
000E 000F 0010 0011 0012 0013 0014 0015 0016
0C01 0031 0CFF 0030 0C7F 0033 0CFF 0032 0800
0017 0000 0018 090E 0019 0901 001A 090E 001B 0900 001C 0A1C 01FF 01FF 0A17
; ;******************************************************************* ; Test Program ;******************************************************************* ; Load constant values to ACCa & ACCb for testing ; loadAB movlw 1 movwf ACCaHI movlw 0FF ; loads ACCa = 01FF movwf ACCaLO ; movlw 07F movwf ACCbHI movlw 0FF ; loads ACCb = 7FFF movwf ACCbLO retlw 0 ; main nop ; call loadAB ; result of adding ACCb+ACCa->ACCb call D_add ; Here Accb = 81FE ; call loadAB ; result of subtracting ACCb - ACCa->ACCb call D_sub ; Here Accb = 7E00 ; self goto self ; org PIC54 goto main END `-' = Unused)
MEMORY USAGE MAP (`X' = Used,
0000 : XXXXXXXXXXXXXXXX XXXXXXXXXXXXX--- ---------------- ---------------01C0 : ---------------- ---------------- ---------------- ---------------X All other memory blocks unused. Program Memory Words Used: Program Memory Words Free: 30 482
Errors : Warnings : Messages :
0 0 reported, 0 reported,
0 suppressed 0 suppressed
© 1997 Microchip Technology Inc.
DS00526E-page 25
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APPENDIX F:BCD TO BINARY CONVERSION LISTING
MPASM 01.40 Released BCD2BIN.ASM 1-16-1997 12:49:30 PAGE 1
LOC OBJECT CODE VALUE
LINE SOURCE TEXT
00000010 00000011 00000012 00000013 00000014 00000015 00000016
0000 0001 0002 0003 0004 0005 0006 0007 0008
0E0F 01F1 0603 02B0 0403 0351 0036 0350 0035
00001 00002 00003 00004 00005 00006 00007 00008 00009 00010 00011 00012 00013 00014 00015 00016 00017 00018 00019 00020 00021 00022 00023 00024 00025 00026 00027 00028 00029 00030 00031 00032 00033 00034 00035 00036 00037 00038 00039 00001 00002 00224 00040 00041 00042 00043 00044 00045 00046 00047 00048 00049 00050 00051
LIST P = 16C54, n = 66 ; ;********************************************************************** ; BCD To Binary Conversion ; ; This routine converts a 5 digit BCD number to a 16 bit binary ; number. ; The input 5 digit BCD numbers are asumed to be in locations ; R0, R1 & R2 with R0 containing the MSD in its right most nibble. ; ; The 16 bit binary number is output in registers H_byte & L_byte ; ( high byte & low byte repectively ). ; ; The method used for conversion is : ; input number X = abcde ( the 5 digit BCD number ) ; X = abcde = 10[10[10[10a+b]+c]+d]+e ; ; Performance : ; Program Memory : 30 ; Clock Cycles : 121 ; ; ; Program: BCD2BIN.ASM ; Revision Date: ; 1-13-97 Compatibility with MPASMWIN 1.40 ; ;*******************************************************************; ; H_byte equ 10 L_byte equ 11 R0 equ 12 ; RAM Assignments R1 equ 13 R2 equ 14 ; H_temp equ 15 ; temporary register L_temp equ 16 ; temporary register ; ; INCLUDE "p16c5x.inc" LIST ;P16C5X.INC Standard Header File, Ver. 3.30 Microchip Technology, Inc. LIST ; ; mpy10b andlw 0F addwf L_byte, F btfsc STATUS,C incf H_byte, F mpy10a bcf STATUS,C ; multiply by 2 rlf L_byte,W movwf L_temp rlf H_byte,W ; (H_temp,L_temp) = 2*N movwf H_temp ;
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00052 bcf STATUS,C ; multiply by 2 00053 rlf L_byte, F 00054 rlf H_byte, F 00055 bcf STATUS,C ; multiply by 2 00056 rlf L_byte, F 00057 rlf H_byte, F 00058 bcf STATUS,C ; multiply by 2 00059 rlf L_byte, F 00060 rlf H_byte, F ; (H_byte,L_byte) = 8*N 00061 ; 0012 0216 00062 movf L_temp,W 0013 01F1 00063 addwf L_byte, F 0014 0603 00064 btfsc STATUS,C 0015 02B0 00065 incf H_byte, F 0016 0215 00066 movf H_temp,W 0017 01F0 00067 addwf H_byte, F 0018 0800 00068 retlw 0 ; (H_byte,L_byte) = 10*N 00069 ; 00070 ; 0019 0070 00071 BCDtoB clrf H_byte 001A 0212 00072 movf R0,W 001B 0E0F 00073 andlw 0F 001C 0031 00074 movwf L_byte 001D 0904 00075 call mpy10a ; result = 10a+b 00076 ; 001E 0393 00077 swapf R1,W 001F 0900 00078 call mpy10b ; result = 10[10a+b] 00079 ; 0020 0213 00080 movf R1,W 0021 0900 00081 call mpy10b ; result = 10[10[10a+b]+c] 00082 ; 0022 0394 00083 swapf R2,W 0023 0900 00084 call mpy10b ; result = 10[10[10[10a+b]+c]+d] 00085 ; 0024 0214 00086 movf R2,W 0025 0E0F 00087 andlw 0F 0026 01F1 00088 addwf L_byte, F 0027 0603 00089 btfsc STATUS,C 0028 02B0 00090 incf H_byte, F ; result = 10[10[10[10a+b]+c]+d]+e 0029 0800 00091 retlw 0 ; BCD to binary conversion done 00092 ; 00093 ; 00094 ;******************************************************************** 00095 ; Test Program 00096 ;********************************************************************* 002A 0C06 00097 main movlw 06 002B 0032 00098 movwf R0 ; Set R0 = 06 002C 0C55 00099 movlw 55 002D 0033 00100 movwf R1 ; Set R1 = 55 002E 0C35 00101 movlw 35 002F 0034 00102 movwf R2 ; Set R2 = 35 ( R0, R1, R2 = 6,55,35 ) 00103 ; 0030 0919 00104 call BCDtoB ; After conversion H_Byte = FF & L_Byte = FF 00105 ; 0031 0A31 00106 self goto self 00107 ; 01FF 00108 org 1FF 01FF 0A2A 00109 goto main 00110 ; 00111 END MEMORY USAGE MAP (`X' = Used, `-' = Unused) 0000 : XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XX-------------01C0 : ---------------- ---------------- ---------------- ---------------X All other memory blocks unused. 0009 000A 000B 000C 000D 000E 000F 0010 0011 0403 0371 0370 0403 0371 0370 0403 0371 0370
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Program Memory Words Used: Program Memory Words Free: Errors : Warnings : Messages : 0 0 reported, 0 reported, 51 461
0 suppressed 0 suppressed
DS00526E-page 28
© 1997 Microchip Technology Inc.
AN526
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APPENDIX G:BINARY (8-BIT) TO BCD CONVERSION
MPASM 01.40 Released BIN8BCD.ASM 1-16-1997 12:50:05 PAGE 1
LOC OBJECT CODE VALUE
LINE SOURCE TEXT
00001 LIST P = 16C54, n = 66 00002 ; 00003 ;******************************************************************** 00004 ; Binary To BCD Conversion Routine 00005 ; 00006 ; This routine converts the 8 bit binary number in the W Register 00007 ; to a 2 digit BCD number. 00008 ; The least significant digit is returned in location LSD and 00009 ; the most significant digit is returned in location MSD. 00010 ; 00011 ; Performance : 00012 ; Program Memory : 10 00013 ; Clock Cycles : 81 (worst case when W = 63 Hex ) 00014 ; ( i.e max Decimal number 99 ) 00015 ; 00016 ; Program: BIN8BCD.ASM 00017 ; Revision Date: 00018 ; 1-13-97 Compatibility with MPASMWIN 1.40 00019 ; 00020 ;******************************************************************* 00021 ; 00000010 00022 LSD equ 10 00000011 00023 MSD equ 11 00024 ; 00025 INCLUDE "p16c5x.inc" 00001 LIST 00002 ;P16C5X.INC Standard Header File, Ver. 3.30 Microchip Technology, Inc. 00224 LIST 00026 ; 0000 0071 00027 BinBCD clrf MSD 0001 0030 00028 movwf LSD 0002 0C0A 00029 gtenth movlw .10 0003 0090 00030 subwf LSD,W 0004 0703 00031 BTFSS STATUS,C 0005 0A09 00032 goto over 0006 0030 00033 movwf LSD 0007 02B1 00034 incf MSD, F 0008 0A02 00035 goto gtenth 0009 0800 00036 over retlw 0 00037 ;******************************************************************* 00038 ; 000A 0C63 00039 main movlw 63 ; W reg = 63 Hex 000B 0900 00040 call BinBCD ; after conversion, MSD = 9 & LSD = 9 000C 0A0C 00041 self goto self ; ( 63 Hex = 99 Decimal ) 00042 ; 01FF 00043 org 1FF 01FF 0A0A 00044 goto main 00045 ; 00046 END 0000 : XXXXXXXXXXXXX--- ---------------- ---------------- ---------------01C0 : ---------------- ---------------- ---------------- ---------------X All other memory blocks unused.
© 1997 Microchip Technology Inc.
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Program Memory Words Used: Program Memory Words Free: 14 498
Errors : Warnings : Messages :
0 0 reported, 0 reported,
0 suppressed 0 suppressed
DS00526E-page 30
© 1997 Microchip Technology Inc.
AN526
Please check the Microchip BBS for the latest version of the source code. Microchip's Worldwide Web Address: www.microchip.com; Bulletin Board Support: MCHIPBBS using CompuServe® (CompuServe membership not required).
APPENDIX H:BINARY (16-BIT) TO BCD LISTING
MPASM 01.40 Released B16TOBCD.ASM 1-16-1997 12:48:00 PAGE 1
LOC OBJECT CODE VALUE 00001 00002 00003 00004 00005 00006 00007 00008 00009 00010 00011 00012 00013 00014 00015 00016 00017 00018 00019 00020 00021 00022 00023 00024 00025 00026 00027 00028 00029 00030 00031 00032 00033 00034 00001 00002 00224 00035 00036 00037 00038 00039 00040 00041 00042 00043 00044 00045 00046 00047 00048 00049 00050 00051
LINE SOURCE TEXT
00000016 00000017 00000010 00000011 00000012 00000013 00000014
0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A
0403 0C10 0036 0072 0073 0074 0371 0370 0374 0373 0372
000B 02F6 000C 0A0E 000D 0800
LIST P = 16C54, n = 66 ; ;******************************************************************** ; Binary To BCD Conversion Routine ; This routine converts a 16 Bit binary Number to a 5 Digit ; BCD Number. This routine is useful since PIC16C55 & PIC16C57 ; have two 8 bit ports and one 4 bit port ( total of 5 BCD digits) ; ; The 16 bit binary number is input in locations H_byte and ; L_byte with the high byte in H_byte. ; The 5 digit BCD number is returned in R0, R1 and R2 with R0 ; containing the MSD in its right most nibble. ; ; Performance : ; Program Memory : 35 ; Clock Cycles : 885 ; ; ; Program: B16TOBCD.ASM ; Revision Date: ; 1-13-97 Compatibility with MPASMWIN 1.40 ; ;*******************************************************************; ; count equ 16 temp equ 17 ; H_byte equ 10 L_byte equ 11 R0 equ 12 ; RAM Assignments R1 equ 13 R2 equ 14 ; include "p16c5x.inc" LIST ;P16C5X.INC Standard Header File, Ver. 3.30 Microchip Technology, Inc. LIST ; B2_BCD bcf STATUS,0 ; clear the carry bit movlw .16 movwf count clrf R0 clrf R1 clrf R2 loop16 rlf L_byte, F rlf H_byte, F rlf R2, F rlf R1, F rlf R0, F ; decfsz count, F goto adjDEC RETLW 0 ;
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000E 0C14 000F 0024 0010 0918 0011 0C13 0012 0024 0013 0918 0014 0C12 0015 0024 0016 0918 0017 0A06 0018 0019 001A 001B 001C 001D 001E 001F 0020 0021 0022 0C03 01C0 0037 0677 0020 0C30 01C0 0037 06F7 0020 0800 00052 00053 00054 00055 00056 00057 00058 00059 00060 00061 00062 00063 00064 00065 00066 00067 00068 00069 00070 00071 00072 00073 00074 00075 00076 00077 00078 00079 00080 00081 00082 00083 00084 00085 00086 00087 00088 00089 00090 00091 00092 adjDEC movlw movwf call movlw movwf call ; movlw movwf call ; goto ; adjBCD movlw addwf movwf btfsc movwf movlw addwf movwf btfsc movwf RETLW loop16 3 0,W temp temp,3 0 30 0,W temp temp,7 0 0 R0 FSR adjBCD R2 FSR adjBCD R1 FSR adjBCD
;
; test if result > 7
; test if result > 7 ; save as MSD
0023 0024 0025 0026
0CFF 0030 0031 0900
0027 0A27 01FF 01FF 0A23
; ;******************************************************************** ; Test Program ;********************************************************************* main movlw 0FF movwf H_byte movwf L_byte ; The 16 bit binary number = FFFF call B2_BCD ; After conversion the Decimal Number ; ; in R0,R1,R2 = 06,55,35 ; self goto self ; org 1FF goto main ; END `-' = Unused)
MEMORY USAGE MAP (`X' = Used,
0000 : XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXX-------- ---------------01C0 : ---------------- ---------------- ---------------- ---------------X All other memory blocks unused. Program Memory Words Used: Program Memory Words Free: Errors : Warnings : Messages : 0 0 reported, 0 reported, 41 471
0 suppressed 0 suppressed
DS00526E-page 32
© 1997 Microchip Technology Inc.
AN526
Please check the Microchip BBS for the latest version of the source code. Microchip's Worldwide Web Address: www.microchip.com; Bulletin Board Support: MCHIPBBS using CompuServe® (CompuServe membership not required).
APPENDIX I:UNSIGNED BCD SUBTRACTION LISTING
MPASM 01.40 Released BCD_SUB.ASM 1-16-1997 12:49:00 PAGE 1
LOC OBJECT CODE VALUE 00001 00002 00003 00004 00005 00006 00007 00008 00009 00010 00011 00012 00013 00014 00015 00016 00017 00018 00019 00020 00021 00022 00023 00024 00025 00026 00027 00028 00001 00002 00224 00029 00030 00031 00032 00033 00034 00035 00036 00037 00038 00039 00040 00041 00042 00043 00044 00045 00046 00047 00048 00049 00050 00051
LINE SOURCE TEXT
00000008 00000008 00000009 00000009
0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F 0010 0011 0012 0013 0014 0015
0208 00A9 0068 0368 0723 0A0C 0769 0A0E 0649 0A0C 0729 0A0E 0C06 00A9 0708 0A17 0068 07E9 0800 06C9 0A17 07A9
LIST P = 16C54, n = 66 ; ;******************* Unsigned BCD Subtraction *************** ; ; This routine performs a 2 Digit Unsigned BCD Subtraction. ; It is assumed that the two BCD numbers to be subtracted are in ; locations Num_1 & Num_2. The result is the difference of Num_1 & Num_2 ; ( Num_2 - Num_1) and is stored in location Num_2 and the overflow carry ; is returned in location Num_1. ; ; Performance : ; Program Memory : 31 ; Clock Cycles : 21 ( worst case ) ; ; ; Program: BCD_SUB.ASM ; Revision Date: ; 1-13-97 Compatibility with MPASMWIN 1.40 ; ;******************************************************************* ; Num_1 equ 8 ; Overflow flow carry overwrites Num_1 result equ 8 ; Num_2 equ 9 ; Num_2 - Num_1 overwrites Num_2 O_flow equ 9 ; include "p16c5x.inc" LIST ;P16C5X.INC Standard Header File, Ver. 3.30 Microchip Technology, Inc. LIST ; BCDSub movf Num_1,W subwf Num_2, F clrf Num_1 rlf Num_1, F btfss STATUS,DC goto adjst1 btfss Num_2,3 ; Adjust LSD of Result goto Over_1 btfsc Num_2,2 goto adjst1 ; Adjust LSD of Result btfss Num_2,1 goto Over_1 ; No : Go for MSD adjst1 movlw 6 subwf Num_2, F Over_1 btfss Num_1,0 ; CY = 0 ? goto adjst2 ; Yes, adjust MSD of result clrf Num_1 btfss Num_2,7 ; No, test for MSD >9 RETLW 0 btfsc Num_2,6 goto adjst2 btfss Num_2,5
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0016 0017 0018 0019 001A 001B 001C 001D 001E 00052 00053 00054 00055 00056 00057 00058 00059 00060 00061 00062 00063 00064 001F 0C23 00065 0020 0028 00066 0021 0C99 00067 0022 0029 00068 0023 0900 00069 00070 00071 0024 0C99 00072 0025 0028 00073 0026 0C00 00074 0027 0029 00075 00076 0028 0900 00077 00078 00079 00080 0029 0A29 00081 00082 01FF 00083 01FF 0A1F 00084 00085 00086 MEMORY USAGE MAP (`X' 0800 0C60 00A9 0068 0703 0800 0C01 0028 0800 adjst2 RETLW movlw subwf clrf btfss RETLW movlw movwf RETLW 0 60 Num_2, F Num_1 STATUS,C 0 1 Num_1 0 ; add 6 to MSD
; test if underflow
Over ; ;******************************************************************** ; Test Program ;********************************************************************* main movlw 23 movwf Num_1 ; Set Num_1 = 23 movlw 99 movwf Num_2 ; Set Num_2 = 99 call BCDSub ; After subtraction, Num_2 = 76 ( 99-23 ) ; ; and Num_1 = 0 ( indicates positive result ) ; movlw 99 movwf Num_1 ; Set Num_1 = 99 movlw 0 movwf Num_2 ; Set Num_2 = 0 ; call BCDSub ; After subtraction, Num_2 = 1 ; ; and Num_1 = 1 ( indicates negative result ) ; ; -1 <- ( -99 ) ; self goto self ; org 1FF goto main ; END = Used, `-' = Unused)
0000 : XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXX------ ---------------01C0 : ---------------- ---------------- ---------------- ---------------X All other memory blocks unused. Program Memory Words Used: Program Memory Words Free: Errors : Warnings : Messages : 0 0 reported, 0 reported, 43 469
0 suppressed 0 suppressed
DS00526E-page 34
© 1997 Microchip Technology Inc.
AN526
Please check the Microchip BBS for the latest version of the source code. Microchip's Worldwide Web Address: www.microchip.com; Bulletin Board Support: MCHIPBBS using CompuServe® (CompuServe membership not required).
APPENDIX J:SQUARE ROOT METHOD
MPASM 01.40 Released SQRT.ASM 1-16-1997 12:55:13 PAGE 1
LOC OBJECT CODE VALUE 00001 00002 00003 00004 00005 00006 00007 00008 00009 00010 00011 00012 00013 00014 00015 00016 00017 00018 00019 00020 00021 00022 00023 00024 00025 00026 00027 00028 00029 00030 00031 00032 00033 00034 00035 00036 00037 00038 00039 00040 00041 00042 00043 00044 00045 00046 00047 00048 00001 00002 00224 00049 00050 00051
LINE SOURCE TEXT
LIST P = 16C54, n = 66 ; ;******************************************************************* ; ; Square Root By Newton Raphson Method ; ; This routine computes the square root of a 16 bit number(with ; low byte in NumLo & high byte in NumHi ). After loading NumLo & ; NumHi with the desired number whose square root is to be computed, ; branch to location Sqrt ( by "GOTO Sqrt" ). " CALL Sqrt" cannot ; be issued because the Sqrt function makes calls to Math routines ; and the stack is completely used up. ; The result = sqrt(NumHi,NumLo) is returned in location SqrtLo. ; The total number of iterations is set to ten. If more iterations ; are desired, change "LupCnt equ .10" to the desired value. Also, ; the initial guess value of the square root is given set as ; input/2 ( in subroutine "init" ). The user may modify this scheme ; if a better initial approximation value is known. A good initial ; guess will help the algorithm converge at a faster rate and thus ; less number of iterations required. ; Two utility math routines are used by this program : D_divS ; and D_add. These two routines are listed as seperate routines ; under double precision Division and