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COVER SHEET BLOCK DIAGRAM GPIO & JUMPER SETTING Intel LGA775-CPU Intel Lakeport -GMCH ICH7 DDR II DIMM 1and DIMM2 1 & 2 & 3 & 4 Clock Generator - ICS954129 PCI EXPRESS X16 & X 1 SLOT VGA CONNECTOR PCI Slot 1 & 2 LAN REALTEK RTL8100C/8110SB/8110SC VIA VT-6307/6308P Azalia CODEC(ALC883)
A
1 2 3 4-6 7-10 11-13 14-16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
MSI
Title
MS-7267
CPU:
Version 3.3
Intel Prescott ( L2=2MB ) - 3.8G Intel Cendar Mill (65nm) - 3.73G & Above Intel Smithfield (90nm Dual core) - 3.2G Intel Conroe (65W Dual core) System Chipset: Intel Lakeport - GMCH (North Bridge) Intel ICH7 (South Bridge) On Board Chipset: BIOS -- FWH FLASH 4Mb Azalia CODEC(ALC 883) LPC Super I/O -- W83627D(E)HG LAN REALTEK RTL8100C/8110SB/8110SC 1394 -- VIA VT-6307/6308P Clock Generator - ICS954129 Main Memory: DDR II * 4 (Max 4GB) Expansion Slots: PCI Express X16 SLOT * 1 PCI Express X1 SLOT * 1 PCI 2.3 SLOT * 2 Intersil PWM: Controller: Intersil 6312CR 3 Phase
LPC I/O - W83627D(E)HG USB CONNECTORS IDE & SATA FWH & FAN ATX & Front Panel MS7 ACPI Controller VRM11 Intersil 6312CR 3Phase EMI Cap Auto BOM manual PWOK MAP History CLOCK MAP POWER MAP
A
MICRO-STAR INt'L CO., LTD.
COVER SHEET
Size Date:
1
Document Number
Rev
MS-7267
Wednesday, November 22, 2006 Sheet 1 of 36
3.1
1
Block Diagram
VRM_GD VTT_PWG
VRM 11
Intersil 6312CR 3-Phase PWM
P.30
Intel LGA775 Processor
P.4~6
VID_GD
FSB
H_PWRGD
H_CPURST#
PWR_GD
PLTRST#2
PCI EXPRESS X16 Connector Analog Video Out
DDRII
4 DDR II DIMM Modules
RSMRST#
MS7
P.29
HD_RST#
P.18
Lakeport GMCH
P.7~10
333/400/533 MHz
PCIRST#
PWR_GD
P.19
UltraDMA 33/66/100
HD_RST#
IDE Primary
P.26
PLRST#
DMI
VRM_GD
PWR_GD PLTRST#_MS7
SERIAL ATA1
P.26
SLP_S4#
PCI Slot 1
PCI Slot 2
SERIAL ATA2
P.26
SERIAL ATA3
A
ICH7
SLP_S3#
P.11~13
PCI
P.26
A
SERIAL ATA4
P.26
PSON# PWRBTN#
USB2.0 USB Port0~ 7
P.25
USB LPC Bus
PWR_OK PLTRST#1 ATX1
P.20 P.20
RSMRST#
ALC883 Azalia Codec
P.23
LPC SIO 83627D(E)HG
P.24
PCIRST#_LAN
PCI LAN RTL8100C 8110SC 1394 VIA VT6307/6308P
P.21
PCI
PCIRST#_1394
FWH
P.27 P.22
Keyboard
P.24
Floopy
P.24
Parallel
P.24
Serial
P.24
PWRBTIN
FP_RST#
Mouse
P.24
JFP1
P.28
PLTRST#1
MSI
Title
MICRO-STAR INt'L CO., LTD.
BLOCK DIAGRAM
Size Date:
1
Document Number
Rev
MS-7267
Wednesday, November 22, 2006 Sheet 2 of 36
3.1
8
7
6
5
4
3
2
1
ICH7
GPIO GPIO[0] GPIO[1] GPIO[2] GPIO[3] GPIO[4] GPIO[5] GPIO[6] GPIO[7] GPIO[8] GPIO[9] GPIO[10] GPIO[11] GPIO[12] GPIO[13] GPIO[14] GPIO[15] GPIO[16] GPIO[17] GPIO[18] GPIO[19] GPIO[20] GPIO[21] GPIO[22] GPIO[23] GPIO[24] GPIO[25] GPIO[26] GPIO[27] GPIO[28] GPIO[29] GPIO[30] GPIO[31] GPIO[32] GPIO[33] GPIO[34] GPIO[35] GPIO[36] GPIO[37] GPIO[38] GPIO[39] GPIO[48] GPIO[49] Alt Func BM_BUSY# PCIREQ[5]# PIRQE# PIRQF# PIRQG# PIRQH# unmuxed unmuxed unmuxed unmuxed unmuxed SMBALERT# unmuxed unmuxed unmuxed unmuxed unmuxed PCIGNT[5]# unmuxed SATA1GP unmuxed SATA0GP PCIREQ[4]# LDRQ1# unmuxed unmuxed unmuxed unmuxed unmuxed OC5# OC6# OC7# unmuxed unmuxed unmuxed unmuxed SATA2GP SATA3GP unmuxed unmuxed GNT4# CPUPWRGD Pin I/O/NC Power AB18 I/O Vcc3p3 C8 I/O V5REF G8 I/OD V5REF F7 I/OD V5REF F8 I/OD V5REF G7 I/OD V5REF AC21 I/O Vcc3p3 AC18 I/O Vcc3p3 E21 I/O VccSus3p3 E20 I/O VccSus3p3 A20 I/O VccSus3p3 B23 I/O VccSus3p3 F19 I/O VccSus3p3 E19 I/O VccSus3p3 R4 I/O VccSus3p3 E22 I/O VccSus3p3 AC22 I/O Vcc3p3 D8 I/O Vcc3p3 AC20 I/O Vcc3p3 AH18 I/O Vcc3p3 AF21 I/O Vcc3p3 AF19 I/O Vcc3p3 A13 I/O Vcc3p3 AA5 I/O Vcc3p3 R3 I/O VccSus3p3 D20 I/O VccSus3p3 A21 I/O VccSus3p3 B21 I/O VccSus3p3 E23 I/O VccSus3p3 C3 I/O VccSus3p3 A2 I/O VccSus3p3 B3 I/O VccSus3p3 AG18 I/O Vcc3p3 AC19 I/O Vcc3p3 U2 I/O Vcc3p3 AD21 I/O Vcc3p3 AH19 I/O Vcc3p3 AE19 I/O Vcc3p3 AD20 I/O Vcc3p3 AE20 I/O Vcc3p3 A14 I/O Vcc3p3 AG24 I/O V_CPU_IO PU N N N N N N N N N N N N N N N N N N N N N N N N N Y N N N N N N N N N N N N N N N N SMI Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y N N N N N N N N N N N N N N N N N N N N N N N N N N Tol 5 5 5 5 5 5 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 CPU Default Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input 0 N/A 1 Input 1 Input Input Input No Change 1 0 0 0 Input Input Input 1 1 0 1 Input Input Input Input N/A N/A Signal Name strapped hi PREQ#5 PIRQ#E PIRQ#F PIRQ#G PIRQ#H ATADET0 strapped hi strapped hi strapped high BIOS_WP# SMB_ALERT# SIO_PME# strapped hi strapped hi strapped hi NC NC NC strapped hi NC strapped hi PREQ#4 NC NC FRONT_IO# NC NC NC OC#2 OC#2 OC#3 NC NC NC NC strapped hi strapped hi strapped hi strapped hi PGNT#4 H_PWRGD Note: FWH GPs should only be used for static options, do not put dynamic nets on these GPIO Pin# Power Tol Signal Name FPGI[0] 6 Main 3.3 pull-up FPGI[1] 5 Main 3.3 pull-up FPGI[2] 4 Main 3.3 pull-up FPGI[3] 3 Main 3.3 pull-up FPGI[4] 30 Main 3.3 pull-down
FWH
D
D
PCI Config.
DEVICE MCP1 INT Pin PIRQ#A PIRQ#B PIRQ#C PIRQ#D PIRQ#B PIRQ#C PIRQ#D PIRQ#A REQ#/GNT# IDSEL CLOCK
PCI SLOT 1
PREQ#0 PGNT#0 AD16 PCI_CLK0
PCI SLOT 2
PREQ#1 PGNT#1
AD17
PCI_CLK1
C
C
PCI LAN
PIRQ#E
PREQ#3 PGNT#3 PREQ#4 PGNT#4
AD20
LAN_PCLK
PCI 1394
PIRQ#F
AD21
1394_PCLK
DDRII DIMM Config.
DEVICE DIMM 1 ADDRESS A0H CLOCK MCLK_A0/MCLK_A#0 MCLK_A1/MCLK_A#1 MCLK_A2/MCLK_A#2 MCLK_A3/MCLK_A#3 MCLK_A4/MCLK_A#4 MCLK_A5/MCLK_A#5 MCLK_B0/MCLK_B#0 MCLK_B1/MCLK_B#1 MCLK_B2/MCLK_B#2 MCLK_B3/MCLK_B#3 MCLK_B4/MCLK_B#4 MCLK_B5/MCLK_B#5
JUMPER SETTING
JBAT1 JCI1 Open (1-2) (1-2)NORMAL (2-3)CLEAR
B
B
DIMM 2
A2H
Chassis Intrision Normal Chassis Open
DIMM 3
A4H
DIMM 2
Following are the GPIOs that need to be terminated properly if not used: GPIO[39:36,23:21,19,7:0]: default as inputs and should be pulled up to Vcc3_3 if unused. GPIO[31:29,15:8]: default as inputs and should be pulled up to VccSus3_3 if unused.
A6H
A
A
MSI
Title
MICRO-STAR INt'L CO., LTD.
GPIO MAP
Size Date:
8 7 6 5 4 3 2
Document Number
Rev
MS-7267
Wednesday, November 22, 2006 Sheet
1
3.1 3 of 36
8
7
6
5
4
3
2
1
VCCP R67 X_0R-1 VCC_VRM_SENSE
CPU SIGNAL BLOCK
VCC_VRM_SENSE 30 VSS_VRM_SENSE 30 30 30 30 30 30 30 30 30
VSS_VRM_SENSE
D
7
H_A#[3..31] H_A#31 H_A#30 H_A#29 H_A#28 H_A#27 H_A#26 H_A#25 H_A#24 H_A#23 H_A#22 H_A#21 H_A#20 H_A#19 H_A#18 H_A#17 H_A#16 H_A#15 H_A#14 H_A#13 H_A#12 H_A#11 H_A#10 H_A#9 H_A#8 H_A#7 H_A#6 H_A#5 H_A#4 H_A#3
VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 R68
R61 X_0R-1
BSEL 2 0 0 0 1 0 1 0 0 0 0 1
TABLE FSB FREQUENCY
D
267 MHZ (1067) 200 MHZ (800) 133 MHZ (533)
AJ6 AJ5 AH5 AH4 AG5 AG4 AG6 AF4 AF5 AB4 AC5 AB5 AA5 AD6 AA4 Y4 Y6 W6 AB6 W5 V4 V5 U4 U5 T4 U6 T5 R4 M4 L4 M5 P6 L5
AN3 AN4 AN5 AN6
AJ3 AK3
AM7 AM5 AL4 AK4 AL6 AM3 AL5 AM2
AC2
VTT_OUT_RIGHT 680R0402 R66 X_62R-1
U4A 7 H_DBI#[0..3] H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3 H_IERR# 11 11 11 7 7 7
C
VCC_SENSE VSS_SENSE VCC_MB_REGULATION VSS_MB_REGULATION
RSVD#AM7 VID6# VID5# VID4# VID3# VID2# VID1# VID0#
DBR#
A35# A34# A33# A32# A31# A30# A29# A28# A27# A26# A25# A24# A23# A22# A21# A20# A19# A18# A17# A16# A15# A14# A13# A12# A11# A10# A9# A8# A7# A6# A5# A4# A3#
ITP_CLK1 ITP_CLK0
A8 G11 D19 C20 F2 AB2 AB3 R3 M3 AD3 P3 H4 B2 C1 E3 D2 C3 C2 D4 E4 G8 G7
DBI0# DBI1# DBI2# DBI3# EDRDY# IERR# MCERR# FERR#/PBE# STPCLK# BINIT# INIT# RSP# DBSY# DRDY# TRDY# ADS# LOCK# BNR# HIT# HITM# BPRI# DEFER# TDI TDO TMS TRST# TCK THERMDA THERMDC THERMTRIP# GND/SKTOCC# PROCHOT# IGNNE# SMI# A20M# TESTI_13 RSVD#AH2 RESERVED0 RESERVED1 RESERVED2 RESERVED3 RESERVED4 RESERVED5 BOOTSELECT LL_ID0 LL_ID1 BSEL0 BSEL1 BSEL2 PWRGOOD RESET# D63# D62# D61# D60# D59# D58# D57# D56# D55# D54#
FOR CONROE-L
1KR AN7 VID_SEL_CPU R62 H1 H2 TP_GTLREF_SEL H29 MCH_GTLREF_CPU E24 H_BPM#5 AG3 H_BPM#4 AF2 H_BPM#3 AG2 H_BPM#2 AD2 H_BPM#1 AJ1 H_BPM#0 AJ2 G5 J6 K6 M6 J5 K4 W2 P1 H5 G4 G3 F24 G24 G26 G27 G25 F25 W3 F26 AK6 G6 G28 F28 A3 F5 B3 U3 U2 F3 T2 J2 R1 G2 T1 A13 J17 H16 H15 J16 AD5 R6 C17 G19 E12 B9 A16 G20 G12 C8 L1 K1 H_RS#2 H_RS#1 H_RS#0 1 1 TP2 TP1 R87 R92 R86 R94 R85 R111 TP4 TP7 TP5 TP3 H_ADSTB#1 H_ADSTB#0 H_DSTBP#3 H_DSTBP#2 H_DSTBP#1 H_DSTBP#0 H_DSTBN#3 H_DSTBN#2 H_DSTBN#1 H_DSTBN#0 H_NMI H_INTR 7 7 7 7 7 7 7 7 7 7 11 11 H_BR#0 60.4R1%0402 60.4R1%0402 60.4R1%0402 60.4R1%0402 60.4R1%0402 60.4R1%0402 H_BR#0 7 H_REQ#4 H_REQ#3 H_REQ#2 H_REQ#1 H_REQ#0 H_TESTHI12 H_TESTHI11 H_TESTHI10 H_TESTHI9 H_TESTHI8 VID_SEL CPU_GTLREF0 5 CPU_GTLREF1 5 TP6 1 MCH_GTLREF_CPU 7 30
H_FERR# H_STPCLK# H_INIT# H_DBSY# H_DRDY# H_TRDY#
VID_SELECT GTLREF0 GTLREF1 GTLREF_SEL GTLREF2 BPM5# BPM4# BPM3# BPM2# BPM1# BPM0# PCREQ# REQ4# REQ3# REQ2# REQ1# REQ0# TESTHI12 TESTHI11 TESTHI10 TESTHI9 TESTHI8 TESTHI7 TESTHI6 TESTHI5 TESTHI4 TESTHI3 TESTHI2 TESTHI1 TESTHI0 FORCEPH RSVD#G6 BCLK1# BCLK0# RS2# RS1# RS0# AP1# AP0# BR0# COMP5 COMP4 COMP3 COMP2 COMP1 COMP0 DP3# DP2# DP1# DP0# ADSTB1# ADSTB0# DSTBP3# DSTBP2# DSTBP1# DSTBP0# DSTBN3# DSTBN2# DSTBN1# DSTBN0# LINT1/NMI LINT0/INTR
Prescott / Cedar Mill LL_ID[1:0] = 00 GTLREF_SEL = 0 VTT_SEL = 1
PECI H_REQ#[0..4] RN9 H_BR#0 1 3 5 7 1 3 5 H_TESTHI1 7 RN8 RN30 1 3 5 7 R83 R91 7
PECI
24 RN2 VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VTT_OUT_LEFT RN5 C64 X_C0.1U16Y0402 C62 C0.1U16Y0402 1 3 5 7 1 3 5 7 8P4R-680R 2 4 6 8 2 4 6 8 8P4R-680R VTT_OUT_RIGHT
C
7 7 7 7 7 7 7
H_ADS# H_LOCK# H_BNR# H_HIT# H_HITM# H_BPRI# H_DEFER# H_TDI H_TDO H_TMS H_TRST# H_TCK
24 THERMDA_CPU 24 VTIN_GND 11 TRMTRIP# VTT_OUT_RIGHT 11 11 11 R52 H_IGNNE# ICH_H_SMI# H_A20M# 130R1%-1
AD1 AF1 AC1 AG1 AE1 AL1 AK1 M2 AE8 H_PROCHOT# AL2 N2 P2 K3 H_TESTHI13 L2 AH2 N5 AE6 C9 G10 D16 A20 Y1 V2 AA2 G29 H30 G30 N1 G23 H_D#63 H_D#62 H_D#61 H_D#60 H_D#59 H_D#58 H_D#57 H_D#56 H_D#55 H_D#54 B22 A22 A19 B19 B21 C21 B18 A17 B16 C18
8P4R-62R0402 2 4 6 8 2 4 6 8 8P4R-62R0402 V_FSB_VTT
H_TESTHI2_7 H_TESTHI1 H_TESTHI0 H_FORCEPH RSVD_G6
8P4R-62R0402 2 4 6 8 130R1%0402 VTT_OUT_LEFT VTT_OUT_LEFT X_51R-1
RN3 1 3 5 7 1 3 5 7 1 3 5 7
VTT_OUT_LEFT 5
CK_H_CPU# 17 CK_H_CPU 17 5,6 VTT_OUT_RIGHT H_RS#[0..2] 7
VTT_OUT_RIGHT RN4 C58 C52 C0.1U16Y0402 X_C0.1U16Y0402 RN6
11
H_SLP#
R90
X_0R0402
8P4R-62R0402 2 4 6 8 2 4 6 8 8P4R-62R0402 2 4 6 8 8P4R-62R0402
H_BPM#3 H_BPM#5 H_BPM#1 H_BPM#0 H_TDI H_BPM#2 H_TDO H_BPM#4 H_TRST# H_IERR# H_TMS H_TCK
X_C0.1U25Y R82 C56 9,17 H_FSBSEL0 9,17 H_FSBSEL1 9,17 H_FSBSEL2 11 7 7 H_PWRGD H_CPURST# X_62R0402
1 1 1 1
C61 X_C0.1U16Y0402
B
VTT_OUT_RIGHT
R77
X_1KR-1
H_COMP5 H_COMP4 H_COMP3 H_COMP2 H_COMP1 H_COMP0
VTT_OUT_LEFT 5
PLACE BPM TERMINATION NEAR CPU
B
5 VTT_OUT_LEFT
VTT_OUT_LEFT
H_D#[0..63]
RN7
1 3 5 7
H_CPURST# 2 H_TESTHI13 4 MSID1 6 MSID0 8 8P4R-62R0402
H_CPURST# 7 MSID1 MSID0 6 6
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS AND CEDAR MILL ARE SUPPORTED
V_FSB_VTT RN32
D53# D52# D51# D50# D49# D48# D47# D46# D45# D44# D43# D42# D41# D40# D39# D38# D37# D36# D35# D34# D33# D32# D31# D30# D29# D28# D27# D26# D25# D24# D23# D22# D21# D20# D19# D18# D17# D16# D15# D14# D13# D12# D11# D10# D9# D8# D7# D6# D5# D4# D3# D2# D1# D0#
H_D#53 B15 H_D#52 C14 H_D#51 C15 H_D#50 A14 H_D#49 D17 H_D#48 D20 H_D#47 G22 H_D#46 D22 H_D#45 E22 H_D#44 G21 H_D#43 F21 H_D#42 E21 H_D#41 F20 H_D#40 E19 H_D#39 E18 H_D#38 F18 H_D#37 F17 H_D#36 G17 H_D#35 G18 H_D#34 E16 H_D#33 E15 H_D#32 G16 H_D#31 G15 H_D#30 F15 H_D#29 G14 H_D#28 F14 H_D#27 G13 H_D#26 E13 H_D#25 D13 H_D#24 F12 H_D#23 F11 H_D#22 D10 H_D#21 E10 H_D#20 D7 H_D#19 E9 H_D#18 F9 H_D#17 F8 H_D#16 G9 H_D#15 D11 H_D#14 C12 H_D#13 B12 H_D#12 D8 H_D#11 C11 H_D#10 B10 H_D#9 A11 H_D#8 A10 H_D#7 A7 H_D#6 B7 H_D#5 B6 H_D#4 A5 H_D#3 C6 H_D#2 A4 H_D#1 C5 H_D#0 B4
ZIF-SOCK775-15u-in
1 3 5 7
2 4 6 8 8P4R-470R0402
H_FSBSEL1 H_FSBSEL0 H_FSBSEL2
H_FSBSEL1 9,17 H_FSBSEL0 9,17 H_FSBSEL2 9,17
A
A
Title
MSI
MICRO-STAR INt'L CO., LTD.
Intel LGA775 - Signals
Size Date:
8 7 6 5 4 3 2
Document Number
Rev
MS-7267
Wednesday, November 22, 2006 Sheet 4
1
3.1 of 36
A
B
C
D
VCCP
29,30 AF19 AF18 AF15 AF14 AF12 AF11 AE9 AE23 AE22 AE21 AE19 AE18 AE15 AE14 AE12 AE11 AD8 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AC8 AC30 AC29 AC28 AC27 AC26 AC25 AC24 AC23 AB8 AA8
VTT_OUT_RIGHT
VTT_OUT_RIGHT
VCCP
GTLREF VOLTAGE SHOULD BE 0.63*VTT = 0.756V
GTLREF VOLTAGE SHOULD BE 0.63*VTT = 0.756V
8
8
U4B
VCC#AF19 VCC#AF18 VCC#AF15 VCC#AF14 VCC#AF12 VCC#AF11 VCC#AE9 VCC#AE23 VCC#AE22 VCC#AE21 VCC#AE19 VCC#AE18 VCC#AE15 VCC#AE14 VCC#AE12 VCC#AE11 VCC#AD8 VCC#AD30 VCC#AD29 VCC#AD28 VCC#AD27 VCC#AD26 VCC#AD25 VCC#AD24 VCC#AD23 VCC#AC8 VCC#AC30 VCC#AC29 VCC#AC28 VCC#AC27 VCC#AC26 VCC#AC25 VCC#AC24 VCC#AC23 VCC#AB8 VCC#AA8
VID_GD# R70 R74 124R1%0402 124R1%0402 VCC5_SB VTT_OUT_LEFT R88 R84 4.7KR0402 680R0402 C50 C1U16Y C57 C1U16Y R75 R76 R89 1KR0402 210R1%0402 210R1%0402
VCCP
R71
R79
10R0402
10R0402
7
7
Q9 VTT_PWG C54 X_C0.1U16Y0402 C60 X_C0.1U16Y0402
N-MMBT3904_SOT23 C59 X_C1U16Y
CPU_GTLREF1 4
CPU_GTLREF0 4
6 5
6 5
V_FSB_VTT
L5
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
4
4
1 CP7 2 X_COPPER
V_1P5_CORE CP10 X_COPPER C143 C144 C1U10Y C10U10Y0805 H_VCCPLL
Y8 Y30 Y29 Y28 Y27 Y26 Y25 Y24 Y23 W8 W30 W29 W28 W27 W26 W25 W24 W23 V8 U8 U30 U29 U28 U27 U26 U25 U24 U23 T8 T30 T29 T28 T27 T26 T25 T24 T23 R8 P8 N8 N30 N29 N28 N27 N26 N25 N24 N23 M8 M30 M29 M28 M27 M26 M25 M24 M23 L8 K8 K30 K29 K28 K27 K26 K25 K24 K23 J9 J8 J30 J29 J28 J27 J26 J25 J24 J23 J22 J21 J20 J19 J18 J15 J14 J13 J12 J11 J10 AN9 AN8 AN30 AN29 AN26 AN25 VCC#Y8 VCC#Y30 VCC#Y29 VCC#Y28 VCC#Y27 VCC#Y26 VCC#Y25 VCC#Y24 VCC#Y23 VCC#W8 VCC#W30 VCC#W29 VCC#W28 VCC#W27 VCC#W26 VCC#W25 VCC#W24 VCC#W23 VCC#V8 VCC#U8 VCC#U30 VCC#U29 VCC#U28 VCC#U27 VCC#U26 VCC#U25 VCC#U24 VCC#U23 VCC#T8 VCC#T30 VCC#T29 VCC#T28 VCC#T27 VCC#T26 VCC#T25 VCC#T24 VCC#T23 VCC#R8 VCC#P8 VCC#N8 VCC#N30 VCC#N29 VCC#N28 VCC#N27 VCC#N26 VCC#N25 VCC#N24 VCC#N23 VCC#M8 VCC#M30 VCC#M29 VCC#M28 VCC#M27 VCC#M26 VCC#M25 VCC#M24 VCC#M23 VCC#L8 VCC#K8 VCC#K30 VCC#K29 VCC#K28 VCC#K27 VCC#K26 VCC#K25 VCC#K24 VCC#K23 VCC#J9 VCC#J8 VCC#J30 VCC#J29 VCC#J28 VCC#J27 VCC#J26 VCC#J25 VCC#J24 VCC#J23 VCC#J22 VCC#J21 VCC#J20 VCC#J19 VCC#J18 VCC#J15 VCC#J14 VCC#J13 VCC#J12 VCC#J11 VCC#J10 VCC#AN9 VCC#AN8 VCC#AN30 VCC#AN29 VCC#AN26 VCC#AN25 X_10U125m_0805-1 C118 C1U16Y VTT_OUT_RIGHT VTT_OUT_LEFT VTT_SEL VTT#A25 VTT#A26 VTT#A27 VTT#A28 VTT#A29 VTT#A30 VTT#B25 VTT#B26 VTT#B27 VTT#B28 VTT#B29 VTT#B30 VTT#C25 VTT#C26 VTT#C27 VTT#C28 VTT#C29 VTT#C30 VTT#D25 VTT#D26 VTT#D27 VTT#D28 VTT#D29 VTT#D30 VTTPWRGD 1 2 3 4 1 2 3 4 RSVD#F29 F29
VCC#AF21 VCC#AF22 VCC#AF8 VCC#AF9 VCC#AG11 VCC#AG12 VCC#AG14 VCC#AG15 VCC#AG18 VCC#AG19 VCC#AG21 VCC#AG22 VCC#AG25 VCC#AG26 VCC#AG27 VCC#AG28 VCC#AG29 VCC#AG30 VCC#AG8 VCC#AG9 VCC#AH11 VCC#AH12 VCC#AH14 VCC#AH15 VCC#AH18 VCC#AH19 VCC#AH21 VCC#AH22 VCC#AH25 VCC#AH26 VCC#AH27 VCC#AH28 VCC#AH29 VCC#AH30 VCC#AH8 VCC#AH9 VCC#AJ11 VCC#AJ12 VCC#AJ14 VCC#AJ15 VCC#AJ18 VCC#AJ19 VCC#AJ21 VCC#AJ22 VCC#AJ25 VCC#AJ26 VCC#AJ8 VCC#AJ9 VCC#AK11 VCC#AK12 VCC#AK14 VCC#AK15 VCC#AK18 VCC#AK19 VCC#AK21 VCC#AK22 VCC#AK25 VCC#AK26 VCC#AK8 VCC#AK9 VCC#AL11 VCC#AL12 VCC#AL14 VCC#AL15 VCC#AL18 VCC#AL19 VCC#AL21 VCC#AL22 VCC#AL25 VCC#AL26 VCC#AL29 VCC#AL30 VCC#AL8 VCC#AL9 VCC#AM11 VCC#AM12 VCC#AM14 VCC#AM15 VCC#AM18 VCC#AM19 VCC#AM21 VCC#AM22 VCC#AM25 VCC#AM26 VCC#AM29 VCC#AM30 VCC#AM8 VCC#AM9 VCC#AN11 VCC#AN12 VCC#AN14 VCC#AN15 VCC#AN18 VCC#AN19 VCC#AN21 VCC#AN22 VCCA VSSA VCCPLL VCC-IOPLL
AF21 AF22 AF8 AF9 AG11 AG12 AG14 AG15 AG18 AG19 AG21 AG22 AG25 AG26 AG27 AG28 AG29 AG30 AG8 AG9 AH11 AH12 AH14 AH15 AH18 AH19 AH21 AH22 AH25 AH26 AH27 AH28 AH29 AH30 AH8 AH9 AJ11 AJ12 AJ14 AJ15 AJ18 AJ19 AJ21 AJ22 AJ25 AJ26 AJ8 AJ9 AK11 AK12 AK14 AK15 AK18 AK19 AK21 AK22 AK25 AK26 AK8 AK9 AL11 AL12 AL14 AL15 AL18 AL19 AL21 AL22 AL25 AL26 AL29 AL30 AL8 AL9 AM11 AM12 AM14 AM15 AM18 AM19 AM21 AM22 AM25 AM26 AM29 AM30 AM8 AM9 AN11 AN12 AN14 AN15 AN18 AN19 AN21 AN22
A23 B23 D23 C23
A25 A26 A27 A28 A29 A30 B25 B26 B27 B28 B29 B30 C25 C26 C27 C28 C29 C30 D25 D26 D27 D28 D29 D30 AM6 AA1 J1 F27
H_VCCA H_VSSA H_VCCPLL H_VCCA
VTT_PWG
ZIF-SOCK775-15u-in
VTT_OUT_RIGHT VTT_OUT_LEFT
3
3
R112 X_1KR-1
C111 X_C10U10Y0805 C105 C10U10Y0805 H_VSSA H_VCCA
FOR CONROE-L
V_FSB_VTT
VTT_OUT_RIGHT 4,6 VTT_OUT_LEFT 4 X_1KR-1 R114
1 RSVD
0 TEJ/PSC
Title
Size
Date:
2
VCC3
2
MSI
V_FSB_VTT
CAPS FOR FSB GENERIC
VTT_PWG SPEC : High > 0.9V Low < 0.3V Trise < 150ns
Document Number Wednesday, November 22, 2006 Sheet
1
C139 C10U10Y0805 C150 X_C10U10Y0805 C132 C10U10Y0805
MS-7267
5 of 36 Rev 3.1
1
MICRO-STAR INt'L CO., LTD.
Intel LGA775 - Power
A
B
C
D
A
B
C
D
FM9 FM2 FM10 1 1 1 OPTICS-M120 OPTICS-M120
FM13
OPTICS-M100
OPTICS-M100
CP8
X_COPPER
Optics Orientation Holes
8
8
2
FM7
FM12 FM18 1 1 FM16 OPTICS-M120 OPTICS-M120
OPTICS-M100 FM4 FM1 FM17 A12 A15 A18 A2 A21 A24 A6 A9 AA23 AA24 AA25 AA26 AA27 AA28 AA29 AA3 AA30 AA6 AA7 AB1 AB23 AB24 AB25 AB26 AB27 AB28 AB29 AB30 AB7 AC3 AC6 AC7 AD4 AD7 AE10 AE13 AE16 AE17 AE2 AE20 AE24 AE25 AE26 AE27 AE28 1 1 FM3 OPTICS-M100 OPTICS-M120 OPTICS-M120 U4C VSS#A12 VSS#A15 VSS#A18 VSS#A2 VSS#A21 VSS#A24 VSS#A6 VSS#A9 VSS#AA23 VSS#AA24 VSS#AA25 VSS#AA26 VSS#AA27 VSS#AA28 VSS#AA29 VSS#AA3 VSS#AA30 VSS#AA6 VSS#AA7 VSS#AB1 VSS#AB23 VSS#AB24 VSS#AB25 VSS#AB26 VSS#AB27 VSS#AB28 VSS#AB29 VSS#AB30 VSS#AB7 VSS#AC3 VSS#AC6 VSS#AC7 VSS#AD4 VSS#AD7 VSS#AE10 VSS#AE13 VSS#AE16 VSS#AE17 VSS#AE2 VSS#AE20 VSS#AE24 VSS#AE25 VSS#AE26 VSS#AE27 VSS#AE28 FM5 FM14 1 FM11 OPTICS-M100
OPTICS-M100
4 MSID0 4 MSID1 4,5 VTT_OUT_RIGHT
R80 60.4R1%0402
OPTICS-M120
OPTICS-M100
OPTICS-M100
R81 60.4R1%0402
7
7
COMP6 COMP7 RSVD#AE4 RSVD#D1 RSVD#D14 RSVD#E23
H_COMP6 Y3 AE3 H_COMP7 AE4 D1 D14 E23 1 TP9 1 1
FM8 FM15 1 OPTICS-M120
FM6
OPTICS-M100
OPTICS-M100
TP10TP8
RSVD#E5 RSVD#E6 RSVD#E7 RSVD#F23 IMPSEL# RSVD#B13
E5 E6 E7 F23 F6 B13
R93
X_51R-1 30R H_COMP8 RSVD#J3 RSVD#N4 RSVD#P5 MSID[1] MSID[0] RSVD#AC4 J3 N4 P5 V1 W1 AC4
R113
6
6
6 H1 H5 MH1
7
6
7
5 4 9 4 9
MSID1
5
5
CP3
4
5 4 9 4 9
MH1 8 5 8 3 6 H6 H3 MH1 8 9 4 9 5 8 3 6 H7 H2 MH1 8 5 8 3 2 3 2 7 6 7 MH1 2 3 2 7 6 7 MH1 2 3 2
2005 Perf FMB 0
1 2 X_COPPER
2005 Value FMB 1
0 0
5
MSID0
4
4
6 H4 MH1
7
6
7
H8
5 4 9 4
MH1 8 5 3 2
8 9 R42
FOR CONROE-L
3
2
X_1KR
AE29 AE30 AE5 AE7 AF10 AF13 AF16 AF17 AF20 AF23 AF24 AF25 AF26 AF27 AF28 AF29 AF3 AF30 AF6 AF7 AG10 AG13 AG16 AG17 AG20 AG23 AG24 AG7 AH1 AH10 AH13 AH16 AH17 AH20 AH23 AH24 AH3 AH6 AH7 AJ10 AJ13 AJ16 AJ17 AJ20 AJ23 AJ24 AJ27 AJ28 AJ29 AJ30 AJ4 AJ7 AK10 AK13 AK16 AK17 AK2 AK20 AK23 AK24 AK27 AK28 AK29 AK30 AK5 AK7 AL10 AL13 AL16 AL17 AL20 AL23 AL24 AL27 AL28 AL3 AL7 AM1 AM10 AM13 AM16 AM17 AM20 AM23 AM24 AM27 AM28 AM4 VSS#AE29 VSS#AE30 VSS#AE5 VSS#AE7 VSS#AF10 VSS#AF13 VSS#AF16 VSS#AF17 VSS#AF20 VSS#AF23 VSS#AF24 VSS#AF25 VSS#AF26 VSS#AF27 VSS#AF28 VSS#AF29 VSS#AF3 VSS#AF30 VSS#AF6 VSS#AF7 VSS#AG10 VSS#AG13 VSS#AG16 VSS#AG17 VSS#AG20 VSS#AG23 VSS#AG24 VSS#AG7 VSS#AH1 VSS#AH10 VSS#AH13 VSS#AH16 VSS#AH17 VSS#AH20 VSS#AH23 VSS#AH24 VSS#AH3 VSS#AH6 VSS#AH7 VSS#AJ10 VSS#AJ13 VSS#AJ16 VSS#AJ17 VSS#AJ20 VSS#AJ23 VSS#AJ24 VSS#AJ27 VSS#AJ28 VSS#AJ29 VSS#AJ30 VSS#AJ4 VSS#AJ7 VSS#AK10 VSS#AK13 VSS#AK16 VSS#AK17 VSS#AK2 VSS#AK20 VSS#AK23 VSS#AK24 VSS#AK27 VSS#AK28 VSS#AK29 VSS#AK30 VSS#AK5 VSS#AK7 VSS#AL10 VSS#AL13 VSS#AL16 VSS#AL17 VSS#AL20 VSS#AL23 VSS#AL24 VSS#AL27 VSS#AL28 VSS#AL3 VSS#AL7 VSS#AM1 VSS#AM10 VSS#AM13 VSS#AM16 VSS#AM17 VSS#AM20 VSS#AM23 VSS#AM24 VSS#AM27 VSS#AM28 VSS#AM4
AN1 AN10 AN13 AN16 AN17 AN2 AN20 AN23 AN24 AN27 AN28
3
VSS#AN1 VSS#AN10 VSS#AN13 VSS#AN16 VSS#AN17 VSS#AN2 VSS#AN20 VSS#AN23 VSS#AN24 VSS#AN27 VSS#AN28 B1 B11 B14 VSS#B1 VSS#B11 VSS#B14
VSS#Y7 VSS#Y5 VSS#Y2 VSS#W7 VSS#W4 VSS#V7 VSS#V6 VSS#V30 VSS#V3 VSS#V29 VSS#V28 VSS#V27 VSS#V26 VSS#V25 VSS#V24 VSS#V23 VSS#U7 VSS#U1 VSS#T7 VSS#T6 VSS#T3 VSS#R7 VSS#R5 VSS#R30 VSS#R29 VSS#R28 VSS#R27 VSS#R26 VSS#R25 VSS#R24 VSS#R23 VSS#R2 VSS#P7 VSS#P4 VSS#P30 VSS#P29 VSS#P28 VSS#P27 VSS#P26 VSS#P25 VSS#P24 VSS#P23 VSS#N7 VSS#N6 VSS#N3 VSS#M7 VSS#M1 VSS#L7 VSS#L6 VSS#L30 VSS#L3 VSS#L29 VSS#L28 VSS#L27 VSS#L26 VSS#L25 VSS#L24 VSS#L23 VSS#K7 VSS#K5 VSS#K2 VSS#J7 VSS#J4 VSS#H9 VSS#H8 VSS#H7 VSS#H6 VSS#H3 VSS#H28 VSS#H27 VSS#H26 VSS#H25 VSS#H24 VSS#H23 VSS#H22 VSS#H21 VSS#H20 VSS#H19 VSS#H18 VSS#H17 VSS#H14 VSS#H13 VSS#H12 VSS#H11 VSS#H10 VSS#G1 VSS#F7 VSS#F4 VSS#F22 VSS#F19 VSS#F16 VSS#F13 VSS#F10 VSS#E8 VSS#E29 VSS#E28 VSS#E27 VSS#E26 VSS#E25 VSS#E20 VSS#E2 VSS#E17 VSS#E14 VSS#E11 VSS#D9 VSS#D6 VSS#D5 VSS#D3 VSS#D24 VSS#D21 VSS#D18 VSS#D15 VSS#D12 VSS#C7 VSS#C4 VSS#C24 VSS#C22 VSS#C19 VSS#C16 VSS#C13 VSS#C10 VSS#B8 VSS#B5 VSS#B24 VSS#B20 VSS#B17
Y7 Y5 Y2 W7 W4 V7 V6 V30 V3 V29 V28 V27 V26 V25 V24 V23 U7 U1 T7 T6 T3 R7 R5 R30 R29 R28 R27 R26 R25 R24 R23 R2 P7 P4 P30 P29 P28 P27 P26 P25 P24 P23 N7 N6 N3 M7 M1 L7 L6 L30 L3 L29 L28 L27 L26 L25 L24 L23 K7 K5 K2 J7 J4 H9 H8 H7 H6 H3 H28 H27 H26 H25 H24 H23 H22 H21 H20 H19 H18 H17
3
H14 H13 H12 H11 H10 G1 F7 F4 F22 F19 F16 F13 F10 E8 E29 E28 E27 E26 E25 E20 E2 E17 E14 E11 D9 D6 D5 D3 D24 D21 D18 D15 D12 C7 C4 C24 C22 C19 C16 C13 C10 B8 B5 B24 B20 B17
ZIF-SOCK775-15u-in
Title
Size
Date:
2
2
MSI
1 CP9 1 CP4
Document Number Wednesday, November 22, 2006 Sheet
1
2
2
X_COPPER
X_COPPER
Intel LGA775 - GND MS-7267
6 of 36 Rev 3.1
1
MICRO-STAR INt'L CO., LTD.
A B C
D
8
7
6
5
4
3
2
1
V_1P5_CORE
U7A 4 H_A#[3..31] H_A#3 J39 H_A#4 K38 H_A#5 J42 H_A#6 K35 H_A#7 J37 H_A#8 M34 H_A#9 N35 H_A#10 R33 H_A#11 N32 H_A#12 N34 H_A#13 M38 H_A#14 N42 H_A#15 N37 H_A#16 N38 H_A#17 R32 H_A#18 R36 H_A#19 U37 H_A#20 R35 H_A#21 R38 H_A#22 V33 H_A#23 U34 H_A#24 U32 H_A#25 V42 H_A#26 U35 H_A#27 Y36 H_A#28 Y38 H_A#29 AA37 H_A#30 V32 H_A#31 Y34 M36 V35 F38 AA41 D42 U39 U40 W42 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 E41 D41 K36 G37 E42 U41 W41 P40 W40 U42 V41 Y40 H_RS#0 H_RS#1 H_RS#2 T40 Y43 T43 M31 M29 AJ9 C30 AJ12 M18 A28 C27 B27 D27 D28 HA3# HA4# HA5# HA6# HA7# HA8# HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31#
N17 P17 P18 P20 P21 AA22 AB21 AB22 AB23 AC22 AD14 AF6 AF7 AF8 AF9 AF10 AF11 AF12 AF13 AF14 AF30 AG2 AG3 AG4 AG5 AG6 AG7 AG8 AG9 AG10 AG11 AG12 AG13 AG14 AH1 AH2 AH4 AJ5 AJ13 AJ14 AK2 AK3 AK4 AK14 AK15 AK20 R15 R17 R18 R20 R21 R23 R24 U15 U17 U18 U19 U20 U21 U22 U23 U24 U25 U26 V15 V17 V18 V19 V20 V21 V22 V23 V25 V27 W17 W18 W19 W20 W22 W24 W26 W27 Y15 M17
D
4 4 4 4 4 4 4 4
H_ADSTB#0 H_ADSTB#1 H_BR#0 H_BPRI# H_BNR# H_LOCK# H_ADS#
HAD_STB0# HAD_STB1# HPCREQ# HBREQ0# HBPRI# HBNR# HLOCK# HADS# HREQ0# HREQ1# HREQ2# HREQ3# HREQ4# HHIT# HHITM# HDEFER# HTRDY# HDBSY# HDRDY# HEDRDY# RS0# RS1# RS2# HCLKP HCLKN PWROK HCPURST# RSTIN# ICH_SYNC# HRCOMP HSCOMP HSWING HDVREF HACCVREF
C
H_REQ#[0..4]
4 4 4 4 4 4 4
H_HIT# H_HITM# H_DEFER# H_TRDY# H_DBSY# H_DRDY#
H_RS#[0..2]
PWR_GD R213 X_10KR-1
17 17
CK_H_MCH CK_H_MCH#
HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8# HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
P41 M39 P42 M42 N41 M40 L40 M41 K42 G39 J41 G42 G40 G41 F40 F43 F37 E37 J35 D39 C41 B39 B40 H34 C37 J32 B35 J34 B34 F32 L32 J31 H31 M33 K31 M27 K29 F31 H29 F29 L27 M24 J26 K26 G26 H24 K24 F24 E31 A33 E40 D37 C39 D38 D33 C35 D34 C34 B31 C31 C32 D32 B30 D30 K40 A38 E29 B32 K41 L43 F35 G34 J27 M26 E34 B37
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3 H_DSTBP#0 4 H_DSTBN#0 4 H_DSTBP#1 4 H_DSTBN#1 4 H_DSTBP#2 4 H_DSTBN#2 4 H_DSTBP#3 4 H_DSTBN#3 4
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
H_D#[0..63]
4
D
C
B
12,29 PWR_GD 4 H_CPURST# ICH_SYNC# HXRCOMP HXSCOMP HXSWING
11,24,27 PLTRST# 12 ICH_SYNC# R132 16.9R1%
KDINV_0# HDINV_1# HDINV_2# HDINV_3# HD_STBP0# HD_STBN0# HD_STBP1# HD_STBN1# HD_STBP2# HD_STBN2# VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC HD_STBP3# HD_STBN3# Lakeport NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC
H_DBI#[0..3]
4
B
MCH_GTLREF_CPU
RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD AA35 AA42 AA34 AA38 L15 M15 U27 R27 A43 M11 AG25 AG26 AG27 AJ24 AJ27 AK40 AL39 AW17 AW18 AY14 BC16 AD30 AC34 Y30 Y33 AF31 AD31 U30 V31 AA30 AC30 AK21 AJ23 AJ26 AL29 AL20 AJ21 AL26 AK27 AJ29 AG29 V30
BC43 BC42 BC2 BC1 BB43 BB2 BB1 BA2 AW26 AW2 AV27 AV26 E35 C42 C2 B43 B42 B41 B3 B2 A42
Y17 Y18 Y19 Y21 Y23 Y25 Y27 AA15 AA17 AA18 AA19 AA20
V_1P5_CORE
V_FSB_VTT R138 V_FSB_VTT 60.4R1%0402
A
HXSCOMP V_FSB_VTT C178 X_C2.2P50N0402
GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.756V 124 OHM OVER 210 RESISTORS HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL SPACE" HD_SWING S/B 1/3*VTT +/- 2%
R104 124R1%0402 R103 C113 C0.1U16Y0402 R139 301R1% 10R0402 MCH_GTLREF_CPU
A
PLACE DIVIDER RESISTOR NEAR VTT
R137 62R0402 HXSWING R105 210R1%0402 C172 X_C220P50N
MCH_GTLREF_CPU
4
MSI
Title
MICRO-STAR INt'L CO., LTD.
Intel Lakeport - CPU
R135 84.5R1%
C174 C0.01U25X0402
Size
Document Number
Rev
CAPS SHOULD BE PLACED NEAR MCH PIN
Date:
8 7 6 5 4 3 2
MS-7267
Wednesday, November 22, 2006 Sheet 7
1
3.1 of 36
8
7
6
5
4
3
2
1
14 14,16 SCKE_A[0..3] 14 DATA_A[0..63]
DQM_A[0..7]
AP3 DATA_A0 AP2 DATA_A1 AU3 DATA_A2 AV4 DATA_A3 AN1 DATA_A4 AP4 DATA_A5 AU5 DATA_A6 AU2 DATA_A7 AW3 DATA_A8 AY3 DATA_A9 BA7 DATA_A10 BB7 DATA_A11 AV1 DATA_A12 AW4 DATA_A13 BC6 DATA_A14 AY7 DATA_A15 AW12DATA_A16 AY10 DATA_A17 BA12 DATA_A18 BB12 DATA_A19 BA9 DATA_A20 BB9 DATA_A21 BC11 DATA_A22 AY12 DATA_A23 AM20 DATA_A24 AM18 DATA_A25 AV20 DATA_A26 AM21 DATA_A27 AP17 DATA_A28 AR17 DATA_A29 AP20 DATA_A30 AT20 DATA_A31 AP32 DATA_A32 AV34 DATA_A33 AV38 DATA_A34 AU39 DATA_A35 AV32 DATA_A36 AT32 DATA_A37 AR34 DATA_A38 AU37 DATA_A39 AR41 DATA_A40 AR42 DATA_A41 AN43 DATA_A42 AM40 DATA_A43 AU41 DATA_A44 AU42 DATA_A45 AP41 DATA_A46 AN40 DATA_A47 AL41 DATA_A48 AL42 DATA_A49 AF39 DATA_A50 AE40 DATA_A51 AM41 DATA_A52 AM42 DATA_A53 AF41 DATA_A54 AF42 DATA_A55 AD40 DATA_A56 AD43 DATA_A57 AA39 DATA_A58 AA40 DATA_A59 AE42 DATA_A60 AE41 DATA_A61 AB41 DATA_A62 AB42 DATA_A63
BB25 SCKE_A0 AY25 SCKE_A1 BC24 SCKE_A2 BA25 SCKE_A3
D
AR3 DQM_A0 AY2 DQM_A1 BB10 DQM_A2 AP18 DQM_A3 AT34 DQM_A4 AP39 DQM_A5 AG40 DQM_A6 AC40 DQM_A7
D
14,16 SCS_A#[0..3] SCS_A#0 SCS_A#1 SCS_A#2 SCS_A#3 14,16 14,16 14,16 RAS_A# CAS_A# WE_A# RAS_A# CAS_A# WE_A# MAA_A0 MAA_A1 MAA_A2 MAA_A3 MAA_A4 MAA_A5 MAA_A6 MAA_A7 MAA_A8 MAA_A9 MAA_A10 MAA_A11 MAA_A12 MAA_A13 ODT_A0 ODT_A1 ODT_A2 ODT_A3 SBS_A0 SBS_A1 SBS_A2 DQS_A0 DQS_A#0 DQS_A1 DQS_A#1 DQS_A2 DQS_A#2 DQS_A3 DQS_A#3 DQS_A4 DQS_A#4 DQS_A5 DQS_A#5 DQS_A6 DQS_A#6 DQS_A7 DQS_A#7 P_DDR0_A N_DDR0_A P_DDR1_A N_DDR1_A P_DDR2_A N_DDR2_A P_DDR3_A N_DDR3_A P_DDR4_A N_DDR4_A P_DDR5_A N_DDR5_A SMPCOMP_N SMPCOMP_P BB37 BA39 BA35 AY38 BA34 BA37 BB35 BA32 AW32 BB30 BA30 AY30 BA27 BC28 AY27 AY28 BB27 AY33 AW27 BB26 BC38 AW37 AY39 AY37 BB40 BC33 AY34 BA26 AU4 AR2 BA3 BB4 AY11 BA10 AU18 AR18 AU35 AV35 AP42 AP40 AG42 AG41 AC42 AC41 BB32 AY32 AY5 BB5 AK42 AK41 BA31 BB31 AY6 BA5 AH40 AH43 AL5 AJ6 AJ8 AM3
U7B SACS0# SACS1# SACS2# SACS3# SARAS# SACAS# SAWE# SAMA0 SAMA1 SAMA2 SAMA3 SAMA4 SAMA5 SAMA6 SAMA7 SAMA8 SAMA9 SAMA10 SAMA11 SAMA12 SAMA13 SAODT0 SAODT1 SAODT2 SAODT3 SABA0 SABA1 SABA2 SADQS0 SADQS0# SADQS1 SADQS1# SADQS2 SADQS2# SADQS3 SADQS3# SADQS4 SADQS4# SADQS5 SADQS5# SADQS6 SADQS6# SADQS7 SADQS7# SACLK0 SACLK0# SACLK1 SACLK1# SACLK2 SACLK2# SACLK3 SACLK3# SACLK4 SACLK4# SACLK5 SACLK5#
SCS_B#[0..3] SBCS0# SBCS1# SBCS2# SBCS3# SBRAS# SBCAS# SBWE# SBMA0 SBMA1 SBMA2 SBMA3 SBMA4 SBMA5 SBMA6 SBMA7 SBMA8 SBMA9 SBMA10 SBMA11 SBMA12 SBMA13 SBODT0 SBODT1 SBODT2 SBODT3 SBBA0 SBBA1 SBBA2 SBDQS0 SBDQS0# SBDQS1 SBDQS1# SBDQS2 SBDQS2# SBDQS3 SBDQS3# SBDQS4 SBDQS4# SBDQS5 SBDQS5# SBDQS6 SBDQS6# SBDQS7 SBDQS7# SBCLK0 SBCLK0# SBCLK1 SBCLK1# SBCLK2 SBCLK2# SBCLK3 SBCLK3# SBCLK4 SBCLK4# SBCLK5 SBCLK5# BA40 AW41 BA41 AW40 BA23 AY24 BB23 BB22 BB21 BA21 AY21 BC20 AY19 AY20 BA18 BA19 BB18 BA22 BB17 BA17 AW42 AY42 AV40 AV43 AU40 AW23 AY23 AY17 AM8 AM6 AV7 AR9 AV13 AT13 AU23 AR23 AT29 AV29 AP36 AM35 AG34 AG32 AD36 AD38 AM29 AM27 AV9 AW9 AL38 AL36 AP26 AR26 AU10 AT10 AJ38 AJ36 SCS_B#0 SCS_B#1 SCS_B#2 SCS_B#3 RAS_B# CAS_B# WE_B# MAA_B0 MAA_B1 MAA_B2 MAA_B3 MAA_B4 MAA_B5 MAA_B6 MAA_B7 MAA_B8 MAA_B9 MAA_B10 MAA_B11 MAA_B12 MAA_B13 ODT_B0 ODT_B1 ODT_B2 ODT_B3 SBS_B0 SBS_B1 SBS_B2 DQS_B0 DQS_B#0 DQS_B1 DQS_B#1 DQS_B2 DQS_B#2 DQS_B3 DQS_B#3 DQS_B4 DQS_B#4 DQS_B5 DQS_B#5 DQS_B6 DQS_B#6 DQS_B7 DQS_B#7 P_DDR0_B N_DDR0_B P_DDR1_B N_DDR1_B P_DDR2_B N_DDR2_B P_DDR3_B N_DDR3_B P_DDR4_B N_DDR4_B P_DDR5_B N_DDR5_B RAS_B# CAS_B# WE_B# 15,16 15,16 15,16
15,16
SADQ0 SADQ1 SADQ2 SADQ3 SADQ4 SADQ5 SADQ6 SADQ7 SADQ8 SADQ9 SADQ10 SADQ11 SADQ12 SADQ13 SADQ14 SADQ15 SADQ16 SADQ17 SADQ18 SADQ19 SADQ20 SADQ21 SADQ22 SADQ23 SADQ24 SADQ25 SADQ26 SADQ27 SADQ28 SADQ29 SADQ30 SADQ31 SADQ32 SADQ33 SADQ34 SADQ35 SADQ36 SADQ37 SADQ38 SADQ39 SADQ40 SADQ41 SADQ42 SADQ43 SADQ44 SADQ45 SADQ46 SADQ47 SADQ48 SADQ49 SADQ50 SADQ51 SADQ52 SADQ53 SADQ54 SADQ55 SADQ56 SADQ57 SADQ58 SADQ59 SADQ60 SADQ61 SADQ62 SADQ63
14,16 MAA_A[0..13]
SACKE0 SACKE1 SACKE2 SACKE3
SADM0 SADM1 SADM2 SADM3 SADM4 SADM5 SADM6 SADM7
MAA_B[0..13] 15,16
14,16 ODT_A[0..3]
ODT_B[0..3] 15,16
C
C
14,16 SBS_A[0..2]
SBS_B[0..2]
15,16
14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14
DQS_A0 DQS_A#0 DQS_A1 DQS_A#1 DQS_A2 DQS_A#2 DQS_A3 DQS_A#3 DQS_A4 DQS_A#4 DQS_A5 DQS_A#5 DQS_A6 DQS_A#6 DQS_A7 DQS_A#7 P_DDR0_A N_DDR0_A P_DDR1_A N_DDR1_A P_DDR2_A N_DDR2_A P_DDR3_A N_DDR3_A P_DDR4_A N_DDR4_A P_DDR5_A N_DDR5_A
DQS_B0 DQS_B#0 DQS_B1 DQS_B#1 DQS_B2 DQS_B#2 DQS_B3 DQS_B#3 DQS_B4 DQS_B#4 DQS_B5 DQS_B#5 DQS_B6 DQS_B#6 DQS_B7 DQS_B#7 P_DDR0_B N_DDR0_B P_DDR1_B N_DDR1_B P_DDR2_B N_DDR2_B P_DDR3_B N_DDR3_B P_DDR4_B N_DDR4_B P_DDR5_B N_DDR5_B
15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15
B
B
SBCKE0 SBCKE1 SBCKE2 SBCKE3
SBDQ0 SBDQ1 SBDQ2 SBDQ3 SBDQ4 SBDQ5 SBDQ6 SBDQ7 SBDQ8 SBDQ9 SBDQ10 SBDQ11 SBDQ12 SBDQ13 SBDQ14 SBDQ15 SBDQ16 SBDQ17 SBDQ18 SBDQ19 SBDQ20 SBDQ21 SBDQ22 SBDQ23 SBDQ24 SBDQ25 SBDQ26 SBDQ27 SBDQ28 SBDQ29 SBDQ30 SBDQ31 SBDQ32 SBDQ33 SBDQ34 SBDQ35 SBDQ36 SBDQ37 SBDQ38 SBDQ39 SBDQ40 SBDQ41 SBDQ42 SBDQ43 SBDQ44 SBDQ45 SBDQ46 SBDQ47 SBDQ48 SBDQ49 SBDQ50 SBDQ51 SBDQ52 SBDQ53 SBDQ54 SBDQ55 SBDQ56 SBDQ57 SBDQ58 SBDQ59 SBDQ60 SBDQ61 SBDQ62 SBDQ63
SBDM7 SBDM6 SBDM5 SBDM4 SBDM3 SBDM2 SBDM1 SBDM0
MCH_SRCOMP0 MCH_SRCOMP1 SMOCDCOMP0 SMOCDCOMP1
SMVREF1 SMVREF0
AM2 AM4
MCH_VREF_A
C269 X_C0.1U16Y0402 PLACE 0.1UF CAP CLOSE TO MCH
AL6 AL8 AP8 AP9 AJ11 AL9 AM10 AP6 AU7 AV6 AV12 AM11 AR5 AR7 AR12 AR10 AM15 AM13 AV15 AM17 AN12 AR13 AP15 AT15 AM24 AM23 AV24 AM26 AP21 AR21 AP24 AT24 AU27 AN29 AR31 AM31 AP27 AR27 AP31 AU31 AP35 AP37 AN32 AL35 AR35 AU38 AM38 AM34 AL34 AJ34 AF32 AF34 AL31 AJ32 AG35 AD32 AC32 AD34 Y32 AA32 AF35 AF37 AC33 AC35
Lakeport R209 SMPCOMP_P 80.6R1%0402
DATA_B0 DATA_B1 DATA_B2 DATA_B3 DATA_B4 DATA_B5 DATA_B6 DATA_B7 DATA_B8 DATA_B9 DATA_B10 DATA_B11 DATA_B12 DATA_B13 DATA_B14 DATA_B15 DATA_B16 DATA_B17 DATA_B18 DATA_B19 DATA_B20 DATA_B21 DATA_B22 DATA_B23 DATA_B24 DATA_B25 DATA_B26 DATA_B27 DATA_B28 DATA_B29 DATA_B30 DATA_B31 DATA_B32 DATA_B33 DATA_B34 DATA_B35 DATA_B36 DATA_B37 DATA_B38 DATA_B39 DATA_B40 DATA_B41 DATA_B42 DATA_B43 DATA_B44 DATA_B45 DATA_B46 DATA_B47 DATA_B48 DATA_B49 DATA_B50 DATA_B51 DATA_B52 DATA_B53 DATA_B54 DATA_B55 DATA_B56 DATA_B57 DATA_B58 DATA_B59 DATA_B60 DATA_B61 DATA_B62 DATA_B63
SCKE_B0 SCKE_B1 SCKE_B2 SCKE_B3
15 DATA_B[0..63] 15,16 SCKE_B[0..3] 15 VCC_DDR
A
DQM_B7 DQM_B6 DQM_B5 DQM_B4 DQM_B3 DQM_B2 DQM_B1 DQM_B0
AD39 AJ39 AR38 AR29 AP23 AP13 AW7 AL11
BA14 AY16 BA13 BB13
VCC_DDR R208 MCH_VREF_A DQM_B[0..7] 1KR1%0402 R207 1KR1%0402 C270 C0.1U16Y0402
A
R206 SMPCOMP_N 80.6R1%0402 C268 C0.1U16Y0402 Title
MSI
MICRO-STAR INt'L CO., LTD.
Intel Lakeport - Memory
Size Date:
8 7 6 5 4 3
Document Number
Rev
MS-7267
Wednesday, November 22, 2006
2
3.1 8
1
Sheet
of
36
8
7
6
5
4
3
2
1
V_1P5_CORE
VCC_DDR V_1P5_CORE
AA24 AA26 AB17 AB18 AB19 AB20 AB24 AB25 AB26 AB27 AC15 AC17 AC18 AC20 AC24 AC26 AC27 AD15 AD17 AD19 AD21 AD23 AD25 AD26 AE17 AE18 AE20 AE22 AE24 AE26 AE27 AF15 AF17 AF19
AY43 AV18 AV21 AV23 AV31 AV42 AW13 AW15 AW20 AW21 AW24 AW29 AW31 AW34 AW35 AY41 BB16 BB20 BB24 BB28 BB33 BB38 BB42 BC13 BC18 BC22 BC26 BC31 BC35 BC40
U7C 18 EXP_A_RXP_0 18 EXP_A_RXN_0 18 EXP_A_RXP_1 18 EXP_A_RXN_1 18 EXP_A_RXP_2 18 EXP_A_RXN_2 18 EXP_A_RXP_3 18 EXP_A_RXN_3 18 EXP_A_RXP_4 18 EXP_A_RXN_4 18 EXP_A_RXP_5 18 EXP_A_RXN_5 18 EXP_A_RXP_6 18 EXP_A_RXN_6 18 EXP_A_RXP_7 18 EXP_A_RXN_7 18 EXP_A_RXP_8 18 EXP_A_RXN_8 18 EXP_A_RXP_9 18 EXP_A_RXN_9 18 EXP_A_RXP_10 18 EXP_A_RXN_10 18 EXP_A_RXP_11 18 EXP_A_RXN_11 18 EXP_A_RXP_12 18 EXP_A_RXN_12 18 EXP_A_RXP_13 18 EXP_A_RXN_13 18 EXP_A_RXP_14 18 EXP_A_RXN_14 18 EXP_A_RXP_15 18 EXP_A_RXN_15 18 EXP_EN_HDR 11 11 11 11 11 11 11 11 DMI_ITP_MRP_0 DMI_ITN_MRN_0 DMI_ITP_MRP_1 DMI_ITN_MRN_1 DMI_ITP_MRP_2 DMI_ITN_MRN_2 DMI_ITP_MRP_3 DMI_ITN_MRN_3 EXP_A_RXP_0 EXP_A_RXN_0 EXP_A_RXP_1 EXP_A_RXN_1 EXP_A_RXP_2 EXP_A_RXN_2 EXP_A_RXP_3 EXP_A_RXN_3 EXP_A_RXP_4 EXP_A_RXN_4 EXP_A_RXP_5 EXP_A_RXN_5 EXP_A_RXP_6 EXP_A_RXN_6 EXP_A_RXP_7 EXP_A_RXN_7 EXP_A_RXP_8 EXP_A_RXN_8 EXP_A_RXP_9 EXP_A_RXN_9 EXP_A_RXP_10 EXP_A_RXN_10 EXP_A_RXP_11 EXP_A_RXN_11 EXP_A_RXP_12 EXP_A_RXN_12 EXP_A_RXP_13 EXP_A_RXN_13 EXP_A_RXP_14 EXP_A_RXN_14 EXP_A_RXP_15 EXP_A_RXN_15 EXP_EN_HDR G12 F12 D11 D12 J13 H13 E10 F10 J9 H10 F7 F9 C4 D3 G6 J6 K9 K8 F4 G4 M6 M7 K2 L1 U11 U10 R8 R7 P4 N3 Y10 Y11 F20 EXPARXP0 EXPARXN0 EXPARXP1 EXPARXN1 EXPARXP2 EXPARXN2 EXPARXP3 EXPARXN3 EXPARXP4 EXPARXN4 EXPARXP5 EXPARXN5 EXPARXP6 EXPARXN6 EXPARXP7 EXPARXN7 EXPARXP8 EXPARXN8 EXPARXP9 EXPARXN9 EXPARXP10 EXPARXN10 EXPARXP11 EXPARXN11 EXPARXP12 EXPARXN12 EXPARXP13 EXPARXN13 EXPARXP14 EXPARXN14 EXPARXP15 EXPARXN15 EXP_EN DMI RXP0 DMI RXN0 DMI RXP1 DMI RXN1 DMI RXP2 DMI RXN2 DMI RXP3 DMI RXN3 GCLKP GCLKN
N5 N7 N9 N10 N11 N12 R5 R10 R11 R13 U6 U7 U8 U13
NB SOLDER SIDE
V_1P5_CORE C536 X_C100P50N0805 C533 X_C100P50N0805 C532 X_C10U10Y0805 C535 X_C100P50N0402 C534 X_C100P50N0402
VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM
D
C
DMI_ITP_MRP_0 Y7 DMI_ITN_MRN_0 Y8 DMI_ITP_MRP_1 AA9 DMI_ITN_MRN_1 AA10 DMI_ITP_MRP_2 AA6 DMI_ITN_MRN_2 AA7 DMI_ITP_MRP_3 AC9 DMI_ITN_MRN_3 AC8 CK_PE_100M_MCH B14 CK_PE_100M_MCH# B16 SDVO_CTRL_DATA SDVO_CTRL_CLK SEL0 SEL1 SEL2 EXTTS NOA_6 X_1KR0402 F15 E15 F21 H21 L20 AK17 AL17 K21 AK23 AK18 L21 L18 N21 C21 B20 C19 B19 B17 D19 C18 B18 A18
EXPATXP0 EXPATXN0 EXPATXP1 EXPATXN1 EXPATXP2 EXPATXN2 EXPATXP3 EXPATXN3 EXPATXP4 EXPATXN4 EXPATXP5 EXPATXN5 EXPATXP6 EXPATXN6 EXPATXP7 EXPATXN7 EXPATXP8 EXPATXN8 EXPATXP9 EXPATXN9 EXPATXP10 EXPATXN10 EXPATXP11 EXPATXN11 EXPATXP12 EXPATXN12 EXPATXP13 EXPATXN13 EXPATXP14 EXPATXN14 EXPATXP15 EXPATXN15 DMI TXP0 DMI TXN0 DMI TXP1 DMI TXN1 DMI TXP2 DMI TXN2 DMI TXP3 DMI TXN3
D14 C13 A13 B12 A11 B10 C10 C9 A9 B7 D7 D6 A6 B5 E2 F1 G2 J1 J3 K4 L4 M4 M2 N1 P2 T1 T4 U4 U2 V1 V3 W4 W2 Y1 AA2 AB1 Y4 AA4 AB3 AC4 AC12 AC11 D17 C17 F17 K17 H18 G17 J17 J18 N18 N20 J15 H15 A20 J20 H20 K18
EXP_A_TXP_0 EXP_A_TXN_0 EXP_A_TXP_1 EXP_A_TXN_1 EXP_A_TXP_2 EXP_A_TXN_2 EXP_A_TXP_3 EXP_A_TXN_3 EXP_A_TXP_4 EXP_A_TXN_4 EXP_A_TXP_5 EXP_A_TXN_5 EXP_A_TXP_6 EXP_A_TXN_6 EXP_A_TXP_7 EXP_A_TXN_7 EXP_A_TXP_8 EXP_A_TXN_8 EXP_A_TXP_9 EXP_A_TXN_9 EXP_A_TXP_10 EXP_A_TXN_10 EXP_A_TXP_11 EXP_A_TXN_11 EXP_A_TXP_12 EXP_A_TXN_12 EXP_A_TXP_13 EXP_A_TXN_13 EXP_A_TXP_14 EXP_A_TXN_14 EXP_A_TXP_15 EXP_A_TXN_15 DMI_MTP_IRP_0 DMI_MTN_IRN_0 DMI_MTP_IRP_1 DMI_MTN_IRN_1 DMI_MTP_IRP_2 DMI_MTN_IRN_2 DMI_MTP_IRP_3 DMI_MTN_IRN_3 GRCOMP R194 24.9R1%0402 HSYNC VSYNC VGA_RED VGA_GREEN VGA_BLUE VGA_RED# VGA_GREEN# VGA_BLUE# DDC_DATA DDC_CLK CK_96M_DREF CK_96M_DREF# DACREFSET EXTTS 1 1 R143
EXP_A_TXP_0 18 EXP_A_TXN_0 18 EXP_A_TXP_1 18 EXP_A_TXN_1 18 EXP_A_TXP_2 18 EXP_A_TXN_2 18 EXP_A_TXP_3 18 EXP_A_TXN_3 18 EXP_A_TXP_4 18 EXP_A_TXN_4 18 EXP_A_TXP_5 18 EXP_A_TXN_5 18 EXP_A_TXP_6 18 EXP_A_TXN_6 18 EXP_A_TXP_7 18 EXP_A_TXN_7 18 EXP_A_TXP_8 18 EXP_A_TXN_8 18 EXP_A_TXP_9 18 EXP_A_TXN_9 18 EXP_A_TXP_10 18 EXP_A_TXN_10 18 EXP_A_TXP_11 18 EXP_A_TXN_11 18 EXP_A_TXP_12 18 EXP_A_TXN_12 18 EXP_A_TXP_13 18 EXP_A_TXN_13 18 EXP_A_TXP_14 18 EXP_A_TXN_14 18 EXP_A_TXP_15 18 EXP_A_TXN_15 18 DMI_MTP_IRP_0 DMI_MTN_IRN_0 DMI_MTP_IRP_1 DMI_MTN_IRN_1 DMI_MTP_IRP_2 DMI_MTN_IRN_2 DMI_MTP_IRP_3 DMI_MTN_IRN_3 11 11 11 11 11 11 11 11 V_1P5_CORE HSYNC VSYNC 19 19
D
VCC_DDR C188 C1U10Y C199 C1U10Y C166 C0.1U16Y0402
VCC_DDR
C
C157 C1U10Y C190 C1U10Y C165 C0.1U16Y0402
17 CK_PE_100M_MCH 17 CK_PE_100M_MCH# 18 SDVO_CTRL_DATA 18 SDVO_CTRL_CLK RN35 4,17 H_FSBSEL2 4,17 H_FSBSEL1 4,17 H_FSBSEL0 V_2P5_MCH 1 3 5 7 2 4 6 8
EXP_COMPO EXP_COMPI SDVOCTRLDATA SDVOCTRLCLK BSEL0 BSEL1 BSEL2 RSV_TP[0] RSV_TP[1] EXP_SLR RSV_TP[2] RSV_TP[3] RSV_TP[4] RSV_TP[5] RSV_TP[6] VCCAHPLL VCCAMPLL VCCADPLLA VCCADPLLB VCCA_EXPPLL VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC2 VCCADAC VCCADAC VSSA_DAC Lakeport HSYNC VSYNC RED GREEN BLUE RED# GREENB BLUE# DDC_DATA DDC_CLK DREFCLKINP DREFCLKINN IREF EXTTS# XORTEST ALLZTEST
MCH MEMORY DECOUPLING
V_FSB_VTT
8P4R-10KR0402 R144
DDC_DATA DDC_CLK
19 19
FSB GENERIC DECOUPLING
CK_96M_DREF 17 CK_96M_DREF# 17 B_255R1%
B
VCCA_HPLL VCCA_MPLL VCCA_DPLLA VCCA_DPLLB VCCA_GPLL L14 B_180L1500m_90 V_2P5_MCH +1 V_2P5_MCH V_2P5_DAC_FILTERED EC44 CD100U16EL11 C210 C0.01U25X0402
FOR 945G
B
PLACE CLOSE TO MCH
TP11 TP12
A24 B23 B24 B25 B26 C23 C25 C26 D23 D24 D25 E23 E24 E26 E27 F23 F27 G23 H23 J23 K23 L23 M23 N23 P23
B_C0.1U16Y0402 19 V_2P5_DAC_FILTERED
V_FSB_VTT V_1P5_CORE
AF21 AF23 AF25 AF26 AF27 AF29 AG15 AG17 AG18 AG19 AG20 AG21 AG22 AG23 AG24 AJ15 AJ17 AJ18 AJ20
AE4 AE3 AE2 AD12 AD10 AD8 AD6 AD5 AD4 AD2 AD1 AC13 AC6 AC5 AA13 AA5 Y13 V13 V9 V10 V7 V6 V5
2
C198
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT
I = 70mA
V_1P5_CORE
I = 60mA
V_1P5_CORE L11 600L200m_500-1 VCCA_MPLL V_1P5_CORE L12 10U125m_0805-1 +1
I = 55mA
VCCA_DPLLA C194 C0.1U16Y0402 V_1P5_CORE L15 1U500m_0805 EC45 .CD220U10EL7
R165 1R1%0402
I = 45mA
VCCA_GPLL C205 X_C10U10Y0805 C200 C10U10Y0805 C542 C1U16Y
C189 C1U16Y
R148 1R1%0402
A
2
C186 X_C0.1U16Y0402
C184 C0.1U16Y0402
C185 C0.1U16Y0402
VGA_RED 19 VGA_GREEN 19 VGA_BLUE 19
A
I = 55mA
V_1P5_CORE L13 10U125m_0805-1 +1 VCCA_DPLLB EC46 .CD220U10EL7 C196 C0.1U16Y0402 V_1P5_CORE L10 600L200m_500-1
I = 45mA
VCCA_HPLL C182 C0.1U16Y0402 V_1P5_CORE
I = 1.5A Vcc_PCI Express
C220 C10U6.3X50805 C221 C10U6.3X50805
MSI
Title
MICRO-STAR INt'L CO., LTD.
Intel Lakeport - PCI EXPRESS
2
Size Date:
8 7 6 5 4 3 2
Document Number
Rev
MS-7267
Wednesday, November 22, 2006 Sheet 9
1
3.1 of 36
A
B
C
D
5
5
A16 A22 A26 A31 A35 B4 B6 B9 B11 B13 B21 B22 B28 B33 B38 C3 C5 C7 C12 C14 C22 C40 D2 D5 D10 D16 D20 D21 E3 E4 E7 E9 E12 E13 E17 E18 E20 E21 E32 F2 F6 F13 F18 F26 F34 F42 G3 G5 G7 G9 G10 G13 G15 G18 G20 G21 G24 G27 G29 G31 G32 G35 G38 H12 H17 H26 H27 H32 J2 J5 J7 J10 U7D VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
4 3 2
4 3 2
J12 J21 J24 J29 J38 J43 K3 K5 K6 K7 K10 K12 K13 K15 K20 K27 K32 K34 K37 K39 L2 L12 L13 L24 L26 L29 L31 L42 M3 M5 M8 M9 M10 M13 M20 M21 M35 M37 N2 N6 N8 N13 N15 N24 N26 N27 N29 N31 N33 N36 N39 N43 P3 P14 P15 P24 P26 P27 P29 P30 R6 R9 R12 R14 R30 R31 R34 R37 R39 T2 T42 U3 U5 U9 U12 U14 U31 U33 U36 U38 V2 V8 V11 V12 V14 V34 V36 V37 V38 V39 V43 W3 Y2 Y5 Y6 Y9 Y12 Y14 Y31 Y35 Y37 Y39 Y42 AA3 AA8 AF18 AE21 AE23 AE25 L17 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS Lakeport
AL37 AL43 AM5 AM7 AM9 AM33 AM36 AM37 AM39 AN2 AN4 AN13 AN15 AN17 AN18 AN20 AN21 AN23 AN24 AN26 AN27 AN31 AN42 AP5 AP7 AP10 AP12 AP29 AP34 AP38 AR1 AR6 AR15 AR20 AR24 AR32 AR37 AR39 AR43 AT12 AT17 AT18 AT21 AT23 AT26 AT27 AT31 AU6 AU9 AU12 AU13 AU15 AU17 AU20 AU21 AU24 AU26 AU29 AU32 AU34 AV2 AV10 AV17 AV37 AW10 BA4 BA42 BB3 BB6 BB11 BB14 BB19 BB34 BB39 BB41 BC9 A4 A40 D1 D43 R26 R29 U29 V24 V26 V29 W21 W23 W25 Y20 Y22 Y24 Y26 Y29 AA25 AA27 AA29 AC19 AC25 AC29 AD18 AD20 AD22 AD24 AD27 AD29 AE19 AF20 AF22 AF24 AY1 BC4
AL33 AL32 AL27 AL24 AL23 AL21 AL18 AL15 AL13 AL12 AL10 AL7 AL3 AL2 AL1 AK30 AK29 AK26 AK24 AJ37 AJ35 AJ33 AJ31 AJ30 AJ10 AJ7 AH42 AG39 AG38 AG37 AG36 AG33 AG31 AG30 AF43 AF38 AF36 AF33 AF5 AF3 AF2 AF1 AD42 AD37 AD35 AD33 AD13 AD11 AD9 AD7 AC39 AC38 AC37 AC36 AC31 AC23 AC21 AC14 AC10 AC7 AC3 AC2 AB43 AB2 AA36 AA33 AA31 AA23 AA21 AA14 AA12 AA11
Title
Size Document Number Wednesday, November 22, 2006
1
Date:
MSI
1
MS-7267
Sheet 10 of 36 Rev 3.1
MICRO-STAR INt'L CO., LTD.
Intel Lakeport - GND
A B C D
8
7
6
5
4
3
2
1
U19A AH28 AG27 AG26 AG22 AF22 AG21 AF25 AH24 AF23 AH22 AG23 AE22 AF26 AG24 C26 F26 F25 E28 E27 H26 H25 G28 G27 K26 K25 J28 J27 M26 M25 L28 L27 P26 P25 N28 N27 T25 T24 R28 R27
20,21,22 AD[0..31]
D
PCI EXPRESS
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
E18 C18 A16 F18 E16 A18 E17 A17 A15 C14 E14 D14 B12 C13 G15 G13 E12 C11 D11 A11 A10 F11 F10 E9 D9 B9 A8 A6 C7 B6 E6 D6
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 C/BE0# C/BE1# C/BE2# C/BE3# DEVSEL# FRAME# IRDY# TRDY# STOP# PAR PLOCK# SERR# PERR# PME# PCICLK PCIRST#
A20M# CPUSLP# FERR# IGNNE# INIT# INIT3_3V# INTR NMI SMI# STPCLK# RCIN# A20GATE THRMTRIP# GPO49/CPUPWRGD PLTRST# PERN_1 PERP_1 PETN_1 PETP_1 PERN_2 PERP_2 PETN_2 PETP_2 PERN_3 PERP_3 PETN_3 PETP_3 PERN_4 PERP_4 PETN_4 PETP_4 PERN_5 PERP_5 PETN_5 PETP_5 PERN_6 PERP_6 PETN_6 PETP_6
H_A20M# H_SLP# H_FERR# H_IGNNE# H_INIT# FWH_INIT# H_INTR H_NMI ICH_H_SMI# H_STPCLK# KBRST# A20GATE TRMTRIP# H_PWRGD
4 4 4 4 4 27 4 4 4 4 24 24 4 4 Damping R283 HSI_N1 HSI_P1 HSO_N1 HSO_P1 HSI_N2 HSI_P2 HSO_N2 HSO_P2 HSI_N3 HSI_P3 HSO_N3 HSO_P3 HSI_N4 HSI_P4 HSO_N4 HSO_P4
SERIRQ KBRST# A20GATE PLTRST#
R203 R178 R182 R285
10KR-1 10KR-1 10KR-1 X_10KR-1
VCC3
CPU
D
Resistor close to ICH7
33R-1 HSI_N1 HSI_P1 HSO_N1 HSO_P1 HSI_N2 HSI_P2 HSO_N2 HSO_P2 HSI_N3 HSI_P3 HSO_N3 HSO_P3 HSI_N4 HSI_P4 HSO_N4 HSO_P4 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 PLTRST# 7,24,27
HSO_N1_C HSO_P1_C
C362 C365
C0.1U16X0402 C0.1U16X0402
PCI PCI INTERFACE INTERFACE
HSO_N2_C HSO_P2_C
C377 C376
C0.1U16X0402 C0.1U16X0402
V_FSB_VTT RN42 1 3 5 7 8P4R-62R0402 2 4 6 8
H_FERR# TRMTRIP#
HSO_N3_C HSO_P3_C
C379 C378
C0.1U16X0402 C0.1U16X0402
PLACE AT ICH7 END OF ROUTE
HSO_N4_C HSO_P4_C
C381 C380
C0.1U16X0402 C0.1U16X0402
20,21,22 C_BE#[0..3]
C
C_BE#0 B15 C_BE#1 C12 C_BE#2 D12 C_BE#3 C15 A12 F16 A7 F14 F15 E10 E11 B10 C9 B19 A9 B18 PREQ#0 PREQ#1 PREQ#2 PREQ#3 PREQ#4 PREQ#5 PGNT#0 PGNT#1 PGNT#2 PGNT#3 PGNT#4 PGNT#5 D7 C16 C17 E13 A13 C8 E7 D16 D17 F13 A14 D8 A3 B4 C5 B5 G8 F7 F8 G7 SERIRQ IDE_IRQ AH21 AH16 P5 P2 P6 R2 P1
C
Damping Resistor close to ICH7
29 PCIRST# R298 33R-1
20,21,22 DEVSEL# 20,21,22 FRAME# 20,21,22 IRDY# 20,21,22 TRDY# 20,21,22 STOP# 20,21,22 PAR 20 LOCK# 20,21 SERR# 20,21,22 PERR# 20,21 PCI_PME# 17 ICH_PCLK
ICH 7 PART 1/3
DMI_0RXN DMI_0RXP DMI_0TXN DMI_0TXP
V26 V25 U28 U27 Y26 Y25 W28 W27 AB26 AB25 AA28 AA27 AD25 AD24 AC28 AC27 AE28 AE27 C25 D25 V3 U3 U5 V4 T5 U7 V6 V7 W1 W3 Y2 Y1
DMI_MTN_IRN_0 DMI_MTP_IRP_0 DMI_ITN_MRN_0 DMI_ITP_MRP_0 DMI_MTN_IRN_1 DMI_MTP_IRP_1 DMI_ITN_MRN_1 DMI_ITP_MRP_1 DMI_MTN_IRN_2 DMI_MTP_IRP_2 DMI_ITN_MRN_2 DMI_ITP_MRP_2 DMI_MTN_IRN_3 DMI_MTP_IRP_3 DMI_ITN_MRN_3 DMI_ITP_MRP_3
9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9
DIRECT MEDIA
20 20 20 20,21 20,22 20 20 20 VCC3 VCC3 21 22 20 20 20 20 20,21 20,22 20 20 24 26 VCC3_SB 1 3 5 7
PREQ#0 PREQ#1 PREQ#2 PREQ#3 PREQ#4 PREQ#5 PGNT#0 PGNT#1 TP19 PGNT#3 PGNT#4 PIRQ#A PIRQ#B PIRQ#C PIRQ#D PIRQ#E PIRQ#F PIRQ#G PIRQ#H SERIRQ IDE_IRQ RN62 2 4 6 8
REQ0# REQ1# REQ2# REQ3# GPIO22/REQ4# GPIO1/REQ5# GNT0# GNT1# GNT2# GNT3# GPIO48/GNT4# GPIO17/GNT5#
DMI_1RXN DMI_1RXP DMI_1TXN DMI_1TXP DMI_2RXN DMI_2RXP DMI_2TXN DMI_2TXP DMI_3RXN DMI_3RXP DMI_3TXN DMI_3TXP DMI_CLKN DMI_CLKP DMI_ZCOMP DMI_IRCOMP LAN_CLK LAN_RSTSYNC LAN_RXD0 LAN_RXD1 LAN_RXD2
Intel REQ
B
PGNT#4 PGNT#5
R300 R308
2.2KR0402 2.2KR0402
B
PGNT#5 SPI PCI LPC 0 1 1
PGNT#4 1 0 1
PIRQA# PIRQB# PIRQC# PIRQD# GPIO2/PIRQE# GPIO3/PIRQF# GPIO4/PIRQG# GPIO5/PIRQH# SERIRQ IDEIRQ SPI_MOSI SPI_MISO SPI_CS# SPI_CLK SPI_ARB
R276 24.9R1%0402
CK_PE_100M_ICH# 17 CK_PE_100M_ICH 17 V_DMI 13
LAN
INTERRUPT INTERRUPT SPI SPI
LAN_TXD0 LAN_TXD1 LAN_TXD2 EE_CS EE_DIN EE_DOUT EE_SHCLK
X_8P4R-10KR0402
A
A4 A23 B1 B8 B11 B14 B17 B20 B26 B28 C2 C6 D10 D13 D18 D21 D24 E1 E2 E8 E15 F3 F4 F5 F12 F27 F28 G1 G2 G5 G6 G9 G14 G18 G21 G24 G25 G26 H3 H4 H5
Stuff if TEKOA not present or for Non-share SPI.
VSS_0 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40
ICH7
A
MSI
Title
MICRO-STAR INt'L CO., LTD.
ICH7 - PCI, DMI, CPU, IRQ
Size Date:
8 7 6 5 4 3 2
Document Number
Rev
MS-7267
Wednesday, November 22, 2006 Sheet 11
1
3.1 of 36
8
7
6
5
4
3
2
1
C422 C423 U19B 24,27 LPC_AD[0..3] VCC3 2 4 6 8
D
C0.1U16Y0402 C0.1U16Y0402 X_C0.1U16Y0402 X_C0.1U16Y0402 C0.1U16Y0402 X_C0.1U16Y0402 X_C0.1U16Y0402 X_C0.1U16Y0402
VCC3
FP_RST# SM_LINK1 LINK_ALERT# RI# SIO_PME# BATTLOW# SM_LINK0 SMB_ALERT#
C431 DDACK# DDREQ DIOR# DIOW# IORDY DA0 DA1 DA2 DCS1# DCS3# DD_0 DD_1 DD_2 DD_3 DD_4 DD_5 DD_6 DD_7 DD_8 DD_9 DD_10 DD_11 DD_12 DD_13 DD_14 DD_15 SATA_0RXN SATA_0RXP SATA_0TXN SATA_0TXP SATA_1RXN SATA_1RXP SATA_1TXN SATA_1TXP SATA_2RXN SATA_2RXP SATA_2TXN SATA_2TXP AF16 AE15 AF15 AH15 AG16 AH17 AE17 AF17 AE16 AD16 AB15 AE14 AG13 AF13 AD14 AC13 AD12 AC12 AE12 AF12 AB13 AC14 AF14 AH13 AH14 AC15 AF3 AE3 AG2 AH2 AE5 AD5 AG4 AH4 AF7 AE7 AG6 AH6 AD9 AE9 AG8 AH8 AF1 AE1 AH10 AG10 AF18 AF19 AH18 AH19 AE19 AB18 AC21 AC18 E21 E20 A20 F19 E19 R4 E22 AC22 AC20 AF21 R3 D20 A21 B21 E23 AG18 AC19 U2 AD21 AD20 AE20 W5 W4 AA3 AB1 AB2 SATA_BIAS SATALED# GPIO21 GPIO19 GPIO36 GPIO37 GPIO0 ATADET0 GPIO7 GPIO8 GPIO9 SIO_PME# GPIO13 GPIO14 GPIO15 R301 PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 PD_DACK# PD_DREQ PD_IOR# PD_IOW# PD_IORDY PD_A0 PD_A1 PD_A2 PD_CS#1 PD_CS#3 26 26 26 26 26 26 26 26 26 26 PDD[0..15] 26 C434 C443 C382 C429 C485
1 3 5 7 1 3 5 7 RN52 1 3 5 7 R330
2 4 6 8 2 4 6 8
VCC3_SB RN47 8P4R-10KR0402 RN51 8P4R-10KR0402
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
RN63 X_8P4R-4.7KR0402 1 3 5 7
24
LPC_DRQ#0
24,27 LPC_FRAME# RN61 1 3 5 7 2 4 6 8 ACBITCLK ACRST# AC_SDIN0 ACSDOUT ACSYNC
AA6 AB5 AC4 Y6 AC3 AA5 AB3 U1 R5 T2 T3 T1 T4 R6
LAD0 LAD1 LAD2 LAD3 LDRQ_0# LDRQ_1#/GPI023 LFRAME# ACZ_BCLK ACZ_RST# ACZ_SDIN_0 ACZ_SDIN_1 ACZ_SDIN_2 ACZ_SDOUT ACZ_SYNC
VCC3
LPC AC-LINK
D
GPIO9 R382 100R0402 WAKE# INTRUDER# GPIO7 SATALED# GPIO38
8P4R-10KR0402 2 VCC3_SB 4 6 8 1MR0402
23 23
8P4R-33R0402 C481 X_C10P50N0402 USB0USB0+ USB1USB1+ USB2USB2+ USB3USB3+ USB4USB4+ USB5USB5+ USB6USB6+ USB7USB7+
P-ATA
AC_SYNC AC_SDOUT 23 AC_RST# 23 AC_BITCLK 23 AC_SDIN0 C482 X_C10P50N0402 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 OC#1
VBAT VCC3 RN49 8P4R-10KR0402
1 3 5 7 R222
2 4 6 8 4.7KR0402
C
F1 F2 G4 G3 H1 H2 J4 J3 K1 K2 L4 L5 M1 M2 N4 N3 D3 C4 D5 D4 E5 C3 A2 B3
USBP_0N USBP_0P USBP_1N USBP_1P USBP_2N USBP_2P USBP_3N USBP_3P USBP_4N USBP_4P USBP_5N USBP_5P USBP_6N USBP_6P USBP_7N USBP_7P OC_0# OC_1# OC_2# OC_3# OC_4# GPIO29/OC_5# GPIO30/OC_6# GPIO31/OC_7# USBRBIAS USBRBIAS#
THERM# SMBCLK_ICH
R200 R291
4.7KR-1 2.7KR0402 2.7KR0402
VCC3 VCC3
RSMRST#
VCC3_SB
SMBDATA_ICH R293
SATA_RX#0 SATA_RX0 SATA_TX#0 SATA_TX0 SATA_RX#1 SATA_RX1 SATA_TX#1 SATA_TX1 SATA_RX#2 SATA_RX2 SATA_TX#2 SATA_TX2 SATA_RX#3 SATA_RX3 SATA_TX#3 SATA_TX3
26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26
LPC_DRQ#0 R205 LPC_FRAME# R201
X_10KR-1 X_10KR-1
VCC3 VCC3
USB
GPIO37 GPIO21 GPIO36 GPIO19
1 3 5 7
2 4 6 8
VCC3
C
RN54 X_8P4R-10KR0402 GPIO13 GPIO8 GPIO15 GPIO14 1 3 5 7 2 4 6 8 VCC3_SB
25
OC#2
S-ATA
ICH 7 PART 2/3
SM BUS
R332
CLOSE TO ICH7
14,15,17,18,24,29 SMBDATA 14,15,17,18,24,29 SMBCLK SMBDATA SMBCLK 8P4R-33R0402 1 3 5 7
RN50
22.6R1%0402 USB_BIAS D1 D2 2 SMBCLK_ICH C22 4 SMBDATA_ICH B22 6 B23 8 SMB_ALERT# SM_LINK0 B25 SM_LINK1 A25 LINK_ALERT# A26 RSMRST# Y4 C19 C23 AA4 AD22 A22 B24 D23 F22 A27 C20 Y5 F20 A28 AF20 AH20 A19 C21 AF24 AH25 F21 AC1 B2
SATA_3RXN SATA_3RXP SATA_3TXN SATA_3TXP SATA_CLKN SATA_CLKP SATARBIASN SATARBIASP SATALED# GPIO21/SATA_0GP GPIO19/SATA_1GP GPIO36/SATA_2GP GPIO37/SATA_3GP BMBUSY#/GPIO0 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16/DPRSLPVR GPIO18/STPPCI# GPIO20/STPCPU# GPIO24 GPIO25 EL_RSVD/GPIO26 EL_STATE0/GPIO27 EL_STATE1/GPIO28 GPIO32/CLKRUN# GPIO33/AZ_DOCK_EN# GPIO34/AZ_DOCK_RST# GPIO35/SATACLKREQ# GPIO38 GPIO39 VCCRTC INTVRMEN RTCRST# RTCX1 RTCX2
CK_ICHSATA# 17 CK_ICHSATA 17 24.9R1%0402 SATALED# 28
GPIO0 GPIO39
SMBCLK SMBDATA GPIO11/SMBALERT# SMLINK_0 SMLINK_1 LINKALERT# RSMRST# LAN_RST# PWRBTN# PWROK VRMPWRGD SYS_RESET# SLP_S3# SLP_S4# SLP_S5# SUS_STAT# SUSCLK INTRUDER# WAKE# RI# THRM# MCH_SYNC# SPKR
1 3 5 7
RN53 X_8P4R-10KR0402 2 4 6 8 RN48 X_8P4R-10KR0402
VCC3
24,29 24 7,29 30 28 24,29 29
RSMRST# PWRBTN# PWR_GD VRM_GD FP_RST# SLP_S3# SLP_S4#
ATADET0
26
* Put a GND Plane under X'TAL * Please put this block close ICH6
RTC BLOCK
CLR_CMOS 1-2 Normal * 2-3 Clear CMOS
B
POWER MGNT
B
SLP_S3# SLP_S4#
BIOS_WP# 27 SIO_PME# 24
GPIO
VCC3_SB FRONT_IO# 23 TP17 TP16 TP15
VBAT
18 24 24
WAKE# RI# THERM#
INTRUDER# WAKE# RI# THERM# ICH_SYNC# BATTLOW# 1 1 1
1 1 1
D20 S-BAT54C_SOT23
2
R310 3 20KR1%0402 C450 C1U25X0805 C461 C1U25X0805 RTC_RST# 1 2 3
JBAT1
7 28
ICH_SYNC# SPKR TP14 TP13 TP18
1
MISC
BATLOW#/TP_0 DPRSTP#/TP_1 DPSLP#/TP_2 TP_3 CLK14 CLK48
GPIO38 GPIO39 INTVRMEN RTC_RST# RTCX1 RTCX2 R329
VBAT
H1X3_black R314 100R0402
17 ICH_14MCLK 17 USB_ICH_48MCLK
RTC
330KR0402
VBAT C483 C18P50N0402 RTCX1 R307 1KR0402 1 Y4 32.768KHZ12.5P_D RTCX2 BAT1 BAT-2P_SO41 2 2 4 3 1 R331 10MR1%0402
A
VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85
A
H24 H27 H28 J1 J2 J5 J24 J25 J26 K24 K27 K28 L13 L15 L24 L25 L26 M3 M4 M5 M12 M13 M14 M15 M16 M17 M24 M27 M28 N1 N2 N5 N6 N11 N12 N13 N14 N15 N16 N17 N18 N24 N25 N26 P3
ICH7
C484 C18P50N0402
MSI Following are the GPIOs that need to be terminated properly if not used: GPIO[39:36,23:21,19,7:0]: default as inputs and should be pulled up to Vcc3_3 if unused. GPIO[31:29,15:8]: default as inputs and should be pulled up to VccSus3_3 if unused.
8 7 6 5 4 3
MICRO-STAR INt'L CO., LTD.
ICH7 - LPC, ATA, USB, GPIO
Title Size Date:
2
Document Number
Rev
MS-7267
Wednesday, November 22, 2006 Sheet 12
1
3.1 of 36
8
7
6
5
4
3
2
1
AD4 AD7 AD8 AD11 AD15 AD19 AD23 AE2 AE4 AE8 AE11 AE13 AE18 AE21 AE24 AE25 AF2 AF4 AF8 AF11 AF27 AF28 AG1 AG3 AG7 AG14 AG17 AG20 AG25 AH1 AH3 AH7 AH23 AH27
VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199 VSS_200 VSS_201 VSS_202
V_1P5_CORE L18 X_80L4_30_1206 V_DMI EC56 .CD1000U6.3EL11.5 CP27 1
D
5VREF Sequencing Circuit
U19C V5REF1 V5REF2 VCC3_3-1 VCC3_3-2 VCC3_3-3 VCC3_3-4 VCC3_3-5 VCC3_3-6 VCC3_3-7 VCC3_3-8 VCC3_3-9 VCC3_3-10 VCC3_3-11 VCC3_3-12 VCC3_3-13 VCC3_3-14 VCC3_3-15 VCC3_3-16 VCC3_3-17 VCC3_3-18 VCC3_3-19 VCC3_3-20 VCC3_3-21 VCC3_3-22 VCC_CPU_IO-1 VCC_CPU_IO-2 VCC_CPU_IO-3 VCCDMIPLL VCCSATAPLL VCCUSBPLL VCC1_05-1 VCC1_05-2 VCC1_05-3 VCC1_05-4 VCC1_05-5 VCC1_05-6 VCC1_05-7 VCC1_05-8 VCC1_05-9 VCC1_05-10 VCC1_05-11 VCC1_05-12 VCC1_05-13 VCC1_05-14 VCC1_05-15 VCC1_05-16 VCC1_05-17 VCC1_05-18 VCC1_05-19 VCC1_05-20 AD17 G10 A5 AA7 AB12 AB20 AC16 AD13 AD18 AG12 AG15 AG19 AH11 B13 B16 B27 B7 C10 D15 F9 G11 G12 G16 U6 AE23 AE26 AH26 AG28 AD2 C1 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18 5VREF VCC3 D19 1KR0402 C354
D
R272 VCC5 S-1N5817_DO214AC 5VREF VCC3 C0.1U16Y0402
2 2
X_COPPER CP26 1 2 X_COPPER
11
V_DMI
S0 POWER
C348 C0.1U16Y0402 C353 X_C0.1U16Y0402 C352 X_C0.1U16Y0402
C
V_1P05_CORE
R287 X_0R0402
R286 0R0402 U17 8 7 6 VREF2 ENABLE VCTRL GND9 BOOT_SEL VIN GND2 VREF1 VOUT 1 2 3 4
C338 X_C0.1U16Y0402 V_1P05_CORE R261 750R1%0402
V5REF_SUS VCC1_5-1 VCC1_5-2 VCC1_5-3 VCC1_5-4 VCC1_5-5 VCC1_5-6 VCC1_5-7 VCC1_5-8 VCC1_5-9 VCC1_5-10 VCC1_5-11 VCC1_5-12 VCC1_5-13 VCC1_5-14 VCC1_5-15 VCC1_5-16 VCC1_5-17 VCC1_5-18 VCC1_5-19 VCC1_5-20 VCC1_5-21 VCC1_5-22 VCC1_5-23 VCC1_5-24 VCC1_5-25 VCC1_5-26 VCC1_5-27 VCC1_5-28 VCC1_5-29 VCC1_5-30 VCCSUS3_3-1 VCCSUS3_3-2 VCCSUS3_3-3 VCCSUS3_3-4 VCCSUS3_3-5 VCCSUS3_3-6 VCCSUS3_3-7 VCCSUS3_3-8 VCCSUS3_3-9 VCCSUS3_3-10 VCCSUS3_3-11 VCCSUS3_3-12 VCCSUS3_3-13 VCCSUS3_3-14 VCCSUS3_3-15 VCCSUS3_3-16 VCCSUS3_3-17 VCCSUS3_3-18 VCCSUS3_3-19 VCCSUS3_3-20 VCCSUS3_3-21 VCCSUS3_3-22 VCCSUS3_3-23 VCCSUS3_3-24 VCCSUS1_05-1 VCCSUS1_05-2 VCCSUS1_05-3 VCCSUS1_05-4 VCCSUS1_05-5
W83310DS_SOIC8
B
V_1P5_CORE
C432 C10U10Y0805 C439 X_C10U10Y0805 C457 C0.1U16Y0402 C449 X_C0.1U16Y0402 C401 X_C0.1U16Y0402
A1 AB10 AB17 AB7 AB8 AB9 AC10 AC17 AC6 AC7 AC8 AD10 AD6 AE10 AE6 AF10 AF5 AF6 AF9 AG5 AG9 AH5 AH9 F17 G17 H6 H7 J6 J7 T7
A24 C24 D19 D22 E3 G19 K3 K4 K5 K6 L1 L2 L3 L6 L7 M6 M7 N7 P7 R7 V1 V5 W2 W7 AA2 C28 G20 K7 Y7
.CD1000U6.3EL11.5 VCC3_SB C489 C0.1U16Y0402 C488 X_C0.1U16Y0402 C486 X_C0.1U16Y0402
S5 POWER
2
V_1P5_CORE
F6
VCC5_SB
9
EC61
C333
C0.1U16Y0402
+1
C507 X_C0.1U16Y0402
5
A
VSS_168 VSS_167 VSS_166 VSS_165 VSS_164 VSS_163 VSS_162 VSS_161 VSS_160 VSS_159 VSS_158 VSS_157 VSS_156 VSS_155 VSS_154 VSS_153 VSS_152 VSS_151 VSS_150 VSS_149 VSS_148 VSS_147 VSS_146 VSS_145 VSS_144 VSS_143 VSS_142 VSS_141 VSS_140 VSS_139 VSS_138 VSS_137 VSS_136 VSS_135 VSS_134 VSS_133 VSS_132 VSS_131 VSS_130 VSS_129 VSS_128 VSS_127 VSS_126 VSS_125 VSS_124 VSS_123 VSS_122 VSS_121 VSS_120 VSS_119 VSS_118 VSS_117 VSS_116 VSS_115 VSS_114 VSS_113 VSS_112 VSS_111 VSS_110 VSS_109 VSS_108 VSS_107 VSS_106 VSS_105 VSS_104 VSS_103 VSS_102 VSS_101 VSS_100 VSS_99 VSS_98 VSS_97 VSS_96
P4 P12 P13 P14 P15 P16 P17 P24 P27 P28 R1 R11 R12 R13 E4 AG11 C27 R14 R15 R16 R17 R18 T6 T12 T13 T14 T15 T16 T17 U4 U12 U13 U14 U15 U16 U17 U24 U25 U26 V2 V13 V15 V24 V27 V28 W6 W24 W25 W26 Y3 Y24 Y27 Y28 AA1 AA24 AA25 AA26 AB4 AB6 AB11 AB14 AB16 AB19 AB21 AB24 AB27 AB28 AC2 AC5 AC9 AC11 AD1 AD3
ICH7 Title
MSI
MICRO-STAR INt'L CO., LTD.
ICH7 - POWER
Size Date:
8 7 6 5 4 3 2
Document Number
MS-7267
Wednesday, November 22, 2006 Sheet 13
1
+
D26 D27 D28 E24 E25 E26 F23 F24 G22 G23 H22 H23 J22 J23 K22 K23 L22 L23 M22 M23 N22 N23 P22 P23 R22 R23 R24 R25 R26 T22 T23 T26 T27 T28 U22 U23 V22 V23 W22 W23 Y22 Y23 AA22 AA23 AB22 AB23 AC23 AC24 AC25 AC26 AD26 AD27 AD28
VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B
+1
1.5V DMI POWER 1.5V DMI POWER
V_FSB_VTT C341 X_C0.1U16Y0402 C351 C0.1U16Y0402 C346 C10U10Y0805 R274 1R0805 C342 C0.01U25X0402 C345 C10U10Y0805 C349 C0.1U16Y0402 L17 1U500m_0805 V_1P5_CORE L19 C472
VCC3 C421 X_C0.1U16Y0402
10U100m_0805 R315
0R
V_1P5_CORE
C473 C0.1U25Y C10U10Y0805
V_1P5_CORE
C
ICH 7 PART 3/3
V_1P5_CORE VCC5 VCC3 EC55 X_.CD1000U6.3EL11.5 1 2 V_2P5_MCH
R262 549R1%0402
1.5V CORE WELL POWER 1.5V CORE WELL POWER
B
A
Rev 3.1 of 36
8
7
6
5
4
3
2
1
VCC_DDR 51 56 62 72 75 78 191 194 181 175 170 53 59 64 197 69 172 187 184 178 189 67 55 18 19 102 68 DIMM1 DATA_A0 DATA_A1 DATA_A2 DATA_A3 DATA_A4 DATA_A5 DATA_A6 DATA_A7 DATA_A8 DATA_A9 DATA_A10 DATA_A11 DATA_A12 DATA_A13 DATA_A14 DATA_A15 DATA_A16 DATA_A17 DATA_A18 DATA_A19 DATA_A20 DATA_A21 DATA_A22 DATA_A23 DATA_A24 DATA_A25 DATA_A26 DATA_A27 DATA_A28 DATA_A29 DATA_A30 DATA_A31 DATA_A32 DATA_A33 DATA_A34 DATA_A35 DATA_A36 DATA_A37 DATA_A38 DATA_A39 DATA_A40 DATA_A41 DATA_A42 DATA_A43 DATA_A44 DATA_A45 DATA_A46 DATA_A47 DATA_A48 DATA_A49 DATA_A50 DATA_A51 DATA_A52 DATA_A53 DATA_A54 DATA_A55 DATA_A56 DATA_A57 DATA_A58 DATA_A59 DATA_A60 DATA_A61 DATA_A62 DATA_A63
VCC3 42 43 48 49 161 162 167 168 238 DIMM2 8 7 6 16 15 28 27 37 36 84 83 93 92 105 104 114 113 46 45 X3 188 183 63 182 61 60 180 58 179 177 70 57 176 196 174 173 54 190 71 73 74 192 125 126 134 135 146 147 155 156 202 203 211 212 223 224 232 233 164 165 195 77 52 171 193 76 185 186 137 138 220 221 120 119 X1 1 X2 239 240 101 DQS_A0 DQS_A#0 DQS_A1 DQS_A#1 DQS_A2 DQS_A#2 DQS_A3 DQS_A#3 DQS_A4 DQS_A#4 DQS_A5 DQS_A#5 DQS_A6 DQS_A#6 DQS_A7 DQS_A#7 DATA_A[0..63] DATA_A0 DATA_A1 DATA_A2 DATA_A3 DATA_A4 DATA_A5 DATA_A6 DATA_A7 DATA_A8 DATA_A9 DATA_A10 DATA_A11 DATA_A12 DATA_A13 DATA_A14 DATA_A15 DATA_A16 DATA_A17 DATA_A18 DATA_A19 DATA_A20 DATA_A21 DATA_A22 DATA_A23 DATA_A24 DATA_A25 DATA_A26 DATA_A27 DATA_A28 DATA_A29 DATA_A30 DATA_A31 DATA_A32 DATA_A33 DATA_A34 DATA_A35 DATA_A36 DATA_A37 DATA_A38 DATA_A39 DATA_A40 DATA_A41 DATA_A42 DATA_A43 DATA_A44 DATA_A45 DATA_A46 DATA_A47 DATA_A48 DATA_A49 DATA_A50 DATA_A51 DATA_A52 DATA_A53 DATA_A54 DATA_A55 DATA_A56 DATA_A57 DATA_A58 DATA_A59 DATA_A60 DATA_A61 DATA_A62 DATA_A63 3 4 9 10 122 123 128 129 12 13 21 22 131 132 140 141 24 25 30 31 143 144 149 150 33 34 39 40 152 153 158 159 80 81 86 87 199 200 205 206 89 90 95 96 208 209 214 215 98 99 107 108 217 218 226 227 110 111 116 117 229 230 235 236 2 5 8 11 14 17 20 23 26 29 32 35 38 41 44 47 50 65 66 79 82 85 88 91 94 97 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 55 18 19 102 68
VCC_DDR 51 56 62 72 75 78 191 194 181 175 170 53 59 64 197 69 172 187 184 178 189 67
VCC3 238 VDDSPD 42 43 48 49 161 162 167 168 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
VDD0 VDD1 VDD2 VDD3 VDD3#75 VDD4 VDD5 VDD6 VDD7 VDD8 VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ4#69 VDDQ5 VDDQ6 VDDQ7 VDDQ7#178 VDDQ8 VDDQ9
D
C
3 4 9 10 122 123 128 129 12 13 21 22 131 132 140 141 24 25 30 31 143 144 149 150 33 34 39 40 152 153 158 159 80 81 86 87 199 200 205 206 89 90 95 96 208 209 214 215 98 99 107 108 217 218 226 227 110 111 116 117 229 230 235 236 2 5 8 11 14 17 20 23 26 29 32 35 38 41 44 47 50 65 66 79 82 85 88 91 94 97
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
VDD0 VDD1 VDD2 VDD3 VDD3#75 VDD4 VDD5 VDD6 VDD7 VDD8 VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ4#69 VDDQ5 VDDQ6 VDDQ7 VDDQ7#178 VDDQ8 VDDQ9
RC0 RC1 NC#19 NC/TEST NC
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
RC0 RC1 NC#19 NC/TEST NC
VDDSPD
DQS0 DQS0# DQS1 DQS1# DQS2 DQS2# DQS3 DQS3# DQS4 DQS4# DQS5 DQS5# DQS6 DQS6# DQS7 DQS7# DQS8 DQS8# X3 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10_AP A11 A12 A13 A14 A15 A16/BA2 BA1 BA0 WE# CAS# RAS# DM0/DQS9 NC/DQS9# DM1/DQS10 NC/DQS10# DM2/DQS11 NC/DQS11# DM3/DQS12 NC/DQS12# DM4/DQS13 NC/DQS13# DM5/DQS14 NC/DQS14# DM6/DQS15 NC/DQS15# DM7/DQS16 NC/DQS16# DM8/DQS17 NC/DQS17# ODT0 ODT1 CKE0 CKE1 CS0# CS1# CK0(DU) CK0#(DU) CK1(CK0) CK1#(CK0#) CK2(DU) CK2#(DU) SCL SDA X1 VREF X2 SA0 SA1 SA2
MAA_A0 MAA_A1 MAA_A2 MAA_A3 MAA_A4 MAA_A5 MAA_A6 MAA_A7 MAA_A8 MAA_A9 MAA_A10 MAA_A11 MAA_A12 MAA_A13
DQS0 DQS0# DQS1 DQS1# DQS2 DQS2# DQS3 DQS3# DQS4 DQS4# DQS5 DQS5# DQS6 DQS6# DQS7 DQS7# DQS8 DQS8# X3 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10_AP A11 A12 A13 A14 A15 A16/BA2 BA1 BA0 WE# CAS# RAS# DM0/DQS9 NC/DQS9# DM1/DQS10 NC/DQS10# DM2/DQS11 NC/DQS11# DM3/DQS12 NC/DQS12# DM4/DQS13 NC/DQS13# DM5/DQS14 NC/DQS14# DM6/DQS15 NC/DQS15# DM7/DQS16 NC/DQS16# DM8/DQS17 NC/DQS17# ODT0 ODT1 CKE0 CKE1 CS0# CS1# CK0(DU) CK0#(DU) CK1(CK0) CK1#(CK0#) CK2(DU) CK2#(DU) SCL SDA X1 VREF X2 SA0 SA1 SA2
7 6 16 15 28 27 37 36 84 83 93 92 105 104 114 113 46 45 X3 188 183 63 182 61 60 180 58 179 177 70 57 176 196 174 173 54 190 71 73 74 192 125 126 134 135 146 147 155 156 202 203 211 212 223 224 232 233 164 165 195 77 52 171 193 76 185 186 137 138 220 221 120 119 X1 1 X2 239 240 101
DQS_A0 DQS_A#0 DQS_A1 DQS_A#1 DQS_A2 DQS_A#2 DQS_A3 DQS_A#3 DQS_A4 DQS_A#4 DQS_A5 DQS_A#5 DQS_A6 DQS_A#6 DQS_A7 DQS_A#7
DQS_A0 DQS_A#0 DQS_A1 DQS_A#1 DQS_A2 DQS_A#2 DQS_A3 DQS_A#3 DQS_A4 DQS_A#4 DQS_A5 DQS_A#5 DQS_A6 DQS_A#6 DQS_A7 DQS_A#7
8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8
D
MAA_A[0..13] 8,16 MAA_A0 MAA_A1 MAA_A2 MAA_A3 MAA_A4 MAA_A5 MAA_A6 MAA_A7 MAA_A8 MAA_A9 MAA_A10 MAA_A11 MAA_A12 MAA_A13
SBS_A2 SBS_A1 SBS_A0 WE_A# CAS_A# RAS_A# DQM_A0 DQM_A1 DQM_A2 DQM_A3 DQM_A4 DQM_A5 DQM_A6 DQM_A7
SBS_A2 SBS_A1 SBS_A0 WE_A# CAS_A# RAS_A#
8,16 8,16 8,16 8,16 8,16 8,16
SBS_A2 SBS_A1 SBS_A0 WE_A# CAS_A# RAS_A# DQM_A0 DQM_A1 DQM_A2 DQM_A3 DQM_A4 DQM_A5 DQM_A6 DQM_A7 DQM_A[0..7] 8
C
B
VSS VSS#5 VSS#8 VSS#11 VSS#14 VSS#17 VSS#20 VSS#23 VSS#26 VSS#29 VSS#32 VSS#35 VSS#38 VSS#41 VSS#44 VSS#47 VSS#50 VSS#65 VSS#66 VSS#79 VSS#82 VSS#85 VSS#88 VSS#91 VSS#94 VSS#97
ODT_A0 ODT_A1 SCKE_A0 SCKE_A1 SCS_A#0 SCS_A#1 P_DDR0_A N_DDR0_A P_DDR1_A N_DDR1_A P_DDR2_A N_DDR2_A SMBCLK SMBDATA DIMM_VREF_A
ODT_A0 ODT_A1 SCKE_A0 SCKE_A1 SCS_A#0 SCS_A#1 P_DDR0_A N_DDR0_A P_DDR1_A N_DDR1_A P_DDR2_A N_DDR2_A
8,16 8,16 8,16 8,16 8,16 8,16 8 8 8 8 8 8
VSS#100 VSS#103 VSS#106 VSS#109 VSS#112 VSS#115 VSS#118 VSS#121 VSS#124 VSS#127 VSS#130 VSS#133 VSS#136 VSS#139 VSS#142 VSS#145 VSS#148 VSS#151 VSS#154 VSS#157 VSS#160 VSS#163 VSS#166 VSS#169 VSS#198 VSS#201 VSS#204 VSS#207 VSS#210 VSS#213 VSS#216 VSS#219 VSS#222 VSS#225 VSS#228 VSS#231 VSS#234 VSS#237
PLACE CLOSE TO DIMM PIN
VSS#100 VSS#103 VSS#106 VSS#109 VSS#112 VSS#115 VSS#118 VSS#121 VSS#124 VSS#127 VSS#130 VSS#133 VSS#136 VSS#139 VSS#142 VSS#145 VSS#148 VSS#151 VSS#154 VSS#157 VSS#160 VSS#163 VSS#166 VSS#169 VSS#198 VSS#201 VSS#204 VSS#207 VSS#210 VSS#213 VSS#216 VSS#219 VSS#222 VSS#225 VSS#228 VSS#231 VSS#234 VSS#237
C216 X_C0.1U16Y0402
VSS VSS#5 VSS#8 VSS#11 VSS#14 VSS#17 VSS#20 VSS#23 VSS#26 VSS#29 VSS#32 VSS#35 VSS#38 VSS#41 VSS#44 VSS#47 VSS#50 VSS#65 VSS#66 VSS#79 VS