Text preview for : QUANTA ZG5 - REV 1A.pdf part of Acer Acer Aspire one ZG5 Acer Aspire one ZG5



Back to : QUANTA ZG5 - REV 1A.pdf | Home

5

4

3

2

1

D

VTERM(+0.9V) VTT(+1.05V) +1.5VSUS +1.5V +1.8VSUS +1.8V +2.5V 3VPCU +3.3V +3.3VSUS LCD_3.3V LCD_5V +5V

ZG5 NB Block Diagram
Diamondville
VCORE:+1.196 ~ +0.748 VCCP:+1.05V VCCA:+1.8V or +1.5V
P 4,5

2008.04.01

VID[0:6]

CPU VCORE
P 29
D

+/- CPU_CLK +/- HCLK

Clock Gengerator TBD.
P 3

FSB

CRT 17 P 8.9" panel LVDS
P 17

945GMS HOST P 6
DDR P 7 LVDS, DMI, DDR CLK P 8 POWER P 9 GND P 10

CHA SATA

DDRII 256M/512M/1GB
P 14,15,16
C

C

HDD, ODD SSD module
P 17

P 22

RJ-45
P 21

10/100 Ethernet PCI-E RTL8102EL 21 P Card Reader PCI-E JBM385 P 24 HDA CODEC HD Audio ALC268 P 19 MDC Modem
P 19

DMI

ICH7M
RTC, AC97, SATA, IDE, LPC, CPU P 11 PCI-E, USB, DMI, PCI P 12 SMB, GPIO, CLK P 13

IDE/USB USB Camera Conn. USB
PCI-E/USB

P 22

Camera Module SIM card
B

5in1
B

3G module
P 23

P 19

Int. SPK Audio Jack Int. Mic RJ-11
5

WLAN + WMAX
P 23

WLAN +WMAX Module

USB LPC BUS

USB PORT X 3
P 20,24

EC WPCE775L
PCI-E
P 25

A

Card Reader P 26 JBM385 SD Card
P 26
4

SPI Flash
A

Int. KB
P 18

T/P
P 18
3

Charger
P 27

Battery
Size Document Number

Quanta Computer Inc.
PROJECT : ZG5
Block Diagram
Date: Thursday, June 05, 2008 Sheet
1

P 27
2

Rev 1A 1 of 34

5

4

3

2

1

5VPCU
SW 1A

5VUSB
D

USBON
D

Control By EC
SW 0.64A

+5V

MAINON
PWM 1.18A

VRON
5VPCU(3A)

+VCCP (1.05V) +1.5V

VIN

Always ON

PWM

2A

PWM

3VPCU(3A) 0.038A

3VPCU
SW

SUSB#
0.055A

+3.3VSUS
C

3VSUSON
C

Control By EC

LDO

0.008A

1.5VSUSON

+1.5VSUS Control By EC
SW 2.35A

+3.3V

MAINON
LDO 0.04A

+2.5V

3.83A
B

3.1A

MAINON VCC18MEM
B

VIN

PWM

SW

0.13A

+1.8V

MAINON SUSC# SUSB#
LDO 0.6A

VTERM (0.9V)

VIN VRON
A

PWM

6A

+VCORE
(0.762V~1.3V)
A

DCIN

ALWAYS ON

S4 OFF

S3 OFF
Quanta Computer Inc.
PROJECT : ZG5
Size Date: Document Number

Block Diagram
Thursday, June 05, 2008
1

Rev 1A Sheet 2 of 34

5

4

3

2

5

4

3

2

1

Clock Generator
+1.05V_VDD +3V C148 0.1u/10V_4 C159 0.1u/10V_4 C417 10u/10V_8 C146 0.1u/10V_4 C165 0.1u/10V_4 C174 0.1u/10V_4 C167 0.1u/10V_4 C408 10u/10V_8 L32 PBY160808T-301Y-N_6 C172 0.1u/10V_4 +1.05V PM_STPPCI# PM_STPCPU# R133 R132 2.2K_4 2.2K_4 10K_4 L31 PBY160808T-301Y-N_6 C150 10u/10V_8 VDD_CK_VDD_PCI VDD_CK_VDD_48 VDD_CK_VDD_PCI VDD_CK_VDD_REF VDD_CK_VDD_PCI VDD_CK_VDD_CPU +1.05V_VDD C419 10u/10V_8 U7 9 16 23 4 46 62 19 27 33 52 43 56 VDD_PCI VDD_48 VDD_PLL3 VDD_REF VDD_SRC VDD_CPU VDD_96_IO VDD_PLL3_IO VDD_SRC_IO_1 VDD_SRC_IO_3 VDD_SRC_IO_2 VDD_CPU_IO IO_VOUT SCLK SDA 55 7 6 45 44 61 60 58 57 54 53 42 41 40 39 37 38 51 50 48 47 34 35 31 32 28 29 24 25 20 21 63 SMBCK1 SMBDT1 PM_STPPCI# PM_STPCPU# CLK_CPU_BCLK_R CLK_CPU_BCLK#_R CLK_MCH_BCLK_R CLK_MCH_BCLK#_R CLK_PCIE_MINI2&4_R CLK_PCIE_MINI2&4#_R CLK_PCIE_3GPLL_R CLK_PCIE_3GPLL#_R CLK_MCH_OE#_R NEW_CLKREQ#_R CLK_PCIE_NEW_R CLK_PCIE_NEW_R# CLK_PCIE_MINI3#_R CLK_PCIE_MINI3_R CLK_PCIE_MINI_R CLK_PCIE_MINI#_R CLK_PCIE_LAN_R CLK_PCIE_LAN#_R CLK_PCIE_ICH_R CLK_PCIE_ICH#_R CLK_PCIE_SATA_R CLK_PCIE_SATA#_R DREFSSCLK_R DREFSSCLK#_R DREFCLK_R DREFCLK#_R R126 R355 475/F_4 475/F_4 T44 T43 CLK_PCIE_3GPLL 8 CLK_PCIE_3GPLL# 8 MCH_CLKREQ# 8 CLKREQ_WLAN# 23 PE2CLK+ 23 PE2CLK- 23 PE1CLK- 21 PE1CLK+ 21 PE0CLK+ 24 PE0CLK- 24 PE3CLK+ 26 PE3CLK- 26 CLK_PCIE_ICH 12 CLK_PCIE_ICH# 12 CLK_PCIE_SATA 11 CLK_PCIE_SATA# 11 DREFSSCLK 8 DREFSSCLK# 8 DREFCLK 8 DREFCLK# 8 VR_PWRGD_CK410 13 PM_STPPCI# 13 PM_STPCPU# 13 CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4 CLK_MCH_BCLK 6 CLK_MCH_BCLK# 6 PCLK_591 C153 C135 C152 C151 *33p/50V_4 15p/50V_4 *33p/50V_4 *33p/50V_4 C147 0.1u/10V_4 C145 0.1u/10V_4 C156 0.1u/10V_4 C413 0.1u/10V_4 C171 0.1u/10V_4 NEW_CLKREQ#_R R356

+3V

D

D

CK505

SRC5/PCI_STOP# SRC5#/CPU_STOP# CPU0 CPU0# CPU1 CPU1# SRC8/ITP SRC8#/ITP#

To SB To CPU To NB

CLKUSB_48 14M_ICH PCLK_ICH

23 PCLK_DEBUG

PCLK_DEBUG R129 T65

47_4

PCLK_DEBUG_R PCLK_PCM_R PCLK_OZ129_R

8 10 11 12 13 14 3 2 17 64 5 65 15 18 22 26 59 30 36 49 1

PCI0/CR#_A PCI1/CR#_B PCI2/TME PCI3 PCI4/SRC5_EN PCIF5/ITP_EN XTAL_IN XTAL_OUT USB_48/FSA FSB/TEST/MODE

SRC10# SRC10 SRC11/CR#_H SRC11#/CR#_G SRC9 SRC9# SRC7/CR#_F SRC7#/CR#_E SRC6 SRC6# SRC4 SRC4# SRC3/CR#_C SRC3#/CR#_D

To NB

T64
C

PCI_CLK_SIO_R 33_4 33_4 PCLK_591_R PCLK_ICH_R

25 12

LCLK_EC PCLK_ICH

PCLK_591 PCLK_ICH

R121 R117

To WLAN To LAN To Card Reader To SDIO To SB To SB To NB To NB
SEL2 SEL1 SEL0

C

CG_XIN

Frequence select CPU 100 133 166 200 266 333 400 SRC 100 100 100 100 100 100 100 PCI 33 33 33 33 33 33 33
Default

rev. C R102 47 ->33
13 CLKUSB_48

CG_XOUT 33_4 2.2K_4 10K_4 47_4 FSA FSB FSC

FSC FSB FSA 1 0 0 0 0 1 1 1 0 0 1 1 0 0 1 1
56_4

13

14M_ICH

R102 CLK_BSEL0 R105 CLK_BSEL1 CLK_BSEL2 R358 R131 C166 27p/50V_4 2

1 1 1 0 0 0 0 1

CG_XIN Y2 14.318MHZ

CL=20p
C168 27p/50V_4
B

CG_XOUT

REF0/FSC/TESTSEL VSS_BODY SRC2/SATA VSS_PCI SRC2#/SATA# VSS_48 VSS_IO SRC1/SE1 VSS_PLL3 SRC1#/SE2 VSS_CPU VSS_SRC1 SRC0/DOT96 VSS_SRC2 SRC0#/DOT96# VSS_SRC3 VSS_REF CKPWRGD/PWRDWN# SLG8SP513

Reserved
B

1

SLG8SP513VTR ,ICS9LPRS365BKLFT
+3V ICS9LPRS365 RTM875T-606 (ALPRS365K13) (AL000875K06) PCI2/TME internal PD PCI-3/SRC5_EN internal PD PULL HIGH PULL DOWN R124 R122 10K_4 *10K_4 PCLK_OZ129_R

To NB

+1.05V

R101 R96 R100

4 CPU_BSEL0

*0_4 CLK_BSEL0 R94 *1K_4 *1K_4 *0_4 0_4 *1K_4 *0_4 0_4 CLK_BSEL2 R362 CLK_BSEL1 R140

1K_4

MCH_BSEL0 8

+1.05V NO OVERCLOCKING (default) NORMAL RUN PIN37/38 IS PCI_STOP/CPU_STOP PIN 17/18 IS SRC/DOT +3V (default) R116 10K_4 +1.05V +3V PIN 46/47 IS CPUITP PIN 46/47 IS SRC8 (default) R109 10K_4 +3V R104 *10K_4 PCLK_ICH 4 CPU_BSEL2 R111 *10K_4 PCLK_591 HIGH 27MHz LOW SRC 4 CPU_BSEL1

R137 R139 R138 R363 R361 R359

Pin 11

PCI2/TME

1K_4

MCH_BSEL1 8

Pin 12

PCI-3

PIN37/38 IS SRC5

Pin 13

PCI-4/27M_SEL PCI-4/27M_SEL internal PD PCIF-5/ITP_EN PCIF-5/ITP_EN internal PD

PIN 17/18 IS 27MHz

(default)

1K_4

Pin 14

MCH_BSEL2 8

Clock Gen I2C
A

+3V

:ICS9LPRS365BGLFT QCI:ALPRS365K13 :SLG8SP512TTR: QCI:AL8SP512K05
R351 4.7K_4 Q29 SMBDT1

2

Q28 13,23 SMBDT 3

2

R354 4.7K_4 SMBCK1 Size Date: Document Number

Quanta Computer Inc.
PROJECT : ZG5
SMBCK1 14,16,23

A

1 2N7002E

SMBDT1 14,16,23

13,23

SMBCK

3 2N7002E

1

CLOCK GENERATOR
Thursday, June 05, 2008 Sheet 3 of 34

Rev 1A

5

4

3

2

1

5

4

3

2

1

CPU
6 H_A#[31:3] P21 H20 N20 R20 J19 N19 G20 M19 H21 L20 M20 K19 J20 L21 K20 T11 H_AP0 D17 H_REQ#0 N21 H_REQ#1 J21 H_REQ#2 G19 H_REQ#3 P20 H_REQ#4 R19 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_AP1 T5 11 11 11 11 11 11 11 H_A20M# H_FERR# H_IGNNE# H_STPCLK# H_INTR H_NMI H_SMI# C19 F19 E21 A16 D19 C14 C18 C20 E20 D20 B18 C15 B16 B17 C16 A17 B14 B15 A14 B19 M18 H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

U25A A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]# AP0 REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]# A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]# AP1 ADS# BNR# BPRI# V19 Y19 U21 T21 T19 Y18 T20 R60 F16 IERR# V16 H_INIT#R R72 1K/F_4 W20 D15 W18 H_RS#0 Y17 H_RS#1 U20 H_RS#2 W19 AA17 V20 XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 XDP_BPM#4 XDP_BPM#5 XDP_TCK XDP_TDI XDP_TDO XDP_TMS XDP_TRST# BR1# R74 *0_4 R42 H_PROCHOT#_R 22_4 G17 E4 E5 K17 J18 H15 J15 K18 J16 M17 N16 M16 L17 K16 V15 H17 56_4 R67 330_4 H_ADS# H_BNR# H_BPRI# 6 6 6

6

H_D#[63:0]

U25B H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 Y11 W10 Y12 AA14 AA11 W12 AA16 Y10 Y9 Y13 W15 AA13 Y16 W13 AA9 W9 Y14 Y15 W16 V9 AA5 Y8 W3 U1 W7 W6 Y7 AA6 Y3 W2 V3 U2 T3 AA8 V2 W4 Y4 Y5 Y6 R4 A7 U5 V5 T17 R6 M6 N15 N6 P17 T6 J6 H5 G5 D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]# DP#0 D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]# DP#1 D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]# D[45]# D[46]# D[47]# DSTBN[2]# DSTBP[2]# DINV[2]# DP#2 D[48]# D[49]# D[50]# D[51]# D[52]# D[53]# D[54]# D[55]# D[56]# D[57]# D[58]# D[59]# D[60]# D[61]# D[62]# D[63]# DSTBN[3]# DSTBP[3]# DINV[3]# DP#3 COMP[0] COMP[1] COMP[2] COMP[3] DPRSTP# DPSLP# DPWR# PWRGOOD SLP# CORE_DET CMREF[1] R3 R2 P1 N1 M2 P2 J3 N3 G3 H2 N2 L2 M3 J2 H1 J1 K2 K3 L1 M4 C2 G2 F1 D3 B4 E1 A5 C3 A6 F2 C6 B6 B3 C4 C7 D2 E2 F3 C5 D4 T1 T2 F20 F21 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47

04
H_D#[63:0] 6

D

DATA GRP 2

CONTROL

ADDR ADDR GROUP GROUP 0 0

DATA GRP 0

DEFER# DRDY# DBSY# BR0# IERR# INIT# LOCK# RESET# RS[0]# RS[1]# RS[2]# TRDY# HIT# HITM# BPM[0]# BPM[1]# BPM[2]# BPM[3]# PRDY# PREQ# TCK TDI TDO TMS TRST# BR1#

H_DEFER# 6 H_DRDY# 6 H_DBSY# 6 H_BREQ#0 6 +1.05V H_INIT# +1.05V 11

D

6 6

H_ADSTB#0 H_REQ#[4:0]

H_LOCK# 6 H_CPURST# 6 H_RS#[2:0] 6 6 6 6 H_TRDY# 6 6 H_HIT# H_HITM# T12 T6 T15 T17 T3 XDP_BPM#5 XDP_TCK XPD_TDI T13 XPD_TMS XPD_TRST# R33 68_4 PM_SYSRST# 13 +1.05V H_PROCHOT# 29 H_THERMDA 5 H_THERMDC 5 R_PM_THRMTRIP# 5 R92 R83 *1K/F_4 *1K/F_4 T16 T22 T14 T25 T10 T21 6 H_DSTBN#1 6 H_DSTBP#1 6 H_DINV#1 T34 6 6 H_DSTBN#0 H_DSTBP#0 H_DINV#0 T18 H_D#[63:0]

H_DP#0 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31

H_DP#2 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

T31

H_DSTBN#2 6 H_DSTBP#2 6 H_DINV#2 6 H_D#[63:0] 6

6

H_A#[31:3]

DATA GRP 1

C

XDP/ITP SIGNALS

THERM

ADDR GROUP 1

DATA GRP 3

C

PROCHOT# THRMDA THRMDC

H_DP#1 H_GTLREF ACLKPH DCLKPH H_BINIT# EDM EXTGBREF FORCEPR# H_HFPLL H_MCERR H_RSP#

H_DP#3 COMP0 COMP1 COMP2 COMP3 T27 R353 R352 R51 R36

H_DSTBN#3 6 H_DSTBP#3 6 H_DINV#3 6 27.4/F_4 54.9/F_4 27.4/F_4 54.9/F_4 H_DPRSTP# 11,29 H_DPSLP# 11 H_DPWR# 6 H_PWRGD 11 H_CPUSLP# 6,11 T56

6

H_ADSTB#1

THERMTRIP#

B

U18 T16 H_IGNNE# J4 R16 T15 R15 U17 D6 G6 H6 K4 K5 M15 L16

A20M# FERR# IGNNE# STPCLK# LINT0 LINT1 SMI# NC1 NC2 NC3 NC4 NC5 NC6 NC7

H CLK

BCLK[0] BCLK[1]

V11 V12

CLK_CPU_BCLK 3 CLK_CPU_BCLK# 3

NC

+1.05V +1.05V

R38 *1K_4 R90 *1K_4 CAD Note: Place near CPU

RSVD3 RSVD2 RSVD1

C21 C1 A3

3 CPU_BSEL0 3 CPU_BSEL1 3 CPU_BSEL2

GTLREF ACLKPH DCLKPH BINIT# MISC EDM EXTBGREF FORCEPR# HFPLL MCERR# RSP# BSEL[0] BSEL[1] BSEL[2]

R18 R17 U4 V17 N18 A13 CORE_DET CPU_CMREF B7

B

Diamondville_SC_Rev1

Diamondville_SC_Rev1 +1.05V +1.05V +1.05V R76 R37 R79 R70 R39 R40 R53 *1K_4 *1K_4 *1K_4 *1K_4 *1K_4 *1K_4 *1K_4 H_NMI H_SMI# H_INTR H_STPCLK# H_DPSLP# H_DPRSTP# H_PWRGD R334 1K/F_4 H_GTLREF

Layout note: Comp0,2 connect with trace length shorter Comp1,3 connect with trace length shorter
.

Zo=27.4ohm, make than 0.5" Zo=55ohm, make than 0.5"

. +1.05V

+1.05V +1.05V

R98 *1K_4 H_DPWR#

R85 1K/F_4 EXTGBREF R84 2K/F_4 C119 1u/10V_4

R341 1K/F_4 CPU_CMREF R345 2K/F_4 C403 0.1u/10V_4

R315 R330 R321 R329

1K/F_4 1K/F_4 1K/F_4 1K/F_4

H_A#32 H_A#33 H_A#34 H_A#35 +1.05V

Rev : B No stuff - R37 ,R38 ,R39 ,R40 ,R70 ,R90 ,R98 from Intel info.
A

A

For defensive design reservation only in this initial release

R97 *1K_4

R336 C396 2K/F_4 0.1u/10V_4

Layout note: Zo=55ohm, 0.5" max for GTLREF
5 4

Layout note: Zo=55ohm, 0.5" max for EXTGBREF

Layout note: Zo=55ohm, 0.5" max for GTLREF

XDP_TMS XDP_TDI XDP_BPM#5 XDP_TCK XDP_TRST#

R47 R57 R34 R61 R73

56_4 56_4 56_4 56_4 56_4

Quanta Computer Inc.
PROJECT : ZG5
Size Date: Document Number

Diamondville(1/2)
Thursday, June 05, 2008 Sheet
1

Rev 1A 4 of 34

3

2

5

4

3

2

1

+1.05V

CPU-2 U25D
A2 A4 A8 A15 A18 A19 A20 B1 B2 B5 B8 B13 B20 B21 C8 C17 D1 D5 D8 D14 D18 D21 E3 E6 E7 E8 E15 E16 E19 F4 F5 F6 F7 F17 F18 G1 G4 G7 G9 G13 G21 H3 H4 H7 H9 H13 H16 H18 H19 J5 J7 J9 J13 J17 K1 K6 K7 K9 K13 K15 K21 L3 L4 L5 L6 L7 L9 L13 L15 L18 L19 M1 M5 M7 M9 M13 M21 N4 VSS1 VSS2 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS41 VSS42 VSS45 VSS46 VSS48 VSS49 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS162 VSS161 VSS160 VSS159 VSS158 VSS157 VSS156 VSS155 VSS154 VSS153 VSS152 VSS151 VSS149 VSS148 VSS147 VSS146 VSS145 VSS144 VSS143 VSS142 VSS141 VSS140 VSS139 VSS138 VSS137 VSS136 VSS135 VSS134 VSS133 VSS132 VSS131 VSS130 VSS129 VSS128 VSS127 VSS126 VSS125 VSS124 VSS123 VSS122 VSS121 VSS120 VSS119 VSS118 VSS117 VSS116 VSS115 VSS114 VSS113 VSS112 VSS111 VSS110 VSS109 VSS108 VSS107 VSS106 VSS105 VSS104 VSS103 VSS102 VSS101 VSS100 VSS99 VSS98 VSS97 VSS96 VSS95 N5 N7 N9 N13 N17 P3 P4 P5 P6 P7 P9 P13 P15 P16 P18 P19 R1 R5 R7 R9 R13 R21 T4 T5 T7 T9 T10 T11 T12 T13 T18 U3 U6 U7 U15 U16 U19 V1 V4 V6 V7 V8 V13 V14 V18 V21 W1 W5 W8 W11 W14 W17 W21 Y1 Y2 Y20 Y21 AA2 AA3 AA4 AA7 AA10 AA12 AA15 AA18 AA19 AA20 +1.05V V10 A9 B9

U25C VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9 VTT10 VTT11 VTT12 VTT13 VTT14 VTT15 VTT16 VTT17 VTT18 VTT19 VTT20 VTT21 VTT22 VTT23 VTT24 VTT25 VTT26 VTT27 VTT28 VTT29 VTT30 VTT31 VTT32 C9 D9 E9 F8 F9 G8 G14 H8 H14 J8 J14 K8 K14 L8 L14 M8 M14 N8 N14 P8 P14 R8 R14 T8 T14 U8 U9 U10 U11 U12 U13 U14

2.5A
C74 0.1u/10V_4 VCC_CORE C106 0.1u/10V_4 C69 1u/10V_4 C104 1u/10V_4 C78 1u/10V_4 C68 1u/10V_4 C120 10u/6.3V_6 C116 10u/6.3V_6 + C59 330u/2.5V_7343

05

VCCF VCCQ1 VCCQ2

PLACE IN CAVITY

PLACE IN CORRIDOR AND CLOSE TO CPU
D

D

C110

C62

C107

C63

C108

C64

C109

C65

C66

C111

C114

C67

10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6

3A
VCC_CORE A10 A11 A12 B10 B11 B12 C10 C11 C12 D10 D11 D12 E10 E11 E12 F10 F11 F12 G10 G11 G12 H10 H11 H12 J10 J11 J12 K10 K11 K12 L10 L11 L12 M10 M11 M12 N10 N11 N12 P10 P11 P12 R10 R11 R12 VCCP1 VCCP2 VCCP3 VCCP4 VCCP5 VCCP6 VCCP7 VCCP8 VCCP9 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16 VCCP17 VCCP18 VCCP19 VCCP20 VCCP21 VCCP22 VCCP23 VCCP24 VCCP25 VCCP26 VCCP27 VCCP28 VCCP29 VCCP30 VCCP31 VCCP32 VCCP33 VCCP34 VCCP35 VCCP36 VCCP37 VCCP38 VCCP39 VCCP40 VCCP41 VCCP42 VCCP43 VCCP44 VCCP45

C89

C87

C86

C90

C91

C92

C95

C94

C96

C99

C88

C85

C93

C97

C98

C100

1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4

PLACE IN CAVITY

FAN
+5V 25 FANSIG C157 2.2u/6.3V_6 U6 2 FAN_ON# +1.5V R89 C124 10u/10V_8 0_4 25 VFAN 1 4 VO GND FON# GND GND VSET GND G995 VIN 3 5 6 7 8

+3V

R360 10K_6
C

C

VCCPC64 VCCPC63 VCCPC62 VCCPC61

F14 F13 E14 E13

30 MIL
TH_FAN_POWER C409 2.2u/6.3V_6 C411 1000p/50V_4

CN12 1 2 3

5 4

130mA
+V1.5S_VCCA C112 0.1u/10V_4

C415 0.01u/16V_4 FAN

125 Degree Protection
+1.05V 3 TO PWR Q6 29 29 29 29 29 29 29 8,13,29 IMVP_PWRGD 2 2N7002E 1
B

VCCA VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6] VCCSENSE VSSSENSE

D7 F15 D16 E18 G15 G16 E17 G18 . C13 D13 R77 100/F_4

B

R78 100/F_4

VID0 VID1 VID2 VID3 VID4 VID5 VID6 VCC_CORE

+1.05V R28 1K_4 R23 56_4 CPU 4 R_PM_THRMTRIP# R27 Q5 R_THERMTRIP_PWR# 1 3 33_4 MMBT3904 R25 *0_4 2

.

VCC_SENSE 29 VSS_SENSE 29

Diamondville_SC_Rev1

SYS_SHDN# 28 PM_THRMTRIP# 8,11 945GMS & ICH7M

+3V

CPU Thermal monitor
25 2ND_MBCLK 25 2ND_MBDATA 13 THERM_ALERT# FAN_ON# +3VR120 +5V R110 10K_4 10K_4 R119 *0_4 THERM_ALERT#_R 8 7 6 4

C137 R93 1_6 LM86VCC 0.1u/10V_4 1 2 3 5 C131 2200p/50V_4 H_THERMDC 4 Size Date:
2

U5 SCLK SDA ALERT# OVERT# VCC DXP DXN GND

H_THERMDA 4
A

A

Quanta Computer Inc.
PROJECT : ZG5
Document Number

Diamondville_SC_Rev1

G780P81U Layout Note:Routing 10:10 mils and away ADDRESS: 4C from noise source with ground gard
4 3

Diamondville(2/2)
Thursday, June 05, 2008 Sheet
1

Rev 1A 5 of 34

5

5

4

3

2

1

945GMS
4 H_D#[63:0] U26A H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 C4 F6 H9 H6 F7 E3 C2 C3 K9 F5 J7 K7 H8 E5 K8 J8 J2 J3 N1 M5 K5 J5 H3 J4 N3 M4 M3 N8 N6 K3 N9 M1 V8 V9 R6 T8 R2 N5 N2 R5 U7 R8 T4 T7 R3 T5 V6 V3 W2 W1 V2 W4 W7 W5 V5 AB4 AB8 W8 AA9 AA8 AB1 AB7 AA2 AB5 HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8# HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63# HA3# HA4# HA5# HA6# HA7# HA8# HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31# HADS# HADSTB0# HADSTB1# H_AVREF HBNR# HBPRI# HBREQ0# HCPURST# HDVREF HCLKN HCLKP HDBSY# HDEFER# HDINV0# HDINV1# HDINV2# HDINV3# HDPWR# HDRDY# HDSTBN0# HDSTBN1# HDSTBN2# HDSTBN3# HDSTBP0# HDSTBP1# HDSTBP2# HDSTBP3# F8 D12 C13 A8 E13 E12 J12 B13 A13 G13 A12 D14 F14 J13 E17 H15 G15 G14 A15 B18 B15 E14 H13 C14 A17 E15 H17 D17 G17 F10 C12 H16 E2 B9 C7 G8 B10 E1 AA6 AA5 C10 C6 H5 J6 T9 U6 G7 E6 F3 M8 T1 AA3 F4 M7 T2 AB3 H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#[31:3] 4 +1.05V

06

D

R59 221/F_4 H_XSWING R45 100/F_4 C32 0.1u/10V_4

D

10mil wide, 20mil spacing +1.05V

R55 221/F_4 H_YSWING R62 100/F_4 H_ADS# 4 H_ADSTB#0 4 H_ADSTB#1 4 H_BNR# 4 H_BPRI# 4 H_BREQ#0 4 H_CPURST# 4 C53 0.1u/10V_4
C

C

H_DVREF

10mil wide, 20mil spacing +1.05V

HOST

H_DVREF

H_CPURST# has T topology
R309 100/F_4 H_DVREF R300 200/F_4 C360 C367
B

B

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3

CLK_MCH_BCLK# 3 CLK_MCH_BCLK 3 H_DBSY# 4 H_DEFER# 4 H_DINV#0 4 H_DINV#1 4 H_DINV#2 4 H_DINV#3 4 H_DPWR# 4 H_DRDY# 4 H_DSTBN#0 4 H_DSTBN#1 4 H_DSTBN#2 4 H_DSTBN#3 4 H_DSTBP#0 4 H_DSTBP#1 4 H_DSTBP#2 4 H_DSTBP#3 4 H_HIT# 4 H_HITM# 4 H_LOCK# 4

0.1u/10V_4 *0.1u/10V_4

+1.05V H_XSCOMP H_YSCOMP H_XRCOMP H_YRCOMP R32 R320 R31 R318 54.9/F_4 54.9/F_4 24.9/F_4 10mil wide, 20mil spacing 24.9/F_4 10mil wide, 20mil spacing

A

H_XRCOMP H_XSCOMP H_XSWING H_YRCOMP H_YSCOMP H_YSWING

A10 A6 C15 J1 K1 H1

HXRCOMP HXSCOMP HXSWING HYRCOMP HYSCOMP HYSWING

HHIT# HHITM# HLOCK# HREQ0# HREQ1# HREQ2# HREQ3# HREQ4# HRS0# HRS1# HRS2# HCPUSLP# HTRDY#

C8 B4 C5 G9 E9 G12 B8 F12 A5 B6 G10 E8 E10

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_RS#0 H_RS#1 H_RS#2

H_REQ#[4:0] 4

H_RS#[2:0] 4

A

Quanta Computer Inc.
PROJECT : ZG5
Size Date: Document Number

H_CPUSLP# 4,11 H_TRDY# 4

945GMS HOST
945GMS
5 4 3

Rev 1A Sheet 6
1

Thursday, June 05, 2008
2

of

34

5

4

3

2

1

945GMS DDR
U26C 14,15,16 MDA[63:0] MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63 SCASB# SRASB# SWEB#

+1.05V

U26H

+1.5V

07

D

C

B

AC31 AB28 AE33 AF32 AC33 AB32 AB31 AE31 AH31 AK31 AL28 AK27 AH30 AL32 AJ28 AJ27 AH32 AF31 AH27 AF28 AJ32 AG31 AG28 AG27 AN27 AM26 AJ26 AJ25 AL27 AN26 AH25 AG26 AM12 AL11 AH9 AK9 AM11 AK11 AM8 AK8 AG9 AF9 AF8 AK6 AF7 AG11 AJ6 AH6 AN6 AM6 AK3 AL2 AM5 AL5 AJ3 AJ2 AG2 AF3 AE7 AF6 AH5 AG3 AG5 AF5 AG19 AG21 AG20

SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63 SB_CAS# SB_RAS# SB_WE#

SA_BS_0 SA_BS_1 SA_BS_2 SA_DM0 SA_DM1 SA_DM2 SA_DM3 SA_DM4 SA_DM5 SA_DM6 SA_DM7 SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7 SA_DQS0# SA_DQS1# SA_DQS2# SA_DQS3# SA_DQS4# SA_DQS5# SA_DQS6# SA_DQS7# SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8 SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_CAS# SA_RAS# SA_RCVENINB SA_RCVENOUTB SA_WEB SB_BS_0 SB_BS_1 SB_BS_2 SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8 SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13

AK12 AH11 AG17 AB30 AL31 AF30 AK26 AL9 AG7 AK5 AH3 AC28 AJ30 AK33 AL25 AN9 AH8 AM2 AE3 AC29 AK30 AJ33 AM25 AN8 AJ8 AM3 AE2 AJ15 AM17 AM15 AH15 AK15 AN15 AJ18 AF19 AN17 AL17 AG16 AL18 AG18 AL14 AJ17 AK18 AN28 AM28 AH17 AH21 AJ20 AE27 AN20 AL21 AK21 AK22 AL22 AH22 AG22 AF21 AM21 AE21 AL20 AE22 AE26 AE20

BAA0 BAA1 BAA2 DQMA0 DQMA1 DQMA2 DQMA3 DQMA4 DQMA5 DQMA6 DQMA7 DQSA0+ DQSA1+ DQSA2+ DQSA3+ DQSA4+ DQSA5+ DQSA6+ DQSA7+ DQSA0DQSA1DQSA2DQSA3DQSA4DQSA5DQSA6DQSA7MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 SCASA# SRASA# TP_SA_RCVENIN# TP_SA_RCVENOUT# SWEA# BSB0 BSB1 BSB2 MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13

BAA[2:0] DQMA0 DQMA1 DQMA2 DQMA3 DQMA4 DQMA5 DQMA6 DQMA7 DQSA0+ DQSA1+ DQSA2+ DQSA3+ DQSA4+ DQSA5+ DQSA6+ DQSA7+ DQSA0DQSA1DQSA2DQSA3DQSA4DQSA5DQSA6DQSA7MAA[12:0]

14,15,16 14,15 14,15 14,15 14,15 14,16 14,16 14,16 14,16 14,15 14,15 14,15 14,15 14,16 14,16 14,16 14,16 14,15 14,15 14,15 14,15 14,16 14,16 14,16 14,16 14,15,16

T62 MAA13 SCASA# SRASA# SWEA# BSB[2:0] 14 14,15,16 14,15,16 14,15,16 14

T61 T63

MAB[12:0] 14

+1.05V

T25 R25 P25 N25 M25 P24 N24 M24 Y22 W22 V22 U22 T22 R22 P22 N22 M22 Y21 W21 V21 U21 T21 R21 P21 N21 M21 Y20 W20 V20 U20 T20 R20 P20 N20 M20 Y19 P19 N19 M19 Y18 P18 N18 M18 Y17 P17 N17 M17 Y16 P16 N16 M16 Y15 P15 N15 M15 Y14 W14 V14 U14 T14 R14 P14 N14 M14 T10 R10 P10 N10 L10 D1 M10 A18 AB10 AA10

VCC_NCTF1 VCC_NCTF2 VCC_NCTF3 VCC_NCTF4 VCC_NCTF5 VCC_NCTF6 VCC_NCTF7 VCC_NCTF8 VCC_NCTF9 VCC_NCTF10 VCC_NCTF11 VCC_NCTF12 VCC_NCTF13 VCC_NCTF14 VCC_NCTF15 VCC_NCTF16 VCC_NCTF17 VCC_NCTF18 VCC_NCTF19 VCC_NCTF20 VCC_NCTF21 VCC_NCTF22 VCC_NCTF23 VCC_NCTF24 VCC_NCTF25 VCC_NCTF26 VCC_NCTF27 VCC_NCTF28 VCC_NCTF29 VCC_NCTF30 VCC_NCTF31 VCC_NCTF32 VCC_NCTF33 VCC_NCTF34 VCC_NCTF35 VCC_NCTF36 VCC_NCTF37 VCC_NCTF38 VCC_NCTF39 VCC_NCTF40 VCC_NCTF41 VCC_NCTF42 VCC_NCTF43 VCC_NCTF44 VCC_NCTF45 VCC_NCTF46 VCC_NCTF47 VCC_NCTF48 VCC_NCTF49 VCC_NCTF50 VCC_NCTF51 VCC_NCTF52 VCC_NCTF53 VCC_NCTF54 VCC_NCTF55 VCC_NCTF56 VCC_NCTF57 VCC_NCTF58 VCC_NCTF59 VCC_NCTF60 VCC_NCTF61 VCC_NCTF62 VCC_NCTF63 VCC_NCTF64 VTT_NCTF1 VTT_NCTF2 VTT_NCTF3 VTT_NCTF4 VTT_NCTF5 VTT_NCTF6 MCH_RSVD3 MCH_RSVD4 MCH_RSVD5 MCH_RSVD6

NCTF

VCCAUX_NCTF1 VCCAUX_NCTF2 VCCAUX_NCTF3 VCCAUX_NCTF4 VCCAUX_NCTF5 VCCAUX_NCTF6 VCCAUX_NCTF7 VCCAUX_NCTF8 VCCAUX_NCTF9 VCCAUX_NCTF10 VCCAUX_NCTF11 VCCAUX_NCTF12 VCCAUX_NCTF13 VCCAUX_NCTF14 VCCAUX_NCTF15 VCCAUX_NCTF16 VCCAUX_NCTF17 VCCAUX_NCTF18 VCCAUX_NCTF19 VCCAUX_NCTF20 VCCAUX_NCTF21 VCCAUX_NCTF22 VCCAUX_NCTF23 VCCAUX_NCTF24 VCCAUX_NCTF25 VCCAUX_NCTF26 VCCAUX_NCTF27 VCCAUX_NCTF28 VCCAUX_NCTF29 VCCAUX_NCTF30 VCCAUX_NCTF31 VCCAUX_NCTF32 VCCAUX_NCTF33 VCCAUX_NCTF34 VCCAUX_NCTF35 VCCAUX_NCTF36 VCCAUX_NCTF37 VCCAUX_NCTF38 VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7 VSS_NCTF8 VSS_NCTF9 VSS_NCTF10 VSS_NCTF11 VSS_NCTF12 VSS_NCTF13 VSS_NCTF14 VSS_NCTF15 VSS_NCTF16 VSS_NCTF17 VSS_NCTF18 VSS_NCTF19 CFG19 MCH_RSVD10 MCH_RSVD11 MCH_RSVD12 MCH_RSVD13 MCH_RSVD14 MCH_RSVD15 MCH_RSVD16 MCH_RSVD17 MCH_RSVD18 MCH_RSVD19 MCH_RSVD20 MCH_RSVD21 MCH_RSVD22 MCH_RSVD23 MCH_RSVD24 MCH_RSVD25

AD25 AC25 AB25 AD24 AC24 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 K14 AD13 Y13 W13 V13 U13 T13 R13 P13 N13 M13 AD12 Y12 W12 V12 U12 T12 R12 P12 N12 M12 AD11 AD10 K10 AN33 AA25 V25 U25 AA22 AA21 AA20 AA19 AA18 AA17 AA16 AA15 AA14 AA13 A4 A33 B2 AN1 C1 K28 K25 K26 R24 T24 K21 K19 K20 K24 K22 J17 K23 K17 K12 K13 K16 K15

D

DDR2 SYSTEM MEMORY

C

+3V
B

R68 *1K_4 GMS_CFG19 GMS CFG19: LOW=Normal High=LANES REVERSED(945GMS not support)

14 14 14

SCASB# SRASB# SWEB#

MAB13

14

945GMS
A

A

945GMS

Quanta Computer Inc.
PROJECT : ZG5
Size Date:
5 4 3 2

Document Number

945GMS DDR
Thursday, June 05, 2008 Sheet
1

Rev 1A 7 of 34

5

4

3

2

1

DMI, LVDS, DDR CLK
U26F U26B 12 12 12 12 12 12 12 12 DMI_TXN0 DMI_TXN1 DMI_TXP0 DMI_TXP1 DMI_RXN0 DMI_RXN1 DMI_RXP0 DMI_RXP1 DMI_TXN0 DMI_TXN1 DMI_TXP0 DMI_TXP1 DMI_RXN0 DMI_RXN1 DMI_RXP0 DMI_RXP1 Y29 Y32 Y28 Y31 V28 V31 V29 V32 DMI_RXN0 DMI_RXN1 DMI_RXP0 DMI_RXP1 DMI_TXN0 DMI_TXN1 DMI_TXP0 DMI_TXP1 CFG0 CFG1 CFG2 CFG3 CFG5 CFG6 C18 E18 G20 G18 J20 GMS_CFG5 J18 MCH_BSEL0 3 MCH_BSEL1 3 MCH_BSEL2 3 H27 J27 Y26 AA26 SDVOCTRL_DATA SDVOCTRL_CLK GCLKN GCLKP EXP_COMPI EXP_ICOMPO SDV0_TVCLKIN# SDVO_INT# SDVO_FLDSTALL# SDVO_TVCLKIN SDVO_INT SDVO_FLDSTALL 3 CLK_PCIE_3GPLL# 3 CLK_PCIE_3GPLL

08
+V1.5S_PCIE R28 PEG_COMP R75 24.9/F_4 M28 N30 R30 T29 M30 P30 T30
D

DMI

R64 R66 *2.2K_4 2.2K_4

R58 *2.2K_4

17 17 17 17 17 17 17

CRT_SCL CRT_SDA CRT_B CRT_G CRT_R CRT_VSYNC CRT_HSYNC

CFG/RSVD

14 14 15 16
C

MCLKOA2+ MCLKOA3+ MCLKOA0MCLKOA1MCLKOA2MCLKOA3CKEA0 CKEA1 CKEA2 CKEA3 CSA#0 CSA#1 CSA#2 CSA#3

AJ1 AM30 AG33 AF1 AK1 AN30 AN21 AN22 AF26 AF25 AG14 AF12 AK14 AH12 AJ21 AF11 AE12 AF14 AJ14 AJ12 M_RCOMP# M_RCOMP +1.8VSUS AN12 AN14 AA33 AE1

SM_CK2 SM_CK3 SM_CK0# SM_CK1# SM_CK2# SM_CK3# SM_CKE0 SM_CKE1 SM_CKE2 SM_CKE3 SM_CS0# SM_CS1# SM_CS2# SM_CS3#

SDVO

VGA

15 16

MCLKOA0+ MCLKOA1+

AF33 AG1

SM_CK0 SM_CK1

MCH_RSVD1 MCH_RSVD2 MCH_RSVD7 MCH_RSVD8 MCH_RSVD9

K32 K31 C17 F18 A3

T35

DDR2 MUXING

14 14

14,15,16 14 14 14 14,15,16 14 14 14

CFG3 RESERVE CFG5 LOW DMIX2 Default, HIGH DMIX4(945GMS not support) 17 INT_LVDS_PWM 17 INT_LVDS_BLON CFG6 RESERVE L_CTLA_CLK L_CTLB_DATA 17 PHL_CLK 17 PHL_DATA 17 INT_LVDS_DIGON

T33

H20 H22 A24 R30 150/F_4 A23 E25 R50 150/F_4 F25 C25 R49 150/F_4 D25 VSYNC F27 R48 39_4 HSYNC D27 R54 39_4 CRTREFSET H25 R69 255/F_4 H30 G29 L_CTLA_CLK F28 L_CTLB_DATA E28 G28 H28 K30 L_IBG K27 R71 1.5K/F_4 J29 J30 K29 D30 C30 A30 A29 G31 F32 D31 H31 G32 C31 F33 D33 F30 E33 D32 F29

DDCCLK DDCDATA BLUE BLUE# GREEN GREEN# RED RED# VSYNC HSYNC REFSET LBKLT_CTRL LBKLT_EN LCTLA_CLK LCTLB_CLK LDDC_CLK LDDC_DATA LVDD_EN LIBG LVBG LVREFH LVREFL LACLKN LACLKP LBCLKN LBCLKP LADATAN0 LADATAN1 LADATAN2 LADATAP0 LADATAP1 LADATAP2 LBDATAN0 LBDATAN1 LBDATAN2 LBDATAP0 LBDATAP1 LBDATAP2

MISC

D

SDVOB_RED# SDVOB_GREEN# SDVOB_BLUE# SDVOB_CLKN SDVOB_RED SDVOB_GREEN SDVOB_BLUE SDVOB_CLKP

P28 N32 P32 T32
C

N28 M32 P33 R32

17 17 E31 G21 F26 R_PM_EXTTS#0 H26 PM_EXTTS#1 R65 J15 AB29 W27 RST_IN#_MCH R82 MCH_ICH_SYNC# 12 PM_BMBUSY# 13 PM_EXTTS#0 14 PM_DPRSLPVR 13,29 PM_THRMTRIP# 5,11 IMVP_PWRGD 5,13,29

TXLCLKOUTTXLCLKOUT+

T32 14,15,16 14 14 14 ODTA0 ODTA1 ODTA2 ODTA3

B

SM_ODT0 SM_ODT1 SM_ODT2 SM_ODT3 SMRCOMPN SMRCOMPP SMVREF0 SMVREF1

ICHSYNC# BM_BUSY# EXT_TS0# EXT_TS1#/DPRSLPVR THRMTRIP# PWROK RSTIN#

PM

R56 0_4 *0_4 100_4

17 17 17

TXLOUT0TXLOUT1TXLOUT2TXLOUT0+ TXLOUT1+ TXLOUT2+

17 17 17 PLTRST# 12,13,21,23,24,25,26 DREFCLK# 3 DREFCLK 3 DREFSSCLK# 3 DREFSSCLK 3 MCH_CLKREQ# 3

TV

SMOCDCOMP0 SMOCDCOMP1

TVDAC_A TVDAC_B TVDAC_C TV_REFSET TV_IRTNA TV_IRTNB TV_IRTNC

LVDS

A21 C20 E20 G23 B21 C21 D21

+1.5V

TV_DCONSEL0 TV_DCONSEL1

G26 J26

B

CLK

DDR_VREF

R417 10K_6 *0_6 R418 10K_6 C138 0.1u/10V_4 C105 0.1u/10V_4 945GMS

DREF_CLKN DREF_CLKP DREF_SSCLKN DREF_SSCLKP CLKREQB

A27 A26 J33 H33 J22

R419

+3V +1.8VSUS M_RCOMP# R108 M_RCOMP R107 80.6/F_4 80.6/F_4 R319 R322 R324 R316 R314 *10K_4 R_PM_EXTTS#0 10K_4 PM_EXTTS#1 10K_4 MCH_CLKREQ# 10K_4 L_CTLA_CLK 10K_4 L_CTLB_DATA

945GMS

A

A

Quanta Computer Inc.
rev. D Add in R417 , R418 , R419
5 4 3 2

PROJECT : ZG5
Size Date: Document Number

945GMS LVDS, DMI, DDR CLK
Thursday, June 05, 2008 Sheet
1

Rev 1A 8 of 34

5

4

3

2

1

945GMS POWER
+1.05V + + C82 C81 C101 4.7u/10V_6 C113 4.7u/10V_6 C72 0.1u/10V_4 C41 0.1u/10V_4 C77 220u/2.5V_3528 C127 10u/10V_8 220u/2.5V_3528

U26D 2.94A

0.1u/10V_4

D

Rev. : C Del C17 & Add in C206,C207 for M/E interference
+1.5V L3 BLM18PG181SN1D_6 C206 10u/6.3V_6 C207 10u/6.3V_6 0.1u/10V_4 +V1.5S_DPLLB L6 BLM18PG181SN1D_6 1.25A
C

+V1.5S_DPLLA

T26 R26 P26 N26 M26 V19 U19 T19 W18 V18 T18 R18 W17 U17 R17 W16 V16 T16 R16 V15 U15 T15 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AC27 AD26 AC26 AB26 AE19 AE18 AF17 AE17 AF16 AE16 AF15 AE15 J14 J10 H10 AE9 AD9 U9 AD8 AD7 AD6 A14 D10 P9 L9 D9 P8 L8 D8 P7 L7 D7 A7 P6 L6 G6 D6 U5 P5 L5 G5 D5 Y4 U4 P4 L4 G4 D4 Y3 U3 P3 L3 G3 D3 Y2 U2 P2 L2 G2 D2 AA1 F1

VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC_AUX1 VCC_AUX2 VCC_AUX3 VCC_AUX4 VCC_AUX5 VCC_AUX6 VCC_AUX7 VCC_AUX8 VCC_AUX9 VCC_AUX10 VCC_AUX11 VCC_AUX12 VCC_AUX13 VCC_AUX14 VCC_AUX15 VCC_AUX16 VCC_AUX17 VCC_AUX18 VCC_AUX19 VCC_AUX20 VCC_AUX21 VCC_AUX22 VCC_AUX23 VCC_AUX24 VCC_AUX25 VCC_AUX26 VCC_AUX27 VCC_AUX28 VTT0 VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9 VTT10 VTT11 VTT12 VTT13 VTT14 VTT15 VTT16 VTT17 VTT18 VTT19 VTT20 VTT21 VTT22 VTT23 VTT24 VTT25 VTT26 VTT27 VTT28 VTT29 VTT30 VTT31 VTT32 VTT33 VTT34 VTT36 VTT35 VTT37 VTT38 VTT39 VTT40

C35

+ C71 330u/2.5V_7343

C56 0.1u/10V_4

+V1.5S_HPLL L8 BLM18PG181SN1D_6 C125 C118 22u/6.3V_8 0.1u/10V_4 C57 C130 C122 0.1u/10V_4 C44

+1.5V

10u/10V_8 0.1u/10V_4

0.1u/10V_4

+V1.5S_MPLL L30 BLM18PG181SN1D_6 C402

place under BGA
+1.05V

1

C405 22u/6.3V_8 PLACE CLOSE TO GMCH
B

PLACE IN CAVITY 0.1u/10V_4 C22 47U/6.3V_1206 C73 C117 4.7u/10V_6

800mA C28

2

4.7u/10V_6

+1.5V L7 91nH C121 220u/2.5V_3528 +

+V1.5S_PCIE

0.47u/6.3V_4

C84 C76 10u/10V_8 10u/10V_8 +V1.5S_3GPLL

C29 0.47u/6.3V_4

L9 BLM18PG181SN1D_6

+2.5V

R328 10_4

+1.05V

20mils

D24 CH500H-40 +V2.5_CRTDAC

L1
A

BLM18PG181SN1D_6 C210 4.7u/10V_6 C215 10u/6.3V_6 C392 0.47u/6.3V_4

POWER

Rev. : C Change C22 size to 1206 for M/E interference

VCCA_TVDACA0 VCCA_TVDACA1 VCCA_TVDACB0 VCCA_TVDACB1 VCCA_TVDACC0 VCCA_TVDACC1 VCCA_TVBG VSSA_TVBG VCCD_TVDAC VCCDQ_TVDAC VCCD_LVDS0 VCCD_LVDS1 VCCD_LVDS2 VCCHV0 VCCHV1 VCCHV2 VCCSM0 VCCSM1 VCCSM2 VCCSM3 VCCSM4 VCCSM5 VCCSM6 VCCSM7 VCCSM8 VCCSM9 VCCSM10 VCCSM11 VCCSM12 VCCSM13 VCCSM14 VCCSM15 VCCSM16 VCCSM17 VCCSM18 VCCSM19 VCCSM20 VCCSM21 VCCSM22 VCCSM23 VCCSM24 VCCSM25 VCCSM26 VCCSM27 VCCSM28 VCCSM29 VCCSM30 VCCSM31 VCCSM32 VCCSM33 VCCSM34 VCCSM35 VCCSM36 VCCSM37 VCCSM38 VCCSM39 VCCSM40 VCCSM41 VCCSM42 VCCSM43 VCCSM44 VCCSM45 VCCSM46 VCCSM47 VCCSM48 VCCSM49 VCCSM50 VCCSM51 VCCA_MPLL VCCA_HPLL VCCA_DPLLA VCCA_DPLLB VCCD_HMPLL1 VCCD_HMPLL2 VCCTX_LVDS0 VCCTX_LVDS1 VCC3G0 VCC3G1 VCCA_3GPLL VCCA_3GBG VSSA_3GBG VCC_SYNC VCCA_CRTDAC0 VCCA_CRTDAC1 VSSA_CRTDAC VCCA_LVDS VSSALVDS VTT41 VTT42 VTT43 VTT44 VTT45

B20 120+24mA +1.5V A20 B22 DISABLE TV A22 D22 C22 +1.5V D23 E23 F20 C123 F22 20mA C54 10u/10V_8 C28 B28 0.1u/10V_4 A28 +3V E26 40mA D26 +V3.3S_VCCHY C26 R20 0_4 AB33 AM32 AN29 C141 C115 C33 C23 AM29 AL29 1u/10V_4 1u/10V_4 0.1u/10V_4 10u/10V_8 AK29 AJ29 AH29 AG29 +1.8VSUS AF29 AE29 1.72A PLACE IN CAVITY AN24 AM24 C132 C128 C129 C136 C142 C140 + C155 AL24 AK24 1u/10V_4 4.7u/10V_6 4.7u/10V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 AJ24 AH24 330u/2.5V_7343 AG24 AF24 AE24 AN18 AN16 C144 AM16 AL16 1u/10V_4 AK16 AJ16 AN13 AM13 AL13 AK13 AJ13 AH13 AG13 AF13 AE13 AN4 AM10 AL10 C143 AK10 1u/10V_4 AH1 AH10 AG10 C133 AF10 1u/10V_4 AE10 AN7 AM7 AL7 AK7 AJ7 AH7 AN10 AJ10 AD1 45mA +V1.5S_MPLL +2.5V AD2 45mA +V1.5S_HPLL B26 50mA +V1.5S_DPLLA J32 50mA +V1.5S_DPLLB AE5 150mA +1.5V C26 C58 AD5 60mA D29 0.1u/10V_4 4.7u/10V_6 C29 +V1.5S_3GPLL 0.4A U33 T33 +V1.5S_PCIE V26 2mA N33 +2.5V C83 C134 M33 C30 10u/10V_8 J23 0.1u/10V_4 C24 70mA 0.1u/10V_4 B24 B25 +2.5V +V2.5_CRTDAC +2.5V B31 B32 P1 L1 G1 U1 Y1
10mA C34 0.1u/10V_4 C70 0.01u/16V_4 C36 C20 0.1u/10V_4 10u/10V_8 C38 C52 0.022u/16V_4 0.1u/10V_4 Size +1.05V Date: Document Number

09

D

C126 0.1u/10V_4

C

B

A

Rev. : B Change D24 schottky diode Rev. : C Del C21 & Add in C210,C215 for M/E interference
5

Quanta Computer Inc.
PROJECT : ZG5
945GMS POWER
Thursday, June 05, 2008 Sheet
1

C376

0.47u/6.3V_4

945GMS

Rev 1A 9 of 34

4

3

2

5

4

3

2

1

945GMS GND

D

C

B

A

AH33 Y33 V33 R33 G33 AK32 AG32 AE32 AC32 AA32 U32 H32 E32 C32 AM31 AJ31 AA31 U31 T31 R31 P31 N31 M31 J31 F31 AL30 AG30 AE30 AC30 AA30 Y30 V30 U30 G30 E30 B30 AA29 U29 R29 P29 N29 M29 H29 E29 B29 AK28 AH28 AE28 AA28 U28 T28 J28 D28 AM27 AF27 AB27 AA27 Y27 U27 T27 R27 P27 N27 M27 G27 E27 C27 B27 AL26 AH26 W26 U26 AN25 AK25 AG25 AE25 J25 G25 A25 H23 F23 B23 AM22 AJ22 AF22 G22 E22 J21 H21 F21 AM20 AK20 AH20 AF20 D20 W19 R19 AM18 AH18 AF18 U18 H18 D18 AK17 V17 T17 F17 B17 AH16 U16

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110

VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185

J16 AL15 AG15 W15 R15 F15 D15 AM14 AH14 AE14 H14 B14 F13 D13 AL12 AG12 H12 B12 AN11 AJ11 AE11 AM9 AJ9 AB9 W9 R9 M9 J9 F9 C9 A9 AL8 AG8 AE8 U8 AA7 V7 R7 N7 H7 E7 B7 AL6 AG6 AE6 AB6 W6 T6 M6 K6 AN5 AJ5 B5 AA4 V4 R4 N4 K4 H4 E4 AL3 AD3 W3 T3 B3 AK2 AH2 AF2 AB2 M2 K2 H2 F2 V1 R1

U26E 945GMS

U26G

W33 AM33 AL33 C33 B33 AN32 A32 AN31 W28 V27 W29 J24 H24 W32 G24 F24 E24 D24 K33 A31 E21 C23 AN19 AM19 AL19 AK19 AJ19 AH19 AN3 Y9 J19 H19 G19 F19 E19 D19 C19 B19 A19 Y8 G16 F16 E16 D16 C16 B16 AN2 A16 Y7 AM4 AF4 AD4 AL4 AK4 W31 AJ4 AH4 AG4 AE4 AM1

NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18 NC19 NC20 NC21 NC22 NC23 NC24 NC25 NC26 NC27 NC28 NC29 NC30 NC31 NC32 NC33 NC34 NC35 NC36 NC37 NC38 NC39 NC40 NC41 NC42 NC43 NC44 NC45 NC46 NC47 NC48 NC49 NC50 NC51 NC52 NC53 NC54 NC55 NC56 NC57 NC58 NC59 NC60

NC61 NC62 NC63 NC64 NC65 NC66 NC67 NC68 NC69 NC70 NC71 NC72

W30 Y6 AL1 Y5 Y10 W10 W25 V24 U24 V10 U10 K18

10

D

NC

MCH_RSVD26 MCH_RSVD27 MCH_RSVD28 MCH_RSVD29 MCH_RSVD30 MCH_RSVD31 MCH_RSVD32 MCH_RSVD33 MCH_RSVD34 MCH_RSVD35 MCH_RSVD36 MCH_RSVD37 MCH_RSVD38 MCH_RSVD39 MCH_RSVD40 MCH_RSVD41 MCH_RSVD42

Y25 Y24 AB22 AB21 AB19 AB16 AB14 AA12 W24 AA24 AB24 AB20 AB18 AB15 AB13 AB12 AB17

C

VSS

945GMS
B

A

Quanta Computer Inc.
PROJECT : ZG5
Size Date:
4 3 2

Document Number

945GMS GND
Thursday, June 05, 2008 Sheet
1

Rev 1A 10 of 34

5

5

4

3

2

1

ICH7M C15
Y1 32.768KHZ

Rev. C Change x'tal package to low U2A profile
CLK_32KX1 CLK_32KX2

Pull-UP
RTC LPC
LAD0 LAD1 LAD2 LAD3 LDRQ0# LDRQ1#/GPIO23 LFRAME# A20GATE A20M# CPUSLP# AA6 AB5 AC4 Y6 AC3 AA5 AB3 AE22 AH28 AG27 AF24 AH25 AG26 AG24 AG22 AG21 AF22 AF25 AG23 AH24 AF23
RCIN# H_SMI#_R GA20 TP_H_CPUSLP# R265 H_DPRSTP#_R H_DPSLP#_R R279 R271 R272 *0_4 0_4 0_4 56.2/F_4 +1.05V LDRQ#0 LDRQ#1 LPCAD0 LPCAD1 LPCAD2 LPCAD3 23,25 23,25 23,25 23,25

+3V

11

18p/50V_4

AB1 AB2 AA3 Y5 W4 W1 Y1 Y2 W3 V3 U3 U5 V4 T5 U7 V6 V7

RTXC1 RTCX2 RTCRST# INTRUDER# INTVRMEN EE_CS EE_SHCLK EE_DOUT EE_DIN LAN_CLK

2

1

RTCRST# SM_INTRUDER# ICH_INTVRMEN

R286 R288 R270 R281 R277 R269 LPCDRQ#1 23 LPCFRAME# 23,25 GA20 25 H_A20M# 4 10K_4 10K_4 10K_4 10K_4 4.7K_4 8.2K_4 LDRQ#0 LDRQ#1 RCIN# GA20 PDIORDY IRQ15#
D

3

D

C14 18p/50V_4 R291 VCCRTC 332K/F_4

4

R19 10M_4 ICH_INTVRMEN R290 *0_4

place near ICH7M

H_CPUSLP# 4,6 H_DPRSTP# 4,29 H_DPSLP# 4 H_FERR# 4 H_PWRGD 4 H_IGNNE# 4

Enable (default) Disable

1 0
ACZ_BCLK ACZ_SYNC

LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2

LAN CPU

INTVRMEN

LAN_RSTSYNC

TP1/DPRSTP# TP2/DPSLP# FERR# GPIO49/CPUPWRGD IGNNE# INIT3_3V# INIT# INTR RCIN# NMI SMI# STPCLK# THERMTRIP#

RTC
D9 3VPCU CH500H-40 D8 VCCRTC_3

VCCRTC C232 1u/10V_6 R190 RTCRST# 20K/F_6 R376 C236 1u/10V_6 1M_6 *SHORT_PAD G1
C

ICH7 internal VR enable strap

C

SDIN0:CODEC SDIN1:MODEM 19 ACZ_SDIN0 T69 T7

ACZ_RST# ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN2 ACZ_SDOUT

R5 T2 T3 T1 T4 AF18 AF3 AE3 AG2 AH2 AF7 AE7 AG6 AH6 AF1 AE1

AC-97/AZALIA

U1 R6

T1 H_INIT# 4 H_INTR 4 KBRST# 25 H_NMI 4 H_SMI# 4 H_STPCLK# 4 +1.05V PM_THRMTRIP# 5,8

ACZ_BIT_CLK ACZ_SYNC ACZ_RST# ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN2 ACZ_SDOUT SATALED# SATA0RXN SATA0RXP SATA0TXN SATA0TXP SATA2RXN SATA2RXP SATA2TXN SATA2TXP

20 22 22 22 22

SATALED# SATA_RXN0 SATA_RXP0 SATA_TXN0 SATA_TXP0

SATA_LED# 0.01u/16V_4 C3 C2 0.01u/16V_4

Should be 2" close ICH7
AB15 AE14 AG13 AF13 AD14 AC13 AD12 AC12 AE12 AF12 AB13 AC14 AF14 AH13 AH14 AC15 AH17 AE17 AF17 AE16 AD16
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 PDA0 PDA1 PDA2

PDD[15:0] 22

HDD

SATA_TXN0_C SATA_TXP0_C

ODD
B

Rev. C Remove SATA ODD Delete C1 , C4 from BOM

SATA

3 CLK_PCIE_SATA# 3 CLK_PCIE_SATA 24.9/F_4 R273 SATA_BIAS

SATA_CLKN SATA_CLKP SATARBIASN SATARBIASP DIOR# DIOW# DDACK# IDEIRQ IORDY DDREQ
ICH7-M

Place within 500 mils of ICH7 25mils/15mils
22 22 22 22 22 22 PDDIOR PDDIOW PDDACK IRQ15# PDIORDY PDDREQ

AH10 AG10 AF15 AH15 AF16 AH16 AG16 AE15

DD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7 DD8 DD9 DD10 DD11 DD12 DD13 DD14 DD15 DA0 DA1 DA2 DCS1# DCS3#

1

CN19 RTC_CONN

SM_INTRUDER# VCCRTC_4

5VPCU R379 R378

2

20MIL
R381 VCCRTC_1 8.06K_4 8.06K_4

20MIL
Q32 VCCRTC_23 MMBT3904

2

AH22 R278 24.9/F_4 R280 56.2/F_4 AF26 H_THERMTRIP_R

R182 1K_4

1

CH500H-40

1

B

68.1K_4 PDA[2:0] 22

IDE

R377 PDCS1 PDCS3 22 22 150K_4

ACZ_SDOUT ACZ_SYNC ACZ_RST#
A

R307 R311 R29 R24

39_4 39_4 39_4 39_4

ACZ_SDOUT_AUDIO 19 ACZ_SYNC_AUDIO 19

Rev. C Change RTC battery holder Change R379 , R381 , R378 , R377 value for RTC charge function
A

ACZ_RESET#_AUDIO 19 ACZ_BITCLK_AUDIO 19

ACZ_BCLK

COMPONENTS 945GM ICH7-M
3

P/N AJSL8Z20T25
Size Document Number

PROJECT : ZG5 Quanta Computer Inc.
ICH7-M (CPU, SATA, IDE,LPC)
Date:
2

C27 C372 C373 *10p/50V_4 *10p/50V_4 *10p/50V_4

Rev. B Remove MDC componentsR303 , R306 , R41 , R21
4

2

Rev 1A 11
1

AJSL8YB0T21

Thursday, June 05, 2008

Sheet

of

34

5

5

4

3

2

1

Card reader
24 24 24 24 21 21 21 21 23 23 23 23 26 26 26 26 PE0RXPE0RX+ PE0TXPE0TX+ PE1RXPE1RX+ PE1TXPE1TX+ PE2RXPE2RX+ PE2TXPE2TX+ PE3RXPE3RX+ PE3TXPE3TX+

caps within 250mils
0.1u/10V_4 C103 C102 0.1u/10V_4 0.1u/10V_4 C80 C79 0.1u/10V_4 0.1u/10V_4 C61 C60 0.1u/10V_4 0.1u/10V_4 C50 C51 0.1u/10V_4 +3V

U2D

LAN

H26 H25 PCIE_TXN1_C G28 PCIE_TXP1_C G27 K26 K25 PCIE_TXN2_C J28 PCIE_TXP2_C J27 M26 M25 PCIE_TXN3_C L28 PCIE_TXP3_C L27 P26 P25 N28 N27

Direct Media Interface

F26 F25 PCIE_TXN0_C E28 PCIE_TXP0_C E27

PERn1 PERp1 PETn1 PETp1 PERn2 PERp2 PETn2 PETp2 PERn3 PERp3 PETn3 PETp3 PERn4 PERp4 PETn4 PETp4 PERn5 PERp5 PETn5 PETp5 PERn6 PERp6 PETn6 PETp6 SPI_CLK SPI_CS# SPI_ARB SPI_MOSI SPI_MISO

DMI0RXN DMI0RXP DMI0TXN DMI0TXP DMI1RXN DMI1RXP DMI1TXN DMI1TXP DMI2RXN DMI2RXP DMI2TXN DMI2TXP DMI3RXN DMI3RXP DMI3TXN DMI3TXP DMI_CLKN DMI_CLKP DMI_ZCOMP DMI_IRCOMP USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBRBIAS# USBRBIAS

V26 V25 U28 U27 Y26 Y25 W28 W27 AB26 AB25 AA28 AA27 AD25 AD24 AC28 AC27 AE28 AE27 C25 D25 F1 F2 G4 G3 H1 H2 J4 J3 K1 K2 L4 L5 M1 M2 N4 N3 D2 D1

DMI_RXN0 DMI_RXP0 DMI_TXN0 DMI_TXP0 DMI_RXN1 DMI_RXP1 DMI_TXN1 DMI_TXP1

8 8 8 8 8 8 8 8

D

PCI-Express

Mini card

SDIO

CLK_PCIE_ICH# 3 CLK_PCIE_ICH 3 DRI_IRCOMP_R USBP0USBP0+ USBP1USBP1+ USBP2USBP2+ USBP3USBP3+ USBP4USBP4+ USBP5USBP5+ USBP6USBP6+ USBP7USBP7+ 20 20 24 24 24 24 22 22 17 17 23 23 23 23 24 24 R337 24.9/F_4 +1.5V

R317 10K_4 T8 T53 T9
C

R313 10K_4

R312 10K_4 SPI_SCLK SPI_CE# SPI_ARB SPI_SI SPI_SO

T25 T24 R28 R27 R2 P6 P1 P5 P2 D3 C4 D5 D4 E5 C3 A2 B3

15/15milsPlace

within 500 mils of ICH7

System sub board sub board SSD CCD 3G CARD WiMAX

20 24

USBOC#0 USBOC#12

OC0# OC1# OC2# OC3# OC4# OC5# OC6# OC7#

OC0# OC1# OC2# OC3# OC4# OC5#/GPIO29 OC6#/GPIO30 OC7#/GPIO31
ICH7-M

USB

T50 T52

USB_RBIAS_PN R335 22.6/F_6

sub board-top

25mils/15mils

Place within 500 mils of ICH7

U2B

B

E18 C18 A16 F18 E16 A18 E17 A17 A15 C14 E14 D14 B12 C13 G15 G13 E12 C11 D11 A11 A10 F11 F10 E9 D9 B9 A8 A6 C7 B6 E6 D6
INTA# INTB# INTC# INTD#

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 PIRQA# PIRQB# PIRQC# PIRQD# RSVD[1] RSVD[2] RSVD[3] RSVD[4] RSVD[5]
ICH7-M

PCI

REQ0# GNT0# REQ1# GNT1# REQ2# GNT2# REQ3# GNT3# REQ4#/GPIO22 GNT4#/GPIO48 GPIO1/REQ5# GPIO17/GNT5# C/BE0# C/BE1# C/BE2# C/BE3# IRDY# PAR PCIRST# DEVSEL# PERR# PLOCK# SERR# STOP# TRDY# FRAME# PLTRST# PCICLK PME# GPIO2/PIRQE# GPIO3/PIRQF# GPIO4/PIRQG# GPIO5/PIRQH#

D7 E7 C16 D16 C17 D17 E13 F13 A13 A14 C8 D8 B15 C12 D12 C15 A7 E10 B18 A12 C9 E11 B10 F15 F14 F16 C26 A9 B19 G8 F7 F8 G7

REQ0# REQ1# REQ2# GNT2# REQ3# REQ4# REQ5# T30 T24 T26

REQ0# REQ1# REQ2# GNT2# Boot BIOS select GNT5,4 01: SPI 10: PCI 11: LPC (Default) CBE0#

Pull-UP resistor
RP1 REQ1# REQ2# REQ3# +3V

6 7 8 9 10
RP2

8.2K_10P8R 5 4 3 2 1 8.2K_10P8R 5 4 3 2 1 8.2K_10P8R 5 4 3 2 1 8.2K_10P8R 5 4 3 2 1

+3V TRDY# STOP# FRAME# REQ4# +3V DEVSEL# PLOCK# PERR# REQ5# +3V INTD# INTC# INTB# INTA# +3V_S5 OC0# OC7# OC6# OC5#

IRDY# REQ0# SERR# +3V

6 7 8 9 10
RP3

IRDY# DEVSEL# PERR# PLOCK# SERR# STOP# TRDY# FRAME# PLT_RST-R# PCLK_ICH

IRDY# DEVSEL# PERR# PLOCK# SERR# STOP# TRDY# FRAME#

T29 PCIRST# 23 +3V

INTG# INTE# INTF# INTH#

6 7 8 9 10
RP4

OC2# OC4# OC3# +3V_S5

PLT_RST-R# 23 PCLK_ICH 3 PME# 21 INTE# INTF# INTG#

6 7 8 9 10

CKL use 10Kohm

A

A3 B4 C5 B5 AE5 AD5 AG4 AH4 AD9

Interrupt I/F

INTE# INTF# INTG# INTH#

MISC
RSVD[6] RSVD[7] RSVD[8] RSVD[9] MCH_SYNC#

Stuff for XOR chain testing
AE9 AG8 AH8 F21 ICH_TP3 AH20
R332 *1K/F_4 MCH_ICH_SYNC# C397 *10p/50V_4
4 3

8

PCLK_ICH R344 *22_4
5

A4 A23 B1 B8 B11 B14 B17 B20 B26 B28 C2 C6 C27 D10 D13 D18 D21 D24 E1 E2 E4 E8 E15 F3 F4 F5 F12 F27 F28 G1 G2 G5 G6 G9 G14 G18 G21 G24 G25 G26 H3 H4 H5 H24 H27 H28 J1 J2 J5 J24 J25 J26 K24 K27 K28 L13 L15 L24 L25 L26 M3 M4 M5 M12 M13 M14 M15 M16 M17 M24 M27 M28 N1 N2 N5 N6 N11 N12 N13 N14 N15 N16 N17 N18 N24 N25 N26 P3 P4 P12 P13 P14 P15 P16 P17 P24 P27

VSS[1] VSS[2] VSS[3] VSS[4] VSS[5] VSS[6] VSS[7] VSS[8] VSS[9] VSS[10] VSS[11] VSS[12] VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79] VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97]

VSS[98] VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194]

P28 R1 R11 R12 R13 R14 R15 R16 R17 R18 T6 T12 T13 T14 T15 T16 T17 U4 U12 U13 U14 U15 U16 U17 U24 U25 U26 V2 V13 V15 V24 V27 V28 W6 W24 W25 W26 Y3 Y24 Y27 Y28 AA1 AA24 AA25 AA26 AB4 AB6 AB11 AB14 AB16 AB19 AB21 AB24 AB27 AB28 AC2 AC5 AC9 AC11 AD1 AD3 AD4 AD7 AD8 AD11 AD15 AD19 AD23 AE2 AE4 AE8 AE11 AE13 AE18 AE21 AE24 AE25 AF2 AF4 AF8 AF11 AF27 AF28 AG1 AG3 AG7 AG11 AG14 AG17 AG20 AG25 AH1 AH3 AH7 AH12 AH23 AH27

U2E ICH7-M

12

D

SPI

C

B

Platform Reset
+3V C139 0.1u/10V_4 U4 PLT_RST-R# 2

5

4 1 3
R95 *TC7SH08FU

PLTRST#

8,13,21,23,24,25,26

100K_4 R420 0_4

Rev. D Stuff R420 , NC U4
A

PROJECT : ZG5 Quanta Computer Inc.
Size Date:
2

Document Number

ICH6-M (USB & DMI & PCIE & PCI)
Thursday, June 05, 2008 Sheet
1

Rev 1A 12 of 34

5

4

3

2

1

+1.05V +3V U2C 3,23 SMBCK 3,23 SMBDT PCLK_SMB PDAT_SMB CL_CLK1 SMLINK0 SMLINK1 +3V R114
D

U2F V5REF

S:6mA

G10 AD17

V5REF[1] V5REF[2] V5REF_Sus Vcc1_5_B[1] Vcc1_5_B[2] Vcc1_5_B[3] Vcc1_5_B[4] Vcc1_5_B[5] Vcc1_5_B[6] Vcc1_5_B[7] Vcc1_5_B[8] Vcc1_5_B[9] Vcc1_5_B[10] Vcc1_5_B[11] Vcc1_5_B[12] Vcc1_5_B[13] Vcc1_5_B[14] Vcc1_5_B[15] Vcc1_5_B[16] Vcc1_5_B[17] Vcc1_5_B[18] Vcc1_5_B[19] Vcc1_5_B[20] Vcc1_5_B[21] Vcc1_5_B[22] Vcc1_5_B[23] Vcc1_5_B[24] Vcc1_5_B[25] Vcc1_5_B[26] Vcc1_5_B[27] Vcc1_5_B[28] Vcc1_5_B[29] Vcc1_5_B[30] Vcc1_5_B[31] Vcc1_5_B[32] Vcc1_5_B[33] Vcc1_5_B[34] Vcc1_5_B[35] Vcc1_5_B[36] Vcc1_5_B[37] Vcc1_5_B[38] Vcc1_5_B[39] Vcc1_5_B[40] Vcc1_5_B[41] Vcc1_5_B[42] Vcc1_5_B[43] Vcc1_5_B[44] Vcc1_5_B[45] Vcc1_5_B[46] Vcc1_5_B[47] Vcc1_5_B[48] Vcc1_5_B[49] Vcc1_5_B[50] Vcc1_5_B[51] Vcc1_5_B[52] Vcc1_5_B[53] Vcc3_3[1] VccDMIPLL Vcc1_5_A[1] Vcc1_5_A[2] Vcc1_5_A[3] Vcc1_5_A[4] Vcc1_5_A[5] Vcc1_5_A[6] Vcc1_5_A[7] Vcc1_5_A[8] Vcc1_5_A[9] VccSATAPLL Vcc3_3[2] Vcc1_5_A[10] Vcc1_5_A[11] Vcc1_5_A[12] Vcc1_5_A[13] Vcc1_5_A[14] Vcc1_5_A[15] Vcc1_5_A[16] Vcc1_5_A[17] Vcc1_5_A[18] VccSus3_3[19] VccUSBPLL

C22 B22 A26 B25 A25 A28 A19 A27 A22

SMBCLK SMBDATA LINKALERT# SMLINK0 SMLINK1 RI# SPKR SUS_STAT# SYS_RST# GPIO0/BM_BUSY#

GPIO21/SATA0GP GPIO19/SATA1GP GPIO36/SATA2GP GPIO37/SATA3GP CLK14 CLK48 SUSCLK SLP_S3# SLP_S4# SLP_S5#

SMB

SATA GPIO

AF19 AH18 AH19 AE19 AC1 B2 C20 B24 D23 F22 AA4 AC22 C21 C23 R340 C19 Y4 E20 A20 F19 E19 R4 E22 R3 D20 AD21 AD20 AE20

R267 R274 14M_ICH CLKUSB_48

*8.2K_4 V5REF_SUS 33_4 14M_ICH 3 CLKUSB_48 3 *PAD T60 SUSB# SUSC# *PAD 25 25 T58 +1.5V_PCIE_ICH

S:10mA

F6 AA23 AB22 AB23 AC23 AC24 AC25 AC26 AD26 AD27 AD28 D26 D27 D28 E24 E25 E26 F23 F24 G22 G23 H22 H23 J22 J23 K22 K23 L22 L23 M22 M23 N22 N23 P22 P23 R22 R23 R24 R25 R26 T22 T23 T26 T27 T28 U22 U23 V22 V23 W22 W23 Y22 Y23

S:770mA AA22

CORE

RI# *1K/F_4 LPC_PD# PM_SYSRST# R287 SMB_ALERT#

19 4

SB_BEEP *PAD T20 PM_SYSRST#

8 PM_BMBUSY#

0_4 AB18 B23 AC20 AF21

R348 100/F_4 100/F_4 R339 ICH_PWROK PM_DPRSLPVR PM_BATLOW#_R DNBSWON# *100K_4

3 PM_STPPCI# 3 PM_STPCPU# *PAD T23 *PAD T28 *PAD T59 CLKRUN# *PAD 21,23 SB_WAKE# 23,25 SERIRQ 5 THERM_ALERT#

SYS GPIO Power MGT

GPIO11/SMBALERT# GPIO18/STPPCI# GPIO20/STPCPU# GPIO26 GPIO27 GPIO28 GPIO32/CLKRUN#

PWROK GPIO16/DPRSLPVR TP0/BATLOW# PWRBTN# LAN_RST# RSMRST#

PM_DPRSLPVR 8,29

Vcc1_05[1] Vcc1_05[2] Vcc1_05[3] Vcc1_05[4] Vcc1_05[5] Vcc1_05[6] Vcc1_05[7] Vcc1_05[8] Vcc1_05[9] Vcc1_05[10] Vcc1_05[11] Vcc1_05[12] Vcc1_05[13] Vcc1_05[14] Vcc1_05[15] Vcc1_05[16] Vcc1_05[17] Vcc1_05[18] Vcc1_05[19] VCC PAUX Vcc1_05[20] VccSus3_3/VccLAN3_3[1] VccSus3_3/VccLAN3_3[2] VccSus3_3/VccLAN3_3[3] VccSus3_3/VccLAN3_3[4] Vcc3_3/VccHDA VccSus3_3/VccSusHDA V_CPU_IO[1] V_CPU_IO[2] V_CPU_IO[3] Vcc3_3[3] Vcc3_3[4] Vcc3_3[5] Vcc3_3[6] Vcc3_3[7] Vcc3_3[8] Vcc3_3[9] Vcc3_3[10] Vcc3_3[11] Vcc3_3[12] Vcc3_3[13] Vcc3_3[14] Vcc3_3[15] Vcc3_3[16] Vcc3_3[17] Vcc3_3[18] Vcc3_3[19] Vcc3_3[20] Vcc3_3[21] VccRTC VccSus3_3[1] VccSus3_3[2] VccSus3_3[3] VccSus3_3[4] VccSus3_3[5] VccSus3_3[6] VccSus3_3[7] VccSus3_3[8] VccSus3_3[9] VccSus3_3[10] VccSus3_3[11] VccSus3_3[12] VccSus3_3[13] VccSus3_3[14] VccSus3_3[15] VccSus3_3[16] VccSus3_3[17] VccSus3_3[18] Vcc1_5_A[19] Vcc1_5_A[20] Vcc1_5_A[21] Vcc1_5_A[22] Vcc1_5_A[23] Vcc1_5_A[24] Vcc1_5_A[25] VccSus1_05[1]

L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18 V5 V1 W2 W7 U6

S:940mA
+ C55 C384 C371 0.1u/10V_4 0.1u/10V_4 330u/2.5V_7343

13

Clocks

C378 C370 C381 C358 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4

D

C364 C355 C354 C356 C379 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 +3V

A21 B21 E23 AG18 AC19 U2 F20 AH21 AF20

DNBSWON# 25 PLTRST# 8,12,21,23,24,25,26

S:40mA S:56mA S:10mA

+3V C390 0.1u/10V_4 +3V_S5 C394 0.1u/10V_4 C333 0.1u/10V_4 +1.05V

25

CLKRUN#

T4

GPIO33/AZ_DOCK_EN# GPIO34/AZ_DOCK_RST# WAKE# SERIRQ THRM# VRMPWRGD GPIO6 GPIO7 GPIO8 ICH7-M

SB_WAKE# SERIRQ

VR_PWRGD_CK410 AD22
C

25 25

EC_SCI# EC_SMI#

IDE

RST_HDD# EC_SCI# KBSMI#

AC21 AC18 E21

GPIO

GPIO9 GPIO10 GPIO12 GPIO13 GPIO14 GPIO15 GPIO24 GPIO25 GPIO35 GPIO38 GPIO39

PM_RSMRST# R292 100/F_4 CR_CPPE#SDR CR_CPPE#R RBAYID0 RBAYID1 R_LID# R299 MB_ID1 MB_ID0 MB_ID2

RSMRST#

EC_RSMRST# 25

R7 AE23 AE26 AH26 AA7 AB12 AB20 AC16 AD13 AD18 AG12 AG15 AG19 A5 B13 B16 B7 C10 D15 F9 G11 G12 G16 W5 P7 A24 C24 D19 D22 G19 K3 K4 K5 K6 L1 L2 L3 L6 L7 M6 M7 N7 AB17 AC17 T7 F17 G17 AB8 AC8 K7 TP_ICHVCCSUS1 T54 T19 T55

S:14mA
+3V C380 0.1u/10V_4 C338 0.1u/10V_4 +3V C363 0.1u/10V_4 C365 10u/25V_12
C

VCCA3GP

*0_4 T57 *PAD

LID#

17,25

Rev. : B

CR_WAKE#SD 26 CR_WAKE# 24 GPIO25 /Suspend rail is a HW strap , don't pull down .

+1.5V

+3VSUS

S:50mA
R13 1_6 GPLL_R

L26 1uH_6

30mils
GPLL_R_L

L:25mA
C327 0.01u/16V_4 C325 10u/10V_8

ICH PWROK
5 5,8,29 IMVP_PWRGD 25 ECPWROK 2

C404

0.022u/16V_4

R343 *10_4

R283 *33_4

PCI

CLKUSB_48

14M_ICH

C398 0.1u/10V_4

C340 0.1u/10V_4

C339 0.1u/10V_4

C330 0.1u/10V_4

VCCRTC

S:6uA
+3V_S5 C357 0.1u/10V_4 C385 0.1u/10V_4 C399 0.1u/10V_4
B

U27 4 ICH_PWROK R350 10K_4

C401 *10p/50V_4

C334 *10p/50V_4 +3V

1 3 TC7SH08FU +5V +3V

C348 0.1u/10V_4

+1.5V
B

L27

80mils

+1.5V_PCIE_ICH

S:270mA B27 C393 GPLL_R_L AG28 0.1u/10V_4 S:50mA
C400 0.1u/10V_4 AB7 AC6 AC7 AD6 AE6 AF5 AF6 AG5 AH5 AD2 AH11 AB10 AB9 AC10 AD10 AE10 AF10 AF9 AG9 AH9 E3 C1

+1.5V_PCIE_ICH

S:770mA

L:1500mA

BLM18PG181SN1D_6 + C345 220u/2.5V_7343 C389 C369 C349 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4

CLK GEN & PWR
29 VR_PWRGD_CK410# 2

VR PWRGD
Q27 2N7002E 3 R304 100K_4 +3V VR_PWRGD_CK410 3

R331 100/F_4

D23 CH500H-40 15/15mils V5REF

+1.5V

S:640mA

+3V_S5 +3V_S5

ARX

C337 1u/10V_6 +1.5V

S:45mA
2 1 2N7002E R80 10K_4 C377 0.1u/10V_4 C382 0.1u/10V_4 CR_CPPE#SDR 3 Q7 +1.5V

1

C386 1u/10V_6

C387 0.1u/10V_4

Rev. : B
EC_SCI# R284 10K_4 *8.2K_4 2.2K_4 2.2K_4 1K_4 10K_4 10K_4 10K_4 10K_4 10K_4 10K_4 10K_4 10K_4 10K_4 8.2K_4 8.2K_4 *10K_4 *10K_4 10K_4 R_LID# R302 PCLK_SMB R349 PDAT_SMB R347 SB_WAKE# R326 RI# R87 CL_CLK1 R86 SMLINK0 R88 SMLINK1 R91 KBSMI# R106 SMB_ALERT# R99 DNBSWON# R342 PM_SYSRST# R103 PM_BATLOW#_R R338 CLKRUN# SERIRQ R7 R9

+3V_S5 C332 +5V_S5 +3V_S5

S:50mA
+3V

USB

CR_CPPE#SD 26

M/B ID Select
+3V

+1.5V 0.1u/10V_4 C331 0.1u/10V_4

R35 100K_4 R112 *100K_4 R17 *100K_4 +3V R18 *1K_4 R44 *1K_4 MB_ID0 MB_ID1 MB_ID2 R113 *1K_4

+3V +3V_S5

R333 R323

*0_4 0_4 3VS5_ICH_SUS3

R115 10/F_6

D4 CH500H-40 15/15mils V5REF_SUS

C359 C335 C388 C391 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4

+3V_S5

ATX

C329 1u/10V_6 +1.5V 3VS5_ICH_SUS3

A

C383 0.1u/10V_4

C407 1u/10V_6

C406 0.1u/10V_4 C395

S:10mA

0.1u/10V_4

T2 TPVCCSUSLAN1 AA2 T49 TPVCCSUSLAN2 Y7

USB CORE

RBAYID0 R325 RBAYID1 R327 EC_RSMRST# R293

Rev. B - 010
RST_HDD# R43 *0_4 R46 33_4 IDERST# 22

VccSus1_05[2] VccSus1_05[3] VccSus1_05/VccLAN1_05[1] VccSus1_05/VccLAN1_05[2] Vcc1_5_A[26] Vcc1_5_A[27] Vcc1_5_A[28] Vcc1_5_A[29] Vcc1_5_A[30] ICH7-M

C28 TP_ICHVCCSUS2 G20 TP_ICHVCCSUS3 A1 H6 H7 J6 J7 +1.5V

CR_CPPE#R 3 Q8

2 1 2N7002E

30mils

R81 10K_4

CR_CPPE# 24

A

PROJECT : ZG5 Quanta Computer Inc.
Size Date: Document Number Rev 1B Sheet
1

C328 0.1u/10V_4

8,12,21,23,24,25,26 PLTRST#
5

ICH7-M (POWER & GND)
Thursday, June 05, 2008 13 of 34
3 2

4

1

2

3

4

5

6

7

8

7,15,16 DQMA[7:0] 7,15,16 MDA[63:0] 7 MAB[13:0] MDA4 MDA5 7,15 7,15 DQSA0DQSA0+ DQSA0DQSA0+ MDA3 MDA7
A

+1.8VSUS CN15 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199
2

DDR_VREF VSS46 DQ4 DQ5 VSS15 DM0 VSS5 DQ6 DQ7 VSS16 DQ12 DQ13 VSS17 DM1 VSS53 CK0 CK0# VSS41 DQ14 DQ15 VSS54 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

+1.8VSUS MDA6 MDA0 DQMA0 MDA2 MDA1 MDA17 MDA21 DQMA2

Close to DIMM
+1.8VSUS

MDA16 MDA20 7,15 7,15 DQSA2DQSA2+ DQSA2DQSA2+ MDA22 MDA19

MDA27 MDA26 7,15 7,15 DQSA3DQSA3+ DQSA3DQSA3+ MDA31 MDA30 MDA14 MDA11 DQMA1
B

MDA9 MDA13 8 CKEA2 BSB2 MAB12 MAB9 MAB8 MAB5 MAB3 MAB1 MAB10 BSB0 SWEB# SCASB# 8 8 CSA#3 ODTA3 MDA37 MDA36 7,16 7,16 DQSA4DQSA4+ DQSA4DQSA4+ MDA39 MDA38 MDA52 MDA53 DQMA6 MDA51 MDA50 MDA40 MDA42

C

7,16 7,16

DQSA5DQSA5+

DQSA5DQSA5+ MDA43 MDA47

D

MDA62 MDA60 DQMA7 MDA59 MDA58 3,16,23 3,16,23 SMBDT1 SMBCK1 +3V
1

SMBDT1 SMBCK1

VSS18 DQ16 DQ17 VSS1 DQS#2 DQS2 VSS19 DQ18 DQ19 VSS22 DQ24 DQ25 VSS23 DM3 NC4 VSS9 DQ26 DQ27 VSS4 CKE0 VDD7 NC1 A16_BA2 VDD9 A12 A9 A8 VDD5 A5 A3 A1 VDD10 A10/AP BA0 WE# VDD2 CAS# S1# VDD3 ODT1 VSS11 DQ32 DQ33 VSS26 DQS#4 DQS4 VSS2 DQ34 DQ35 VSS27 DQ40 DQ41 VSS29 DM5 VSS51 DQ42 DQ43 VSS40 DQ48 DQ49 VSS52 NCTEST VSS30 DQS#6 DQS6 VSS31 DQ50 DQ51 VSS33 DQ56 DQ57 VSS3 DM7 VSS34 DQ58 DQ59 VSS14 SDA SCL VDD(SPD)

PC4800 DDR2 SDRAM SO-DIMM (200P)

VREF VSS47 DQ0 DQ1 VSS37 DQS#0 DQS0 VSS48 DQ2 DQ3 VSS38 DQ8 DQ9 VSS49 DQS#1 DQS1 VSS39 DQ10 DQ11 VSS50

Rev. B Change CN15 P/N to DGMK0002113 (Standard type)
DDR_VREF

C435

C418

C424

C420

C436

C437 2.2u/6.3V_6

2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 +1.8VSUS C173 MCLKOA3+ 8 MCLKOA3- 8 0.1u/10V_4 C169 2.2u/6.3V_6 C422 C423 C433 C421 C434 C188

+3V

A

C187 0.1u/10V_4

MDA23 MDA18

0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4

2.2u/6.3V_6

VSS20 DQ20 DQ21 VSS6 NC3 DM2 VSS21 DQ22 DQ23 VSS24 DQ28 DQ29 VSS25 DQS#3 DQS3 VSS10 DQ30 DQ31 VSS8 CKE1 VDD8 A15 A14 VDD11 A11 A7 A6 VDD4 A4 A2 A0 VDD12 BA1 RAS# S0# VDD1 ODT0 A13 VDD6 NC2 VSS12 DQ36 DQ37 VSS28 DM4 VSS42 DQ38 DQ39 VSS55 DQ44 DQ45 VSS43 DQS#5 DQS5 VSS56 DQ46 DQ47 VSS44 DQ52 DQ53 VSS57 CK1 CK1# VSS45 DM6 VSS32 DQ54 DQ55 VSS35 DQ60 DQ61 VSS7 DQS#7 DQS7 VSS36 DQ62 DQ63 VSS13 SA0 SA1

MDA25 MDA29 PM_EXTTS#0 DQMA3 MDA28 MDA24 MDA15 MDA10 DQSA1DQSA1+ MDA8 MDA12 CKEA3 8 DQSA1DQSA1+ 7,15 7,15 7 7 8 7 8,15,16 7,15,16 7,15,16 7,15,16 7,15,16 7,15,16 7,15,16 8,15,16 7,15,16 7,15,16 7,15,16 7,15,16 7,15,16 7,15,16 7,15,16 7,15,16 MAB0 BSB1 ODTA2 MAB13 ODTA0 BAA0 MAA9 MAA11 MAA2 MAA12 BAA1 CSA#0 MAA5 MAA3 SWEA# MAA4 MAA7 MAA8 MAA6 MAA10 RN33 MAB0 7 BSB1 5 ODTA2 3 MAB13 1 RN45 ODTA0 7 BAA0 5 MAA9 3 MAA11 1 RN46 MAA2 7 MAA12 5 BAA1 3 CSA#0 1 RN47 MAA5 7 MAA3 5 SWEA# 3 MAA4 1 RN50 MAA7 7 MAA8 5 MAA6 3 MAA10 1 RN48 MAA0 7 SCASA# 5 SRASA# 3 CKEA0 1 RN7 3 CSA#2 1 MAA1 BAA2 RN49 3 1 PM_EXTTS#0 8

Termination resistor
VTERM 56X4_4 8 6 4 2 56X4_4 8 6 4 2 56X4_4 8 6 4 2 56X4_4 8 6 4 2 56X4_4 8 6 4 2 56X4_4 8 6 4 2 56X2_4 4 2 56X2_4 4 2 56X2_4 4 2 56X2_4 4 2 56_4 56_4 56_4 56_4
D

VTERM RN4 7 5 3 1 56X4_4 8 6 4 2 56X4_4 8 6 4 2 56X4_4 8 6 4 2 56X4_4 8 6 4 2 56X4_4 8 6 4 2
B

7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7

MAB2 MAB5 MAB10 MAB1 MAB3 MAB11 MAB7 MAB4 MAB6 BSB0 SCASB# SWEB# SRASB# MAB9 MAB8 MAB12 BSB2

MAB2 RN3 MAB5 MAB10 MAB1 MAB3 MAB11 MAB7 MAB4 MAB6 BSB0 SCASB# SWEB# SRASB# MAB9 MAB8 MAB12 BSB2

MAB11 MAB7 MAB6 MAB4 MAB2 MAB0 BSB1 SRASB# CSA#2 ODTA2 MAB13

CSA#2 ODTA2

8 8

MDA32 MDA33 DQMA4 MDA34 MDA35 MDA49 MDA48 DQSA6DQSA6+ MDA54 MDA55 MDA45 MDA41 MCLKOA2+ 8 MCLKOA2- 8 DQMA5 MDA44 MDA46 MDA61 MDA63 DQSA7DQSA7+ MDA56 MDA57 R151 R156
3

7 5 3 1 RN32 7 5 3 1 RN5 7 5 3 1 RN2 7 5 3 1

7,15,16 MAA0 7,15,16 SCASA# 7,15,16 SRASA# 8,15,16 CKEA0 8 7,15,16 7,15,16 8 8 8 8 8 8 8 7 CSA#2 MAA1 BAA2 ODTA3 CSA#3 CKEA3 CKEA2 CKEA1 CSA#1 ODTA1 MAA13

C

VTERM 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 C462 C178 C460 C458 C459 C461 C518 C514 C490 C479 C508 C503 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4

VTERM C186 C179 C181 C197 C176 C177 C182 C180 C196 C183 C198 C463

DQSA6DQSA6+

7,16 7,16

RN6 ODTA3 3 CSA#3 1 RN1 CKEA3 3 CKEA2 1 R166 R170 R178 R184

SMbus address A1
DQSA7DQSA7+ 7,16 7,16

rev. D Add in R166 , R170 , R178 , R184

CLOCK 1,2
CKE 2,3

Quanta Computer Inc.
PROJECT : ZG5
Size Date: Document Number

10K_4 10K_4

+3V

Standard Type H: 5.2mm
4 5 6

DDR2 SO-DIMM(200P)
Thursday, June 05, 2008
7

Rev 1A of
8

TYCO_1775803-2

Sheet

14

34

5

4

3

2

1

8 8 7,14 7,14 7,14 7,14 7,14 7,14 7,14 7,14 7,14 7,14 7,14 7,14 7,14

MCLKOA0+ MCLKOA0DQSA0+ DQSA0DQSA1+ DQSA1DQSA2DQSA2+ DQSA3DQSA3+ DQMA0 DQMA1 DQMA2 DQMA3 MDA[31:0]

D

MCLKOA0+ MCLKOA0RN31 DQSA0+ 3 DQSA01 RN10 DQSA1+ 1 DQSA13 RN30 DQSA23 DQSA2+ 1 RN11 DQSA33 DQSA3+ 1 DQMA0 DQMA1 DQMA2 DQMA3 R159 R155 R148 R154

+1.8VSUS 22u/6.3V_8 22u/6.3V_8 10X2_4 DQSAR0+ 4 DQSAR02 10X2_4 DQSAR1+ 2 DQSAR14 10X2_4 DQSAR24 DQSAR2+ 2 10X2_4 DQSAR34 DQSAR3+ 2 C474 0.01u/16V_4 C444 C486 C485 C497

+1.8VSUS C498 0.01u/16V_4 C456 C473 C489 C495

0.01u/16V_4 0.01u/16V_4 0.01u/16V_4 +1.8VSUS

0.01u/16V_4 0.01u/16V_4 0.01u/16V_4
D

+1.8VSUS

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1

A2 E2 R3 R7 R8

10_4 10_4 10_4 10_4

DQMAR0 DQMAR1 DQMAR2 DQMAR3 MAAR0 MAAR1 MAAR2 MAAR3 MAAR4 MAAR5 MAAR6 MAAR7 MAAR8 MAAR9 MAAR10 MAAR11 MAAR12 BAAR0 BAAR1 BAAR2 CKEAR0 ODTAR0 SWEAR# SRASAR# SCASAR# CSAR#0 MCLKOA0+ MCLKOA0DDR_VREF DDR_VREF

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

VDDL

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

C

MDA4 MDA5 MDA0 MDA6 MDA2 MDA1 MDA7 MDA3 MDA14 MDA10 MDA15 MDA11 MDA12 MDA9 MDA8 MDA13 MDA20 MDA16 MDA21 MDA17 MDA22 MDA23 MDA18 MDA19 MDA27 MDA26 MDA29 MDA25 MDA31 MDA30 MDA24 MDA28 ODTA0 CSA#0 BAA0 SRASA# BAA1 MAA10 MAA12 MAA9 CKEA0

7 5 3 1 7 5 3 1 7 5 3 1 7 5 3 1 7 5 3 1 7 5 3 1 7 5 3 1 7 5 3 1

8 6 4 2 8 6 4 2 8 6 4 2 8 6 4 2 8 6 4 2 8 6 4 2 8 6 4 2 8 6 4 2

RN16 10X4_4 RN17 10X4_4 RN13 10X4_4 RN14 10X4_4 RN18 10X4_4 RN19 10X4_4 RN20 10X4_4 RN12 10X4_4

MDAR4 MDAR5 MDAR0 MDAR6 MDAR2 MDAR1 MDAR7 MDAR3 MDAR14 MDAR10 MDAR15 MDAR11 MDAR12 MDAR9 MDAR8 MDAR13 MDAR20 MDAR16 MDAR21 MDAR17 MDAR22 MDAR23 MDAR18 MDAR19 MDAR27 MDAR26 MDAR29 MDAR25 MDAR31 MDAR30 MDAR24 MDAR28 ODTAR0 CSAR#0 BAAR0 SRASAR# BAAR1 MAAR10 MAAR12 MAAR9 CKEAR0

M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 L2 L3 L1 K2 K9 K3 K7 L7 L8 J8 K8 J2

NC_1 NC_2 NC_4 NC_5 NC_6

VDD VDD VDD VDD VDD

VDDL

J1

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12 BA0 BA1 BA2 CKE ODT WE RAS CAS CS CLK+ CLK-

D5

DQ0/LDQ0 DQ1/LDQ1 DQ2/LDQ2 DQ3/LDQ3 DQ4/LDQ4 DQ5/LDQ5 DQ6/LDQ6 DQ7/LDQ7 DQ8/UDQ0 DQ9/UDQ1 DQ10/UDQ2 DQ11/UDQ3 DQ12/UDQ4 DQ13/UDQ5 DQ14/UDQ6 DQ15/UDQ7

G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 F7 E8 B7 A8 F3 B3

MDAR23 MDAR20 MDAR22 MDAR17 MDAR16 MDAR19 MDAR21 MDAR18 MDAR30 MDAR25 MDAR28 MDAR29 MDAR26 MDAR24 MDAR27 MDAR31 DQSAR2+ DQSAR2DQSAR3+ DQSAR3DQMAR2 DQMAR3

MAAR0 MAAR1 MAAR2 MAAR3 MAAR4 MAAR5 MAAR6 MAAR7 MAAR8 MAAR9 MAAR10 MAAR11 MAAR12 BAAR0 BAAR1 BAAR2 CKEAR0 ODTAR0 SWEAR# SRASAR# SCASAR# CSAR#0 MCLKOA0+ MCLKOA0DDR_VREF

M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 L2 L3 L1 K2 K9 K3 K7 L7 L8 J8 K8 J2

MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12 BA0 BA1 BA2 CKE ODT WE RAS CAS CS CLK+ CLK-

NC_1 NC_2 NC_4 NC_5 NC_6

VDD VDD VDD VDD VDD

A2 E2 R3 R7 R8

D4

DQ0/LDQ0 DQ1/LDQ1 DQ2/LDQ2 DQ3/LDQ3 DQ4/LDQ4 DQ5/LDQ5 DQ6/LDQ6 DQ7/LDQ7 DQ8/UDQ0 DQ9/UDQ1 DQ10/UDQ2 DQ11/UDQ3 DQ12/UDQ4 DQ13/UDQ5 DQ14/UDQ6 DQ15/UDQ7

G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 F7 E8 B7 A8 F3 B3

MDAR9 MDAR10 MDAR8 MDAR11 MDAR14 MDAR13 MDAR15 MDAR12 MDAR6 MDAR2 MDAR5 MDAR3 MDAR1 MDAR4 MDAR7 MDAR0 DQSAR1+ DQSAR1DQSAR0+ DQSAR0DQMAR1 DQMAR0

C

DQS0/LDQS DQS0/LDQS DQS1/UDQS DQS1/UDQS DQM0/LDM DQM1/UDM

DQS0/LDQS DQS0/LDQS DQS1/UDQS DQS1/UDQS DQM0/LDM DQM1/UDM

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

F2 H8 H2 F8 E7 D8 D2 B8 B2 A7

P9 N1 J3 E3 A3

8,14,16
B

ODTA0 CSA#0 BAA0 SRASA# BAA1 MAA10 MAA12 MAA9 CKEA0

ODTAR0 CSAR#0 BAAR0 SRASAR# BAAR1 MAAR10 MAAR12 MAAR9 CKEAR0

8,14,16 8,14,16 7,14,16 7,14,16 7,14,16 7,14,16 7,14,16 7,14,16 8,14,16

U11 Hynix 1G

U12 Hynix 1G
B

8,14,16 7,14,16 7,14,16 7,14,16 7,14,16 7,14,16 7,14,16 8,14,16

+1.8VSUS

+1.8VSUS 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 C452 C477 C454 C512 C494 C465 C516 C464 C476 C511 C471 C483 C472 0.01u/16V_4 0.01u/16V_4 0.01u/16V_4 0.01u/16V_4 0.01u/16V_4 0.01u/16V_4 0.01u/16V_4 0.01u/16V_4 0.01u/16V_4 0.01u/16V_4 0.01u/16V_4 0.01u/16V_4 0.01u/16V_4

Layout Notes: placement between
MCLKOA0+

7,14,16 7,14,16 7,14,16 7,14,16 7,14,16 7,14,16 7,14,16 7,14,16 7,14,16 7,14,16 7,14,16 7,14,16 7,14,16

MAA0 MAA2 MAA4 MAA1 SWEA# SCASA# MAA3 MAA6 MAA8 MAA5 MAA11 MAA7 BAA2

MAA0 MAA2 MAA4 MAA1 SWEA# SCASA# MAA3 MAA6 MAA8 MAA5 MAA11 MAA7 BAA2

MAAR0 MAAR2 MAAR4 MAAR1 SWEAR# SCASAR# MAAR3 MAAR6 MAAR8 MAAR5 MAAR11 MAAR7 BAAR2

MAAR0 MAAR2 MAAR4 MAAR1 SWEAR# SCASAR# MAAR3 MAAR6 MAAR8 MAAR5 MAAR11 MAAR7 BAAR2

7,14,16 7,14,16 7,14,16 7,14,16 7,14,16 7,14,16 7,14,16 7,14,16 7,14,16 7,14,16 7,14,16 7,14,16 7,14,16

R373 200/F_4 MCLKOA0-

R374 200/F_4

A

C447 C515 C507 C466 C448 C467 C517 C469 C482 C449 C468 C493 C513 C446 C487 C509 C453 C488 C450

J7

C506 0.01u/16V_4

F2 H8 H2 F8 E7 D8 D2 B8 B2 A7

P9 N1 J3 E3 A3

J7

C501 0.1u/10V_4

C504 0.01u/16V_4

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VREF VSS VSS VSS VSS VSS

VSSDL

VREF VSS VSS VSS VSS VSS

VSSDL

A

Quanta Computer Inc.
PROJECT : ZG5
Size Date: Document Number

DDR2_MODULE_RANK1
Thursday, June 05, 2008 Sheet
1

Rev 1A of 34

15

5

4

3

2

5

4

3

2

1

+1.8VSUS

+1.8VSUS

D

7,14 7,14 7,14 7,14 7,14 7,14 7,14 7,14 7,14 7,14 7,14 7,14

DQSA4DQSA4+ DQSA5+ DQSA5DQSA6+ DQSA6DQSA7DQSA7+ DQMA4 DQMA5 DQMA6 DQMA7

RN9 DQSA4- 3 DQSA4+ 1 RN26 DQSA5+ 3 DQSA5- 1 RN23 DQSA6+ 1 DQSA6- 3 RN15 DQSA7- 3 DQSA7+ 1 DQMA4 R160 DQMA5 R161 DQMA6 R145 DQMA7 R147

VDD VDD VDD VDD VDD

VDDL

VDDL

NC_1 NC_2 NC_4 NC_5 NC_6

VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

10X2_4 DQSAR74 DQSAR7+ 2 10_4 10_4 10_4 10_4 DQMAR4 DQMAR5 DQMAR6 DQMAR7

C

7,14

MDA[63:32]

B

Layout Notes: placement between
MCLKOA1+

R375 200/F_4

R372 200/F_4

MCLKOA1-

RN34 MDA37 7 MDA36 5 MDA33 3 MDA32 1 RN21 MDA38 7 MDA39 5 MDA35 3 MDA34 1 RN25 MDA42 7 MDA41 5 MDA45 3 MDA40 1 RN27 MDA44 7 MDA46 5 MDA47 3 MDA43 1 RN24 MDA50 7 MDA51 5 MDA54 3 MDA55 1 RN22 MDA53 7 MDA52 5 MDA49 3 MDA48 1 RN28 MDA60 7 MDA61 5 MDA63 3 MDA62 1 RN29 MDA56 7 MDA57 5 MDA59 3 MDA58 1

10X4_4 MDAR37 8 MDAR36 6 MDAR33 4 MDAR32 2 10X4_4 MDAR38 8 MDAR39 6 MDAR35 4 MDAR34 2 10X4_4 MDAR42 8 MDAR41 6 MDAR45 4 MDAR40 2 10X4_4 MDAR44 8 MDAR46 6 MDAR47 4 MDAR43 2 10X4_4 MDAR50 8 MDAR51 6 MDAR54 4 MDAR55 2 10X4_4 MDAR53 8 MDAR52 6 MDAR49 4 MDAR48 2 10X4_4 MDAR60 8 MDAR61 6 MDAR63 4 MDAR62 2 10X4_4 MDAR56 8 MDAR57 6 MDAR59 4 MDAR58 2

MAAR0 MAAR1 MAAR2 MAAR3 MAAR4 MAAR5 MAAR6 MAAR7 MAAR8 MAAR9 MAAR10 MAAR11 MAAR12 BAAR0 BAAR1 BAAR2 CKEAR0 ODTAR0 SWEAR# SRASAR# SCASAR# CSAR#0 MCLKOA1+ MCLKOA1DDR_VREF

M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 L2 L3 L1 K2 K9 K3 K7 L7 L8 J8 K8 J2

7,14,15 MAAR[12:0] G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 F7 E8 B7 A8 F3 B3 MDAR59 MDAR60 MDAR57 MDAR62 MDAR61 MDAR56 MDAR63 MDAR58 MDAR50 MDAR48 MDAR54 MDAR53 MDAR52 MDAR55 MDAR49 MDAR51 DQSAR7+ DQSAR7DQSAR6+ DQSAR6DQMAR7 DQMAR6

MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12 BA0 BA1 BA2 CKE ODT WE RAS CAS CS CLK+ CLK-

D7

DQ0/LDQ0 DQ1/LDQ1 DQ2/LDQ2 DQ3/LDQ3 DQ4/LDQ4 DQ5/LDQ5 DQ6/LDQ6 DQ7/LDQ7 DQ8/UDQ0 DQ9/UDQ1 DQ10/UDQ2 DQ11/UDQ3 DQ12/UDQ4 DQ13/UDQ5 DQ14/UDQ6 DQ15/UDQ7

MAAR0 M8 MAAR1 M3 MAAR2 M7 MAAR3 N2 MAAR4 N8 MAAR5 N3 MAAR6 N7 MAAR7 P2 MAAR8 P8 MAAR9 P3 MAAR10 M2 MAAR11 P7 MAAR12 R2 BAAR0 BAAR1 BAAR2 CKEAR0 ODTAR0 SWEAR# SRASAR# SCASAR# CSAR#0 MCLKOA1+ MCLKOA1DDR_VREF L2 L3 L1 K2 K9 K3 K7 L7 L8 J8 K8 J2

MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12 BA0 BA1 BA2 CKE ODT WE RAS CAS CS CLK+ CLK-

VDDQ VDDQ VDDQ VDDQ V