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5 4 3 2 1
Revision History
D
Model : P71EN0 A
B
10/2004
1/2005
ORIGINAL RELEASE
REV.B RELEASE
D
Mobile Dothan with INTEL 915PM / ICH6-M Chipset
PG01 INDEX PG21 RAID IC VT6421
PG02 SYSTEM BLOCK DIAGRAM PG22 NEW CARD
PG03 POWER DIAGRAM & SEQUENCE PG23 MINI PCI(Wireless)
C
PG04 GPIO & POWER CONSUMPTION PG24 I/O PORT CON C
PG05 CPU Banias/Dothan-1/2 PG25 AUDIO POWER / FAN CTL
PG06 CPU Banias/Dothan-2/2 PG26 GIGA LAN RTL8110SBL
PG07 CLOCK GEN ICS954127 PG27 IEEE1394A TSB43AB22A
PG08 NB_Alviso Host-1/5 PG28 EC IT8510E / BIOS / TP CON
PG09 NB DDRCLK_VGA_PCIEXPR-2/5 PG29 VGA MXM CON
PG10 NB DDR_MEM SYSTEM-3/5 PG30 CPU_CORE
PG11 NB POWER-4/5 PG31 1.05V/1.5V/1.8V/2.5V/0.9V
PG12 NB VSS_NCTF-5/5 PG32 +3.3V/+5V/+12V
PG13 DDR2 CHANNELA,B PG33 VCC SW/+1.05VS/+1.5VS
PG14 DDR2 Terminate / Smart Power PG34 BATT IN / Charger
PG15 PWR S/W& LCD/INVERTOR/CRT/TV PG35 Appendix A. Ver. History
B B
PG16 AC IN
PG17 SB ICH-6M-1/3
PG18 SB ICH-6M-2/3
PG19 SB ICH-6M-3/3
PG20 HDD / CD-ROM
A A
P71EN0 P/N: 37-UJ0000-00B ; 82-UJ0001-00B UNIWILL COMPUTER CORP.
Title
P71EN0
Size Document Number Rev
INDEX B
2963
Date: Wednesday, February 16, 2005 Sheet 1 of 35
5 4 3 2 1
5 4 3 2 1
P71EN0 BLOCK DIAGRAM CPU
D Dothan D
Socket 478 THERMAL EC
ADM1032
HOST BUS
400/533MHZ DDR2 RAM BUS
North Bridge S-Video TV
INTEL PCIE
LVDS
SODIMM1 SODIMM0 915PM NV41-M LCD
+1.8VS TMDS&CRT
+1.8VS
+0.9V terminal
DVI
+0.9V terminal DMI
AZALIA IDE
C PCI BUS
South Bridge RTC C
AUDIO CODEC MDC INTEL
ALC880 ICH6-M SECONDARY CD-ROM
MASTER +5V
Amplifier
LM4991
RJ11 RAID
VT6421 PCIE
NEW CARD
WOOFER AMPLIFIER
SPK EARPHONE GIGA LAN
TPA6011A4 JACK(SPDIF) X 1
MICPHONE JACK X 1 RTL8110SBL USBX8
INTERNAL SPK MINI PCI CONN CRYSTAL
(Wireless) 25M HZ CARD READER
USB CONNx4
RJ45
B B
CRYSTAL SATA HDD X2
14.318MHz
IEEE-1394A 2.5"
TSB43AB22 PRIMARY
MASTER LPC BUS
Clock Gen CRYSTAL
CRYSTAL 32.768K
24.576M HZ
EC
K/B CONTROLLER PS/2 & GPIO
ITE8510
ICS PS/2 & GPIO REMOTE IR
ICS954127
A A
FLASH ROM INT K/B T/P FAN CHARGER BATTERY
UNIWILL COMPUTER CORP.
Title
P71EN0
Size Document Number Rev
B
2963 SYSTEM BLOCK DIAGRAM
Date: Wednesday, February 16, 2005 Sheet 2 of 35
5 4 3 2 1
5 4 3 2 1
POWER BLOCK DIAGRAM VIN +1.8VS
ISL6224
RSS090N03 RT9173B +0.9VS
D D
VID0
VID1 VIN
VID2 +1.8V
VID3 SC451 RSS090N03
VID4 SI4362 CPU_CORE AO4422
VID5
VIN +5VA
RSS090N03 AO4422 +5VS POWER Sequence
SI4835 +5V
+3VA,+5VA,+12VA
C SC1404 C
PWRSW
+12VA
. +3.3VS_ON
+5VS,+12VS
SI2301 +12VS
+3.3VS
. +1.5VS_ON
+1.5VS 1ms
VIN +3.3VA +3.3VS
. +1.05VS_ON
+2.5VS . +1.8V_DDR_ON
RSS090N03 AO4422 RT9173B 1ms
+1.8VS
+1.05VS 1ms
SI4835 +3.3V/