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Cover Sheet
Block Diagram
1
2
MS-6398E / VER:3.0
Clock ICS950218AF & ATA100 IDE CONNECTORS 3 INTEL (R) Brookdale-G Chipset
Willamette/Northwood 478pin mPGA-B Processor Schematics
mPGA478-B INTEL CPU Sockets 4-5
INTEL Brookdale-G GMCH -- North Bridge 6-8 CPU: Willamette/Northwood mPGA-478B Processor
INTEL ICH4 -- South Bridge 9-10 System Brookdale-E Chipset:
INTEL MCH 845E + INTEL ICH4
LPC I/O -- W83627HF 11
On Board Chipset:
AC'97 Codec / Audio Jack / Front Audio Connector 12
BIOS -- FWH
Audio Amplifier & CD Panel Play & W518D_SB 13
AC'97 Codec -- ALC201A/650
DDR DIMM1&2 and DDR Terminator Resistor 14-15 LPC Super I/O -- W83627HF
AGP Slot 16 LAN -- INTEL 82562EM/ET
PCI SLOT 1 & 2 & 3 & 4 & 5 17,27 Expansion Slots: AGP2.0 SLOT * 1
Floppy, KB/MS, Com/Printer Ports 18 PCI2.2 SLOT * 5
USB Connectors 19 ISA SLOT * 1
CNR SLOT * 1
Front Panel , ATX Connectors 20
FWH & CNR Riser 21
BOM Option :
MS6398E-V3_OPT : I+L -> Legend BOM => Note : I + L -> 6398E-05S ( ES ) -> 6398E-040 (MP BOM)
VRM 9.0 Regulator (CPU Power) 22
SMBUS Isolation & FAN & AGP 1.5V 23
LAN -- INTEL 82562EM/ET 24
Note : Default : P4+DDR*2+PCI*5+CNR*1+S/W Audio ADI1981
W83302D(MS5) ACPI Controller 25 I => Support ISA
L => Support Intel LAN 82562ET
VGA Connector 26
PCI_ISA Bridge 28-29
Manual Part 30
0. Gerber-Out MS6398E-300_04-03-91.dsn (To layout ) 04/03/2002
1. Release BOM MS6398E-300_04-09-91.dsn (Release BOM 1'st time ) 04/09/2002
Micro Star Restricted Secret
2. ECR BOM MS6398E-300_04-24-91.dsn (Release BOM 2'nd time ) 04/24/2002 Title Rev
COVER SHEET
3. ECR BOM MS6398E-300_04-29-91.dsn (Release BOM 3'rd time ) 04/29/2002
Document Number 300
4. ECR BOM MS6398E-300_05-23-91.dsn (Release ES-BOM 6398E-05S to MP-BOM 6398E-040 ) 05/23/2002 MS-6398E
5. ECR BOM MS6398E-300_07-02-91.dsn (Release ECR for 6398E-040) 07/02/2002 MICRO-STAR INT'L CO.,LTD. Last Revision Date:
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 1 of 30
(100/133MHz)
VCC12 Power VRM 9.2 Willamette/Northwood Clock
Supply CONN Socket (mPGA478-B) (100/133MHz) Generator
Scalable Bus
AGP 4X (1.5V) 4X (66MHz) AGP
VGA CONN
MCH 845E
Controller HUB (200/266 MHz)
DDR DIMM1,2
HUB Interface
(14.318MHz)
IDE CONN 1&2 ATA33/ATA66/ATA100
ICH4: I/O PCI (33MHz)
PCI Slots 1:5
USB Port 0:1 (48MHz) Controller HUB
PCI (33MHz)
USB Front Panel
LAN Controller
(33MHz)
(33MHz)
USB Port 2:3
USB Front Panel PCI_ISA
LPC Bus Bridge
AC Link AC '97 Audio
Winbond Codec
W518D_SB ISA SLOT
USB Port 4:5
USB Rear Panel MIC In
Winbond FWH: Firmware HUB CNR
Line In
LPC I/O
W83627HF Brookdale -G Chipset Line Out
CD-ROM (Option)
PS2 Mouse & Parallel (1) Floppy Disk
Hardware Keyboard Serial (2) Drive
Monitor
Model option table
Model type Function BOM Config ERP BOM No.
MS6398E/V3.0 For Legend L+I 6398E-05S
Micro Star Restricted Secret
Title Rev
BLOCK DIAGRAM
Document Number 300
MS-6398E
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
Wednesday, July 03, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 2 of 30
CLOCK GENERATOR BLOCK *Trace < 0.5"
Pull-Down Capacitors
Shut Source Termination Resistors
FB16 CB181 CPUCLK C156 X
0_0805 0.1u U12 CPUCLK R259 49.9RST CPUCLK# C157 X
VCC3V 39 41 CPU0 R265 27.4RST CPUCLK CPUCLK# R260 49.9RST MCHCLK C159 X
VCC3 CPU_VDD CPUCLK0 CPUCLK 4
40 CPU0# R266 27.4RST CPUCLK# MCHCLK R257 49.9RST MCHCLK# C158 X
CPUCLK0# CPUCLK# 4
CB177 CB180 CB201 MCHCLK# R261 49.9RST
0.1u 1u_0805 0.1u 36 38 CPU1 R267 27.4RST MCHCLK CN11 10p
CPU_GND CPUCLK1 MCHCLK 6
37 CPU1# R268 27.4RST MCHCLK# 2 1
CPUCLK1# MCHCLK# 6
AGPCLK 4 3
filtering from 10K~1M 46 ICH_66 6 5
MREF_VDD MCH_66
* Put GND copper under Clock Gen. CB202 CPUCLK2 45 Trace less 0.2" 8 7
CPUCLK2# 44
connect to every GND pin 0.1u 43 RN56 20 49.9ohm for 50ohm M/B impedance
MREF_GND PCICLK0 C182 10p
* 40 mils Trace on Layer 4 RMCH_66
1 2
MCH_66 PCICLK1 C186 10p
32 3V66_VDD 3V66_0 31 3 4 MCH_66 7
with GND copper around 30 RICH_66 5 6 ICH_66 PCICLK2 C187 10p
* put close to every power pin CB179 3V66_1
28 RAGPCLK 7 8 AGPCLK
ICH_66 10 CLOCK STRAPPING RESISTORS
it 0.1u 3V66_2 SEL48_2 R270 33
AGPCLK 16
PCICLK6 C193 10p
29 3V66_GND 3V66_48/SEL66_48# 27 SIO_48 11
* Trace Width 7mils. PCICLK4 C191 10p
6 FS2 R297 20 PCICLK0 R293 8.2K VCC3V PCICLK5 C192 10p
FS2/PCI_F0 PCICLK0 17
* Same Group spacing 15mils 9 7 FS3 R321 20 PCICLK4
PCI_VDD FS3/PCI_F1 PCICLK4 27
8 SEL48_1 R322 20 PCICLK5 CN12 10p
SEL48_24#/PCI_F2 PCICLK5 28
* Different Group spacing 30mils CB178 PCICLK3 2 1
0.1u 5 10 FS4 R323 20 PCICLK6 FS1 R294 8.2K SIO_PCLK 4 3
PCI_GND FS4/PCI0 PCICLK6 13 BSEL0 4
* Differentical mode spacing 7mils on itself 11 RPCICLK1 R300 20 PCICLK1 FWH_PCLK 6 5
PCI1 PCICLK1 17
18 12 RPCICLK2 R301 20 PCICLK2 ICH_PCLK 8 7
PCI_VDD PCI2 PCICLK2 17
14 RLAN_PCLK 7 8 PCICLK3 VCC_AGP
PCI3 PCICLK3 27
CB188 15 RSIO_PCLK 5 6 SIO_PCLK
PCI4 SIO_PCLK 11
FB17 0.1u 13 16 RFWH_PCLK 3 4 FWH_PCLK MS_48 C266 X
PCI_GND PCI5 FWH_PCLK 21
0_0805 17 RICH_PCLK 1 2 ICH_PCLK SIO_48 C160 10p_0603
PCI6 ICH_PCLK 9
R171 ICH_48 C183 10p_0603
VCC3
VDDA3V 24 RN62 20 3.9K
CB187 CB191 C165 48_VDD FS0 R303 27 ICH_48
FS0/48MHz 22 ICH_48 10
0.1u 1u_0805 0.1u 23 FS1 R169 R168 DOT_CLK C184 X
FS1/24_48MHz R334 X_33 MS_48 ICH_14 C155 X
21 48_GND MS_48 13 7,16 ST1 8.2K
for good filtering from 10K~1M 2 2K 3
C181 REF_VDD REF_14 R271 33 ICH_14 OSC C188 X
MUL0/REF0 48 ICH_14 10 2
0.1u 1 R299 33 OSC 1
MUL1/REF1 OSC 29
47 Q22 used only for EMI issue
REF_GND 14M-32pf-HC49S-D NPN-3904-SOT23 R167
34 3 X1 C179 22p_0603 Trace less 0.2"
C177 CORE_VDD X1 X_2.2K
Q29 0.1u X1 SMBCLK_ISO R278 4.7K
NPN-3904-SOT23 X2 32pFC172 22p_0603 SMBDATA_ISO R277 4.7K VCC3
33 CORE_GND X2 4
R336 1K
C
VCC3
26 35 R269 475RST Iref = 2.32mA RN65
11,14,21,23,25 SMBCLK_ISO SCLK IREF
R320 B 25 8.2K
VCCP 11,14,21,23,25 SMBDATA_ISO SDATA
220 20 R333 22 FS4 1 2 VCC3V
RESET# FP_RST# 10,25
19 42 FS4 FS3 FS2 FS1 FS0 CPU (MHz) SEL48_1 3 4
VTT_GD# PWR_DN#
E
R311 X FS3 5 6
C
VCC3
R335 ICS-ICS950218-SSOP48 1 1 1 0 1 100 MHz FS2 7 8
R312 B PWR_DN# R264 33
4 SKTOCC# VCC3V
Q28 X 1 1 1 1 1 133 MHz FS0 R302 10K
X X
E
SEL48_2 R263 10K
REF_14 R258 10K
MULTSEL0=0 -> 6X Iref
MULTSEL0=1 -> 7X Iref
PRIMARY IDE BLOCK SECONDARY IDE BLOCK
ATA100 IDE CONNECTORS
IDE1 IDE2
D2x20-1:21-BL-ZBT D2x20-1:21-WH-SBT
HD_RST#1 R210 33HD_RST#1R 1 2 HD_RST#2 R208 33 HD_RST#2R 1 2
PDD7 3 4 PDD8 SDD7 3 4 SDD8
10 PDD[0..7] PDD[8..15] 10 10 SDD[0..7] SDD[8..15] 10
PDD6 5 6 PDD9 SDD6 5 6 SDD9
PDD5 7 8 PDD10 SDD5 7 8 SDD10
PDD4 9 10 PDD11 SDD4 9 10 SDD11
PDD3 11 12 PDD12 SDD3 11 12 SDD12
PDD2 13 14 PDD13 SDD2 13 14 SDD13
PDD1 15 16 PDD14 * Trace Width : 5mils SDD1 15 16 SDD14
PDD0 17 18 PDD15 SDD0 17 18 SDD15
19 * Trace Spacing : 7mils 19
10 PD_DREQ 21 22 10 SD_DREQ 21 22
10 PD_IOW# 23 24 * Length(longest)-Length(shortest)<0.5" 10 SD_IOW# 23 24
10 PD_IOR# 25 26 10 SD_IOR# 25 26
10 PD_IORDY 27 28 * Trace Length less than 6" 10 SD_IORDY 27 28
10 PD_DACK# 29 30 10 SD_DACK# 29 30
9 IRQ14 31 32 9 IRQ15 31 32
10 PD_A1 33 34 PD_DET 21 10 SD_A1 33 34 SD_DET 21
10 PD_A0 35 36 PD_A2 10 10 SD_A0 35 36 SD_A2 10
10 PD_CS#1 37 38 PD_CS#3 10 10 SD_CS#1 37 38 SD_CS#3 10
20 PD_LED 39 40 20 SD_LED 39 40
R141 R140
R132 C77 R154 C72 R128 C78 R153 C71
4.7K 220p 10K X 15K 4.7K 220p 10K X 15K
VCC5 VCC3 VCC5 VCC3
R57 10K RST_GATE R61 2 120KST
Micro Star Restricted Secret
+12V 1 Title Rev
Clock & IDE Conn.
G
G
Q13 NDS7002A-S-SOT23 Q11 NDS7002A-S-SOT23 Document Number 300
HD_RST# HD_RST#1 HD_RST#2 R68 0 HD_RST#1
MS-6398E
25 HD_RST# S D S D
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
Wednesday, July 03, 2002
R62 0
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 3 of 30
CPU SIGNAL BLOCK CPU GTL REFERNCE VOLTAGE BLOCK
6 HA#[3..31]
VID[0..4] 11,22
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
VCCP
VID2
VID1
VID0
VID4
VID3
AD26
AC26
AE25
R100
AB1
AE1
AE2
AE3
AE4
AE5
W2
W1
M1
M4
M3
M6
U4
R6
U3
U1
R3
R2
N5
N4
N2
N1
2/3*Vccp 49.9RST
Y1
V3
V2
P6
P4
P3
K1
K4
K2
A5
A4
T5
T4
T2
T1
L2
L3
L6
CPU1A GTLREF1
VCC_SENSE
VSS_SENSE
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
A16#
A15#
A14#
A13#
A12#
A11#
A10#
A9#
A8#
A7#
A6#
A5#
A4#
A3#
DBR#
ITP_CLK1
ITP_CLK0
VID4#
VID3#
VID2#
VID1#
VID0#
C53 C55 R99
HINV#0 E21 220p 1u_0805 100RST
6 HINV#[0..3] HINV#1 DBI0# GTLREF1
G25 DBI1# GTLREF3 AA21
HINV#2 P26 AA6
HINV#3 DBI2# GTLREF2
V21 DBI3# GTLREF1 F20
GTLREF0 F6
AC3 IERR#
V6 AB4 BPM#5
MCERR# BPM5# BPM#4
9 FERR# B6 FERR# BPM4# AA5
Y4 Y6 BPM#3
9 STPCLK# STPCLK# BPM3# BPM#2
AA3 BINIT#