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8 7 6 5 4 3 2 1
Cover Sheet 1
Block Diagram 2
D
Power Flow & Clock Flow Charts 3 D
mPGA478-B INTEL CPU Socket 4-5
MS-6576 Ver : 0A ATI RS200 North Bridge
DDR Slots
6-9
10
ATI RS200 + SB200 CHIPSET
Willamette/Northwood 478pin mPGA-B Processor Schematics DDR Termination & VGA Connector 11
AGP Slot 12
ATI SB200 South Bridge 13 - 15
CPU:
PCI Slots 16
C Willamette/Northwood mPGA-478B Processor C
LAN Controller 17
RJ45 Connector & P/S 2 Connector 18
System Chipset:
ATI RS200 (North Bridge) + SB200 (South Bridge) IDE Connectors 19
USB Connectors 20
On Board Chipset: AC'97 CODEC 21
LPC Super I/O -- W83697HF Audio Connectors 22
Realtek Lan -- RTL8101L
CNR Conn. & Fan Conn. & Flash ROM 23
B
Expansion Slots: LPC Super I/O (W83627HF) 24 B
AGP2.0 SLOT * 1 Printer Port & Serial Ports 25
DDR DIMM * 2
VRM 9.X 26
PCI SLOT * 3
CNR SLOT * 1 ACPI Controller & Power Regulators 27
ATX Power Connector 28
Front Panels 29
Decoupling Capacitors 30
History 31
A A
MICRO-STAR INT'L CO.,LTD.
Title
COVER PAGE
Size Document Number Rev
0A
Date: Thursday, March 28, 2002 Sheet 1 of 30
8 7 6 5 4 3 2 1
5 4 3 2 1
D D
System Block Diagram SOCKET-478
Host Bus
VGA Signal
VGA Connector DDR SDRAM
Rtt
TV-out Connector
TV Signal ATI RS200
In-die VGA DIMM 1 DIMM 2
AGP Bus
AGP Slot
C C
A-Link Analog In
AC'97
Audio Codec
Analog Out
Lan PCI SLOT 3 PCI SLOT 2 PCI SLOT 1
CNR Slot
ATI SB200
Clock Gen.
IDE 1 IDE 2
USB 0 USB 2 USB 4
B LPC Bus B
Flash Rom USB 1 USB 3 USB 5
VOLTAGE MONITOR
KEYBOARD PS/2
/MOUSE
LPC Super I/O TEMPERATURE MONITOR
FAN FAN FAN CONTROL
1 2
GPIOs IR/CIR GAME/MIDI SERIAL PARALLEL FLOPPY
A A
MICRO-STAR INT'L CO.,LTD.
Title
System Block Diagram
Size Document Number Rev
0A
Date: Thursday, March 28, 2002 Sheet 2 of 30
5 4 3 2 1
5 4 3 2 1
Power Flow
VCC5
RS200 SB200
VDD_5V 5V_VREF
D
Clock Flow D
12V VCPU
VRM VCPU VREF_CPU
S0 -- S1
5V VDD_5V x 1
VCC3 3.3V VPCI x 6
VPCI, VDD_3.3V, +3.3V VDDQ
VDD_3.3V x 2
VCCAGP +3.3V x 1 CPU
MS-5 VDD_AGP 3.3V/1.5V VDD_AGP x 6
2.5V A2VDD x 1 CPUCLK0+/-
1.8V VDD_CORE x 39
VCC25 PLLVDD x 2
OP + MOS VDD_CORE
A2VDDQ x 1
AVDD x 1
A2VDD
FB A2VDD 1.2V/1.7V VCPU x 1 DDRCLK[5:0]+/-
AGP AGPCLK
S0 -- S3 Slot DIMM
AVDDCK
C FB AVDD_CK 2.5V VDRM x 17 RS200 C
VCC18
OP + MOS VDD_CORE SB200
14.318MHx
S0 -- S1
PCICLKSB
USBCLK
SBOSCCLK
PLVDD
FB PLLVDD 5V 5V_VREF x 1
3.3V VDDQ x 28
2.5V VDD_CORE x 16
AVDD AVDD_CK x 1
FB A2VDDQ, AVDD
1.2V/1.7V VREF_CPU x 1
VCC3SBY S0 -- S3 PCI PCICLK4
MS-5 S5_3.3V
3.3V STB_3.3V x 7 Slot PCICLK[3:0] S I/O
VCC5SBY VCC25SBY 2.5V STB_2.5V x 5 SB200 SIO48CLK
R devide S5_2.5V
B B
S0 -- S3/S5
VCCM 3.3V AVDDTX x 3
MS-5 VDRM STB_2.5V AVDDRX x 3
AVDDC x 1 FLASH
VCC25USB 2.5V VDD_USB x 3
FB VDD_USB 32.768KHx
PCICLK5
VCC3S3
S0 -- S5
On/Off STB_3.3V 3.3V S5_3.3V x 1
2.5V S5_2.5V x 1
AVDDUSB
FB AVDDTX, AVDDRX
VCC3 VTTDDR
MS-5
AVDDC3
FB AVDDC
VCC_VID
A MS-5 A
VCC5 MICRO-STAR INT'L CO.,LTD.
V5DUAL
MS-5
Title
Power Flow & Clock Flow Charts
VCC5SBY
Size Document Number Rev
0A
Date: Thursday, March 28, 2002 Sheet 3 of 30
5 4 3 2 1
8 7 6 5 4 3 2 1
CPU GTL REFERNCE VOLTAGE BLOCK
6 HA#[31:3]
VCPU
VID[4:0] 24,26
Length < 1.5inch.
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
R362
VID2
VID1
VID0
VID4
VID3
2/3*Vccp 49.9
GTLREF1
AD26
AC26
AE25
AB1
AE1
AE2
AE3
AE4
AE5
W2
W1
M1
M4
M3
M6
U4
R6
U3
U1
R3
R2
N5
N4
N2
N1
C385 C386 C387 R364
V3
V2
P6
P4
P3
K1
K4
K2
Y1
A5
A4
T5
T4
T2
T1
L2
L3
L6
D CPU1A 220p 220p 1u 100 D
A9#
A8#
A7#
A6#
A5#
A4#
A3#
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
A16#
A15#
A14#
A13#
A12#
A11#
A10#
ITP_CLK1
ITP_CLK0
VID4#
VID3#
VID2#
VID1#
VID0#
DBR#
VCC_SENSE
VSS_SENSE
HDBI#0 E21
6 HDBI#[3:0] DBI0#
HDBI#1 G25 AA21 GTLREF1
HDBI#2 DBI1# GTLREF3 GTLREF2
P26 DBI2# GTLREF2 AA6
HDBI#3 V21 F20 VCPU
DBI3# GTLREF1
GTLREF0 F6
AC3 IERR# Length < 1.5inch.
V6 AB4 BPM#5 R366
H_FERR# MCERR# BPM5# BPM#4 2/3*Vccp X_49.9-1%
B6 FERR# BPM4# AA5
Y4 Y6 GTLREF2
13 STPCLK# STPCLK# BPM3#
AA3 BINIT# BPM2# AC4
W5 AB5 BPM#1 C388 C389 R367
13 HINIT# INIT# BPM1#
AB2 AC6 BPM#0 220p 220p X_100-1%
RSP# BPM0#
H5 H3 HREQ#4
6 HDBSY# DBSY# REQ4# HREQ#[4:0] 6
H2 J3 HREQ#3
6 HDRDY# DRDY# REQ3#
J6 J4 HREQ#2
6 HTRDY# TRDY# REQ2#
K5 HREQ#1
REQ1# HREQ#0
6 HADS# G1 ADS# REQ0# J1 Every pin put one 220pF cap near it.
6 HLOCK# G4 LOCK#
G2 AD25 R368 56 Trace Width 15mils, Space 15mils.
6 HBNR# BNR# TESTHI12
F3 A6 R369 56
6 HHIT# HIT# TESTHI11
6 HHITM# E3 HITM# TESTHI10 Y3
R370 56
Keep the voltage dividers within 1.5 inches of the
6 HBPRI# D2 BPRI# TESTHI9 W4 VCPU
6 HDEFER# E2 DEFER# TESTHI8 U6 first GTLREF Pin
TESTHI7 AB22
C ITP_TDI C1 AA20 C
ITP_TDO TDI TESTHI6
Trace : 10 D5 TDO TESTHI5 AC23 VCPU
ITP_TMS F7 AC24
mil width ITP_TRST# TMS TESTHI4
E6 TRST# TESTHI3 AC20
10mil ITP_TCK D4 AC21
TCK TESTHI2 R374 56
space 24 CPU_TMPA B3 THERMDA TESTHI1 AA2 VCPU
THERMTRIP#
C4
A2
THERMDC TESTHI0 AD24 R375 56
CPU STRAPPING RESISTORS
R376 X_33 THERMTRIP#
AF26 GND/SKTOCC# BCLK1# AF23 CPUCLK0- 9
HPHOT# C3 PROCHOT# BCLK0# AF22 CPUCLK0+ 9 CLOSED TO SOCKET478
13 IGNNE# B2 IGNNE#
B5 F4 HRS#2
13 SMI# SMI# RS2# HRS#[2:0] 6
C6 G5 HRS#1
13 A20M# A20M# RS1# HRS#0 VCPU
AB26 F1 PWROKCPU 300 R378
13 CPUSLP# SLP# RS0# HBR#0 R379 51
A22 V5 CPURST# R380 51
RESERVED0 AP1# THERMTRIP# R381 62
A7 RESERVED1 AP0# AC1
AD2 RESERVED2 BR0# H6 HBR#0 6
AD3 BPM#0 R382 49.9
RESERVED3 VCPU
AE21 P1 R384 51ST BPM#1 R383 49.9
RESERVED4 COMP1 R386 51ST BPM#4 R385 49.9
AF24 RESERVED5 COMP0 L24 * Short trace BPM#5 R387 49.9
AF25 RESERVED6
DP3# L25
AD6 K26 ITP_TDI R388 150
7 BSEL0 BSEL0 DP2# VCPU
7 BSEL1 AD5 BSEL1 DP1# K25
J26 ITP_TRST# R389 680
DP0#
13 PWROKCPU AB23 PWRGOOD
ADSTB1# R5 HADSTB#1 6
AB25 L5 PWROKCPU C390 X_1000p
B 6,13 CPURST# RESET# ADSTB0# HADSTB#0 6 B
W23 CPURST# C391 X_1000p
DSTBP3# HDSTBP#3 6 CPUSLP#
HD#63 AA24 P23 C392 X_0.022u
6 HD#[63:0] D63# DSTBP2# HDSTBP#2 6
HD#62 AA22 Differential J23
D62# DSTBP1# HDSTBP#1 6 CPURST# 22
HD#61 AA25 F21 R390 10p
HD#60 D61# Host Data DSTBP0# HDSTBP#0 6
C393
Y21 D60# DSTBN3# W22 HDSTBN#3 6
HD#59 Y24 Strobes R22
D59# DSTBN2# HDSTBN#2 6
HD#58 Y23 K22
D58# DSTBN1# HDSTBN#1 6
HD#57 W25 E22
D57# DSTBN0# HDSTBN#0 6
HD#56 Y26
HD#55 D56#
W26 D55# LINT1/NMI E5 NMI 13
HD#54 V24 D1
D54# LINT0/INTR INTR 13
CLOSED TO SOCKET478
VCPU
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
D39#