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A B C D E

MODEL NAME : PALB0
PCB NO : LA-6801P ( DAB00000410 )
BOM P/N : 46198531L01 -->R3
1 46198531L02 -->R1 1

46198531L03 -->R3
46198531L04 -->R1

Dell/Compal Confidential
Schematic Document
2

Specter (Huron River) 2

Sandy Bridge(PGA) + Cougar Point(standard)
DISCRETE VGA N12E-GE-B (optimus)
3
2011-01-25 3

Rev: 1.0

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/01/25 Deciphered Date 2012/01/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

LA-6801P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, January 25, 2011 Sheet 1 of 61
A B C D E
A B C D E

Compal Confidential CPU XDP
FFS Fan Control
Project Code : PALB0 P.28 P.30 Conn. P.6
File Name : LA-6801P
HDMI HDMI Intel
Sandy Bridge
1 1

Conn. P.39
DisplayPort GPU
PEG x16 (DIS) Processor Memory Bus (DDRIII) 204pin DDRIII SO-DIMM x2
Dual Channel
DP Conn.
P.38
N12E-GE 4C 45W SV 1.5V DDRIII 1066/1333 MHz
BANK 0, 1, 2, 3 P.11,12

DisplayPort
P.40~45
rPGA 989 Socket
P.5~10

DP (DIS)
DP MUX FDI x8 DMI x4
(UMA) 100MHz
P.37
DP 100MHz 5GB/s Port 0
2.7GT/s SATA HDD Conn.
P.28

LVDS LVDS Port 2
SATA2.0
Conn. SATA ODD Conn.
2
P.21 P.28 2

CRT Port 0 USB 2.0
CRT Conn. ( USB Charger ) P.26
P.21

DisplayPort Intel Port 2
Cougar Point Digital Camera P.21 DMC/Daughter Board
PCI-E x1
PCH Port 4
Port 3 Port 2 Port 1 Port 4 Port 6 Mini Card-1 (WLAN)
( Half ) P.32
USB2.0
Mini Card-1 Mini Card-2 LAN(GbE) Card Reader USB 3.0/2.0
Port 5 Mini Card-2 (WWAN)
WLAN (Half) WWAN (Full) AR8151-BL1A RTS5209 Host Ctrl. BGA 989 Balls ( Full ) P.32 SIM Card P.32
P.22 P.23 P.27
Port 6
3 USB[x] USB[x] USB 3.0/2.0 AlienFX/ELC P.34~36 3
port4 port5 RJ45 9 in 1 Combo Conns x2 HD Audio
P.22 Socket P.23 P.27 Port 8
DMC/Daughter Board P13~20 BT 2.1 /BT 3.0 P.32
P.32

TPA6211A P.25
SPI LPC Bus
RTC CKT. Audio Codec
P.13 ALC665-GR P.24
sub-woofer conn. P.25
Power On/Off CKT.
P.29 SPI ROM ENE 3810 ENE KB930 TI TPA6017A2 P.25
Audio Jack x3
( HeadPhone x2, MIC) P.25
P.13 P.31 P.31
DC/DC Interface CKT.
P.33
Int. Speaker P.25
Digital MIC P.24
4 Power Circuit DC/DC Touch Pad Int.KBD BIOS ROM 4

P.49~59 P.35 P.29 P.31

Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/01/25 Deciphered Date 2012/01/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

LA-6801P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, January 25, 2011 Sheet 2 of 61
A B C D E
A B C D E

Compal Confidential
Project Code : PALB0
File Name : LA-6801P
1 LA-6801P M/B 1

Camera

40 pin LCD Panel
Wire

Blue Tooth

Wire
LS-6801P 12 pin
80 pin
BTB conn.
LS-6803P
INDICATOR/B HDD
Wire Wire
2
Led-Wireless
6 pin WLAN WWAN/DMC 2
20 pin
Led-CapsLock

DMC/B
14 pin ODD

LF-6801P
FPC
FFC Wire FFC
20 pin
6 pin 12 pin
LS-6802P
LS-6809P LS-6806P
TP LED/B
Touch Pad FFC Led x 6
LOGO LIGHT GUIDE/B POWER BUTTON/B
4 pin on/off SW
Lid Led x 6 Led x 3
3 3

4 pin 4 pin
Wire Wire
LS-6807P LS-6808P

FRONT LIGHT L/B FRONT LIGHT R/B

Led x 2 Led x 2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/01/25 Deciphered Date 2012/01/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, January 25, 2011 Sheet 3 of 61
A B C D E
A

Board ID Table for AD channel
Vcc 3.3V +/- 5% BOARD ID Table USB PORT# DESTINATION
Ra 100K +/- 5%
Board ID Rb V AD_BID min V AD_BID typ V AD_BID max EC AD3 Board ID PCB Revision 0 None
0 0 0 V 0 V 0.155 V 0x00-0x0C 0 0.1
1 8.2K +/- 5% 0.168 V 0.250 V 0.362 V 0x0D-0x1C 1 0.2 1 JUSB1 (2.0 Ext Left Side)
2 18K +/- 5% 0.375 V 0.503 V 0.621 V 0x1D-0x30 2 0.3
3 33K +/- 5% 0.634 V 0.819 V 0.945 V 0x31-0x49 3 0.4 2 Bluetooth
4 56K +/- 5% 0.958 V 1.185 V 1.359 V 0x4A-0x69 4 1.0
5 100K +/- 5% 1.372 V 1.650 V 1.838 V 0x6A-0x8E 5 3 CAMERA
6 200K +/- 5% 1.851 V 2.200 V 2.420 V 0x8F-0xBB 6
7 NC 2.433 V 3.300 V 3.300 V 0xBC-0xFF 7 4 JMINI1 (WLAN)
PCH
SMBUS Control Table
5 JMINI2 (WWAN/DMC)
Thermal Thermal VGA Thermal
SOURCE MINI1 MINI2 BATT SODIMM Sensor 1 Sensor 2 FFS Sensor VGA DMC XDP Charger
6 ELC 8051
EC_SMB_CK1
EC_SMB_DA1
KB930 V 7 None
EC_SMB_CK2
EC_SMB_DA2
KB930 V V V 8 None
PCH_SML0CLK PCH Link 9 None
PCH_SML0DATA

PCH_SML1CLK
PCH_SML1DATA
PCH V 10 None
MEM_SMBCLK
MEM_SMBDATA
PCH V V V V V V V 11 None

12 None

CLKOUT DESTINATION 13 None
1 1

PCI0 PCH_LOOPBACK

PCI1 EC LPC

PCI2 None
SATA DESTINATION PCI EXPRESS DESTINATION
PCI3 None
SATA0 HDD Lane 1 10/100/1G LAN
PCI4 None
SATA1 None Lane 2 MINI CARD-2 WWAN/DMC

SATA2 ODD Lane 3 MINI CARD-1 WLAN
DIFFERENTIAL DESTINATION FLEX CLOCKS DESTINATION
SATA3 None Lane 4 CARD READER
CLKOUT_PCIE0 None CLKOUTFLEX0 None
SATA4 None Lane 5 None
CLKOUT_PCIE1 10/100/1G LAN CLKOUTFLEX1 None
SATA5 None Lane 6 USB 3.0
CLKOUT_PCIE2 MINI CARD-2 WWAN CLKOUTFLEX2 None
Lane 7 None
Symbol Note :
CLK CLKOUT_PCIE3 MINI CARD-1 WLAN CLKOUTFLEX3 None
Lane 8 None
CLKOUT_PCIE4 CARD READER : means Digital Ground

CLKOUT_PCIE5 None
: means Analog Ground
CLKOUT_PCIE6 USB 3.0
Security Classification Compal Secret Data Compal Electronics, Inc.
CLKOUT_PCIE7 None Issued Date 2011/01/25 Deciphered Date 2012/01/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
CLKOUT_PEG_B None AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev

LA-6801P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, January 25, 2011 Sheet 4 of 61
A
5 4 3 2 1

+VCCP

PEG_ICOMPI and RCOMPO signals should be shorted and routed

1
with - max length = 500 mils - typical impedance = 43 mohms JCPU1I
RC2 PEG_ICOMPO signals should be routed with - max length = 500 mils
24.9_0402_1% - typical impedance = 14.5 mohms
T35 F22
VSS161 VSS234

2
JCPU1A T34 F19
D PEG_COMP VSS162 VSS235 D
J22 T33 E30
PEG_ICOMPI VSS163 VSS236
J21 T32 E27
PEG_ICOMPO VSS164 VSS237
<15> DMI_CRX_PTX_N0 B27 H22 T31 E24
DMI_RX#[0] PEG_RCOMPO VSS165 VSS238
<15> DMI_CRX_PTX_N1 B25 T30 E21
DMI_RX#[1] VSS166 VSS239
<15> DMI_CRX_PTX_N2 A25 T29 E18
DMI_RX#[2] PEG_GTX_C_HRX_N15 VSS167 VSS240
<15> DMI_CRX_PTX_N3 B24 K33 PEG_GTX_C_HRX_N15 <40> T28 E15
DMI_RX#[3] PEG_RX#[0] PEG_GTX_C_HRX_N14 VSS168 VSS241
M35 PEG_GTX_C_HRX_N14 <40> T27 E13
PEG_RX#[1] PEG_GTX_C_HRX_N13 VSS169 VSS242
<15> DMI_CRX_PTX_P0 B28 L34 PEG_GTX_C_HRX_N13 <40> T26 E10
DMI_RX[0] PEG_RX#[2] PEG_GTX_C_HRX_N12 VSS170 VSS243
<15> DMI_CRX_PTX_P1 B26 J35 PEG_GTX_C_HRX_N12 <40> P9 E9
DMI_RX[1] PEG_RX#[3] VSS171 VSS244

DMI
<15> DMI_CRX_PTX_P2 A24 J32 PEG_GTX_C_HRX_N11 PEG_GTX_C_HRX_N11 <40> P8 E8
DMI_RX[2] PEG_RX#[4] PEG_GTX_C_HRX_N10 VSS172 VSS245
<15> DMI_CRX_PTX_P3 B23 H34 PEG_GTX_C_HRX_N10 <40> P6 E7
DMI_RX[3] PEG_RX#[5] PEG_GTX_C_HRX_N9 VSS173 VSS246
H31 PEG_GTX_C_HRX_N9 <40> P5 E6
PEG_RX#[6] PEG_GTX_C_HRX_N8 VSS174 VSS247
<15> DMI_CTX_PRX_N0 G21 G33 PEG_GTX_C_HRX_N8 <40> P3 E5
DMI_TX#[0] PEG_RX#[7] PEG_GTX_C_HRX_N7 VSS175 VSS248
<15> DMI_CTX_PRX_N1 E22 G30 PEG_GTX_C_HRX_N7 <40> P2 E4
DMI_TX#[1] PEG_RX#[8] PEG_GTX_C_HRX_N6 VSS176 VSS249
<15> DMI_CTX_PRX_N2 F21 F35 PEG_GTX_C_HRX_N6 <40> N35 E3
DMI_TX#[2] PEG_RX#[9] PEG_GTX_C_HRX_N5 VSS177 VSS250
<15> DMI_CTX_PRX_N3 D21 E34 PEG_GTX_C_HRX_N5 <40> N34 E2
DMI_TX#[3] PEG_RX#[10] PEG_GTX_C_HRX_N4 VSS178 VSS251
E32 PEG_GTX_C_HRX_N4 <40> N33 E1
PEG_RX#[11] PEG_GTX_C_HRX_N3 VSS179 VSS252
<15> DMI_CTX_PRX_P0 G22 D33 PEG_GTX_C_HRX_N3 <40> N32 D35
DMI_TX[0] PEG_RX#[12] PEG_GTX_C_HRX_N2 VSS180 VSS253
<15> DMI_CTX_PRX_P1 D22 D31 PEG_GTX_C_HRX_N2 <40> N31 D32
DMI_TX[1] PEG_RX#[13] PEG_GTX_C_HRX_N1 VSS181 VSS254
<15> DMI_CTX_PRX_P2 F20 B33 PEG_GTX_C_HRX_N1 <40> N30 D29
DMI_TX[2] PEG_RX#[14] PEG_GTX_C_HRX_N0 VSS182 VSS255

PCI EXPRESS* - GRAPHICS
<15> DMI_CTX_PRX_P3 C21 C32 PEG_GTX_C_HRX_N0 <40> N29 D26
DMI_TX[3] PEG_RX#[15] VSS183 VSS256
N28 D20
PEG_GTX_C_HRX_P15 VSS184 VSS257
J33 PEG_GTX_C_HRX_P15 <40> N27 D17
PEG_RX[0] PEG_GTX_C_HRX_P14 VSS185 VSS258
L35 PEG_GTX_C_HRX_P14 <40> N26 C34
PEG_RX[1] PEG_GTX_C_HRX_P13 VSS186 VSS259
K34 PEG_GTX_C_HRX_P13 <40> M34 C31
FDI_CTX_PRX_N0 PEG_RX[2] PEG_GTX_C_HRX_P12 VSS187 VSS260
<15> FDI_CTX_PRX_N0 A21 H35 PEG_GTX_C_HRX_P12 <40> L33 C28
FDI_CTX_PRX_N1 FDI0_TX#[0] PEG_RX[3] PEG_GTX_C_HRX_P11 VSS188 VSS261
<15> FDI_CTX_PRX_N1 H19 H32 PEG_GTX_C_HRX_P11 <40> L30 C27
FDI_CTX_PRX_N2 FDI0_TX#[1] PEG_RX[4] PEG_GTX_C_HRX_P10 VSS189 VSS262
<15> FDI_CTX_PRX_N2 E19 G34 PEG_GTX_C_HRX_P10 <40> L27 C25
FDI_CTX_PRX_N3 FDI0_TX#[2] PEG_RX[5] PEG_GTX_C_HRX_P9 VSS190 VSS263