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5 4 3 2 1
Model Name: GA-7VM400AMF
Revision 1.0
SHEET TITLE
D D
1 BOM & PCB MODIFY HISTORY
2 COVER SHEET
3 BLOCK DIAGRAM
4,5 AMD CPU SOCKET A
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6,7,8 KM400 HOST; DDR; AGP,VLINK,POWER/GOUND
9 CLOCK GENERATOR (ICS950913CF)
10,11,12 VT8237 (SOUTH BIRDGE)
C C
13,14 DDR SDRAM DIMMS 1,2 DDR TERMINATION
15 AGP SLOT
16 PCI SLOT 1,2,3
17 IDE,USB
18 LPCIO_IT8705
19 BIOS
20 COM,PRT,FDD,KB/MS,IR
B B
21 AC 97 CODEC
22 AUDIO JACK,GAME PORT
23 RTL8110S & USB CONNECTOR
Digitally signed by dd
24 PANEL,STR LED,FANS
DN: cn=dd, o=dd,
25 DDR POWER
ou=dd,
email=dddd@yahoo.
26 ATX CONN,3VDUAL,VDDQ DC POWER
COMPONENT SIDE
(1 oz. Copper)
com, c=US
27 VCORE PHASE PWM FAIRCHILD FAN5091M GND SIDE
(1 oz. Copper)
VCC SIDE
A A
(1 oz. Copper)
Date: 2009.10.23
28 VID,FID CONTROL SOLDER SIDE
(1 oz. Copper)
06:48:26 +07'00' TI TSB43AB23
29
Title
GIGABYTE
COVER SHEET
Size Document Number Rev
Custom 1.0
GA-7VM400AMF
Date: Wednesday, December 17, 2003 Sheet 1 of 29
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Model Name: GA-7VM400AMF
Circuit or PCB layout change for next version
Version:1.0
Date Change Item Reason
D 2003/10/01 VER: 0.1 PCB 0.1 GERBER OUT D
2003/11/20 VER: 1.0 PCB 1.0 GERBER OUT
Component value change history 2003.09.22
Date Change Item Reason
2003/10/28 0.1 BOM ISSUED. Modify from 7VM400AMFP 0.1. Change model name.
Change NB form KKM400A/A1 to KM400A/A2.
2003/11/24 1.0A BOM RELEASE SOLVE DDR COMPATIBILITY
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2003/12/09 1.0B BOM RELEASE COST DOWN
2003/12/17 Add VT8237/CD China Version. 1.0B BOM ECN
C C
B B
A A
GIGABYTE
Title
BOM & PCB MODIFY HISTORY
Size Document Number Rev
Custom 1.0
GA-7VM400AMF
Date: Wednesday, December 17, 2003 Sheet 2 of 29
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GA-7VM400AMF BLOCK DIAGRAM
AMD K7
D D
CLOCK
VID0~4
PWM/OTHER POWER
VCORE = 1.75V (650-1100MHZ) / SLEEP : 1.3V
VCC25 = 2.5V(I/O,MEMORY/I,VLINK/I) VCCA = 2.5V ; 2_5V = 2.5V PAGE 4, 5 VCORE = 1.75V (650-1100MHZ) / SLEEP : 1.3V
VCC3 = 3.3V PAGE 09 5VSB,-12V,+12V,VCC,VCC3,3VDUAL
DDRVTT,DDR25V,3VSTR,VCC25 PAGE 25,26,27
GAD0~31 VIA KM400A NORTH BRIDGE
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AD_STB0,-AD_STB0
AD_STB1,-AD_STB1
SBA0~7 MAA0~15
AGP SLOT 4X/8X SB_STB,-SB_STB MDD0~63 DDR SDRAM DIMM X 2
-DQSD0~7
VDDQ = 1.5V (AGP POWER 4X) -GBE0~3
VCC3 = 3.3V VCORE = 1.75V (650-1100MHZ) / SLEEP : 1.3V
DQM0~7
+12V = 12V ST0~2 AGP BUS DDR25V = 2.5V(SUSPEND POWER) DDR25V = 2.5V(SUSPEND POWER)
3VDUAL = 3.3V VDDQ = 1.5V (AGP POWER 4X) DDRVTT = 1.25V
C
VCC = 5V PAGE 15 VCC25 = 2.5V(I/O,MEMORY/I,VLINK/I) PAGE 13,14 C
PAGE 6,7,8
VLAD0~7
CONTROL BUS V LINK RTL8100C & USB CONN
PAGE 23
USB PORTS 0~7 VIA VT8237/CD A2 SOUTH PCI LAN
BRIDGE
VCC = 5V
5VSB = 5V
PAGE 19
5VUSB = 5V
IDE Primary and Secondary
VCC = 5V
VCC25 = 2.5V(I/O,MEMORY/I,VLINK/I) PAGE 17
3VDUAL = 3.3V(SUSPEND POWER)
VCC3 = 3.3V
AC97 CODEC ALC655/D RTCVDD = 3.3V
PAGE 10,11,12
B
+12V = 12V
VCC3 = 3.3V
BIOS B
VCC = 5V
PAGE 21
LPC BUS
AVDD = 5V PCI BUS VCC = 5V
PAGE 19
VCC3 = 3V
PCI SLOT 1,2,3
+12 = 12V
AUDIO PORTS : FRONT AUDIO -12 = -12V
VCC = 5V
VCC3 = 3V
PAGE 16
LIN_ OUT LINE_IN MIC 3VDUAL = 3V
LPC I/O IT8705
TELE CD_IN AUX_IN GAME PORT VCC = 5V
5VSB = 5V
PAGE 22 VBAT = 3V PAGE 18
FRONT PANEL/FANS I/O PORTS :
VCC = 5V
5VSB = 5V
+12 = 12V
PVCC = 5V PAGE 24 COMA COMB LPT IR FDD PAGE 20
A A
GIGABYTE
Title
BLOCK DIAGRAM
Size Document Number Rev
Custom 1.0
GA-7VM400AMF
Date: Wednesday, December 17, 2003 Sheet 3 of 29
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-CPURST
VCC3
SOCKET_AA
-SDATA[0..63] -SDATA0 AA35 AE1 -A20M C3
<6> -SDATA[0..63] SDATA0 A20M -A20M <10>
-SDATA1 W37 AG1 FERR 10P/4/X
-SDATA2 SDATA1 FERR -CPUINIT R2
W35 AJ3 -CPUINIT <10>
-SDATA3 SDATA2 INIT INTR 220/6
Y35 AL1 INTR <10>
-SDATA4 SDATA3 INTR -IGNNE VCORE
U35 AJ1 -IGNNE <10>
-SDATA5 SDATA4 IGNNE NMI
U33 AN3 -FERR <10>
-SDATA6 SDATA5 NMI -CPURST PWK
S37 AG3 -CPURST <26>
SDATA6 RESET
3
-SDATA7 S33 AN5 -SMI
D -SDATA8 AA33
SDATA7 0 SMI
AC1 -STPCLK
-SMI <10>
VCORE R5 Q2 D
SDATA8 STPCLK -STPCLK <10> C
-SDATA9 AE37 680/6 MMBT2222A/SOT23
-SDATA10 SDATA9 PWK C146
B E
AC33 AE3 PWK <26>
-SDATA11 SDATA10 PWROK 10P/4/X FERR R7 1K/6 FERR+
AC37
-SDATA12 SDATA11
Y37
2
1
-SDATA13 SDATA12 PICCLK0 R3 R4
AA37 N1 PICCLK0 <9>
-SDATA14 SDATA13 PICCLK -PICD0 60.4/6/1 60.4/6/1
AC35 N3 -PICD0 <10>
-SDATA15 SDATA14 PICD0/BYPASSCLK -PICD1
S35 N5 -PICD1 <10>
-SDATA16 SDATA15 PICD1/BYPASSCLK
Q37 R6
-SDATA17 SDATA16 -COREFB
Q35 AG13
-SDATA18 SDATA17 COREFB- COREFB
N37 AG11
-SDATA19 SDATA18 COREFB+ 301/6/1
J33
-SDATA20 SDATA19 C1 680P/4/X/50V CPUCLK
G33 AN17 CPUCLK <9>
-SDATA21 SDATA20 CLKIN C2 680P/4/X/50V -CPUCLK RN1
G37 AL17 -CPUCLK <9>
To CPU
-SDATA22 SDATA21 CLKIN
E37 1 2
-SDATA23 SDATA22 L17 L18 PLLBYPASSCLK
G35 1 AN19 3 4
-SDATA24 SDATA23 RSTCLK -CDICLK0 DIC0 -DICLK0 <6> -PLLBYPASSCLK VCORE
Q33 AL19 5 6 VCORE
-SDATA25 SDATA24 RSTCLK 10nH/6/10 10nH/6/10
N33 7 8
-SDATA26 SDATA25 K7CLKOUT
L33 AL21
SDATA26 K7CLKOUT
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-SDATA27 N35 AN21 -K7CLKOUT C147
-SDATA28 SDATA27 K7CLKOUT 5P/4/N/50V 100/8P4R
L37
-SDATA29 SDATA28
J37
-SDATA30 SDATA29
A37 AJ13
-SDATA31 SDATA30 ANALOG
E35
-SDATA32 SDATA31 SYSVREFMODE L1 L2 VCORE
E31 AA5
-SDATA33 SDATA32 SYSVREFMODE VREFSYS -CDICLK1 DIC1 RN2
E29 W5 -DICLK1 <6>
-SDATA34 SDATA33 VREF_SYS 10nH/6/10 10nH/6/10
A27 1 2
-SDATA35 SDATA34 ZN K7CLKOUT
A25 AC5 3 4
-SDATA36 SDATA35 ZN ZP C4 -K7CLKOUT VCORE R8
E21 AE5 5 6
-SDATA37 SDATA36 ZP 5P/4/N/50V VCORE 100/6/1
C23 7 8
-SDATA38 SDATA37 -PLLBYPASS
C27 AJ25
C -SDATA39 SDATA38 PLLBYPASS PLLBYPASSCLK C
A23 2 AN15
-SDATA40 SDATA39 PLLBYPASSCLK -PLLBYPASSCLK 100/8P4R VREFSYS
A35 AL15
-SDATA41 SDATA40 PLLBYPASSCLK L38 L39
C35
-SDATA42 SDATA41 PLLMON1 -CDICLK2 DIC2
C33 AN13 -DICLK2 <6>
-SDATA43 SDATA42 PLLMON1 PLLMON2 R9 BC1
C31 AL13
-SDATA44 SDATA43 PLLMON2 -PLLTEST 10nH/6/10 10nH/6/10 100/6/1 1U/6/Y/10V
A29 AC3
-SDATA45 SDATA44 PLLTEST C356
C29
-SDATA46 SDATA45 5P/4/N/50V COREFB
E23
-SDATA47 SDATA46 SCANCLK1
C25 S1
-SDATA48 SDATA47 SCANCLK1 SCANCLK2
E17 S5 close to cpu socket.
-SDATA49 SDATA48 SCANCLK2 SCANINTEVAL SC2 SC3
E13 S3
-SDATA50 SDATA49 SCANINTEVAL SCANSHIFTEN L5 L6 10U/8/X/10V/B/X 10U/8/X/10V/B/X
E11 Q5
-SDATA51 SDATA50 SCANSHIFTEN -CDICLK3 DIC3 -COREFB
C15 -DICLK3 <6>
-SDATA52 SDATA51 10nH/6/10 10nH/6/10
E9 AA1
-SDATA53 SDATA52 DBRDY -DBREQ
A13 AA3
-SDATA54 SDATA53 DBREQ -FLUSH C6
C9 SOCKETA AL3
-SDATA55 SDATA54 FLUSH 5P/4/N/50V
A9 3