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A B C D E
1 1
NWQAA
2
Marseille 10G 2
LA-6062P REV 2.0 Schematic
3
Intel Processor(CFD/ARD) / PCH(HM57/HM55/PM55) 3
2010-03-24 Rev 2.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 200910/9 Deciphered Date 2010/01/23 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NWQAA LA-6062P M/B
Date: W ednesday, March 24, 2010 Sheet 1 of 59
A B C D E
A B C D E
Fan Control VGA Thermal Sensor Clock Generator
APL5607 ADM1032ARMZ-2 RTM890N
Intel Arrandale / page 6 page 14 page 25
PCIE-Express 16X 2.5GHz Clarksfield
1
rPGA-989 Memory BUS(DDRIII) 200pin DDRIII-SO-DIMM X2 1
Dual Channel BANK 0, 1, 2, 3 page 11,12
page 5,6,7,8,9,10 1.5V DDRIII 800/1066/1333 MT/s
VGA (DDR3)
NVIDIA N11M GE1, 64bit with 512MB/1GB CRT USB/B Right Left USB FingerPrinter
FDI X8 DMI X4 USB port 0,1 USB port 2 USB port 8
page 26 page 37 page 37 page 38
2.7GHz 2.5GHz
NVIDIA N11P GE1, 128bit with 1GB/2GB
BT conn Felica Int. Camera
page 13,14,15,16,17,18,19,20,21,22,23,24
USB port 5 USB port 9 USB port 11
USB page 38 page 38 page 25
5V 480MHz
LVDS Conn.
page 25
PCIeMini Card PCIeMini Card Express Card
2
USB WiMax USB port 13 3G/TV#1
TV#2
USB port 12
USB port 10
USB USB port 4 2
5V 480MHz page 39 page 39 page 39
EC SMBus HDMI-CEC Level Shifter
HDMI Conn. PCIe 1x PCIeMini Card PCIeMini Card Express Card
page 27 page 27 1.5V 2.5GHz(250MB/s)
WLAN PCIe port 2 JET PCIe port 4
PCIe PCIe port 3
page 27 page 39 page 39 page 39
Intel Ibex Peak
RTL8105E 10/100M SATA port 1 SATA HDD B-CAS SIM
RJ45 PCIe 1x 5V 3GHz(300MB/s) page 38 page 39
SATA port 1
page 40 RTL8111E 1G PCIe port 1 1.5V 2.5GHz(250MB/s) page 37
page 40
BGA-951
SATA port 4 SATA ODD
5V 3GHz(300MB/s) SATA port 4
Cardreader PCIe 1x page 37
JMB385C/389C 1.5V 2.5GHz(250MB/s) SATA port 5
PCIe port5 page 28,29,30,31,32,33,34,35,36
page 41 5V 3GHz(300MB/s) eSATA USB
3 3
USB port 3 SATA port 5 USB port 3
page 37 page 37
5V 480MHz
LPC BUS HD Audio 3.3V/1.5V 24MHz
3.3V 33 MHz
TP& Light Pipe/B
LS-6061P page 45 MDC 1.5 Conn HDA Codec
ALC269
Cap Sensor SPI ROM Debug Port ENE KB926 D3/E0 page 38 page 42
page 44 page 43
& Light Sensor/B (4MB) 28
page
RTC CKT. LS-6062P page 45
page 28
Touch Pad Int.KBD EC ROM CIR G-Sensor Int. SPK Conn JPIO
page 42
LED/B page 45 page 44 page 43 page 44 MIC Conn (HP & MIC)
DC/DC Interface CKT. LS-6063P page 36
(256KB) 44
page
page 25 page 37
page 46 EC SMBus
Audio & USB/B
4 4
Power Circuit DC/DC LS-6064P page 37
page 47,48,49,50,51,52
53,54,55,56
Finger Printer/B
LS-6065P page 38 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 200910/9 Deciphered Date 2010/01/23 Title
Power On/Off CKT. Power/B_FPC THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
page 45 DA300006F00 page 45 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NWQAA LA-6062P M/B 2.0
Date: Tuesday, March 23, 2010 Sheet 2 of 59
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5 4 3 2 1
DESIGN CURRENT 0.1A +3VL
DESIGN CURRENT 0.1A +5VL
B+
Ipeak=5A, Imax=3.5A, Iocp min=7.9 DESIGN CURRENT 5A +5VALW
SUSP#
DESIGN CURRENT 2A +1.8VS
MP2121DQ
SUSP
N-CHANNEL DESIGN CURRENT 4A +5VS
D D
SI4800 BCPWON
DESIGN CURRENT 0.5A +5VS_L_BCAS
P-CHANNEL
AO-3413
KB_LED
RT8205EGQW DESIGN CURRENT 400mA +5VS_LED
P-CHANNEL
AO-3413
+5VS
DESIGN CURRENT 300mA +3VS_HDP
LDO
G9191
ODD_EN#
DESIGN CURRENT 1.6A +5VS_ODD
P-CHANNEL
AO-3413
Ipeak=5A, Imax=3.5A, Iocp min=7.7 DESIGN CURRENT 5A +3VALW
WOL_EN#
P-CHANNEL DESIGN CURRENT 330mA +3V_LAN
SUSP AO-3413
N-CHANNEL DESIGN CURRENT 4A +3VS
SI4800 LCD_ENVDD
P-CHANNEL DESIGN CURRENT 1.5A +LCD_VDD
C
AO-3415 C
BT_PWR#
DESIGN CURRENT 180mA +BT_VCC
P-CHANNEL
AO-3413
FELICA_PWR
DESIGN CURRENT 0.5A +FLICA_VCC
P-CHANNEL
AO-3413
DGPU_PWR_EN
DESIGN CURRENT 0.5A +3VS_DGPU
P-CHANNEL
AO-3413
VR_ON
DESIGN CURRENT 48A +CPU_CORE
ISL62883HRZ
SUSP# or DGPU_PWR_EN
DESIGN CURRENT 28A +VGA_CORE
APW7138NITRL
VTTP_EN
Ipeak=18A, Imax=12.6A, Iocp min=19.8 DESIGN CURRENT 18A +VTT
APW7138NITRL
SUSP#
B DESIGN CURRENT 7A B
Ipeak=7A, Imax=4.9A, Iocp min=7.7 +1.05VS
RT8209BGQW
DGPU_PWR_EN
DESIGN CURRENT 3A +1.05VS_DGPU
P-CHANNEL
AO-3413
SUSP#
Ipeak=15A, Imax=10.5A, Iocp min=16.5 DESIGN CURRENT 15A +1.5V
RT8209BGQW SUSP
N-CHANNEL DESIGN CURRENT 2A +1.5V_CPU
FDS6676AS
SUSP
N-CHANNEL DESIGN CURRENT 2A +1.5VS
FDS6676AS
VGA_PWROK
N-CHANNEL DESIGN CURRENT 10A +VRAM_1.5VS
FDS6676AS
SUSP or 0.75VR_EN#
DESIGN CURRENT 1.5A +0.75VS
G2992F1U
A GFXVR_EN A
DESIGN CURRENT 22A +GFX_CORE
ADP3211AMNR2G
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 200910/9 Deciphered Date 2010/01/23 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Tree
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NWQAA LA-6062P M/B
Date: Tuesday, March 23, 2010 Sheet 3 of 59
5 4 3 2 1
A B C D E
Platform SKU CPU PCH VGA
( O MEANS ON X MEANS OFF ) UMA(OPT@) Arrandale HM55@/HM57@ N/A
Voltage Rails
Discrete Clarksfield/
+5VS (DIS@) Arrandale HM55@/HM57@/PM55@ N11P@/N11M@
+RTCVCC B+ +5VL +5VALW +1.5V
Calpella
+3VS Optimus
+3VL +3VALW Arrandale HM55@/HM57@ N11P@/N11M@
+1.8VS (OPT@)
+VSB
power +1.5VS
1 plane +1.05VS
1
+0.75VS BTO Option Table
+CPU_CORE
+VGA_CORE Function HDMI CPU
+GFX_CORE
description HDMI Arrandale Clarksfield
+VTT
State Discrete/ Clarksfield with
+VRAM_1.5VS explain UMA Optimus COMMON CEC Arrandale Clarksfield S3 Power Saving
+3VS_DGPU
BTO IHDMI@ DHDMI@ HDMI@ CEC@ M1@ M3@ PSM3@
+1.05VS_DGPU
Function MINI PCI-E SLOT LAN Fingerprint Modem CIR KB Light
S0 description SLOT2 SLOT1 LAN Fingerprint Modem CIR KB Light
O O O O O O
explain 3G TV Tuner WIMAX 10/100M Giga Fingerprint Modem CIR KB Light
S1
O O O O O O
BTO 3G@ TV@ WIMAX@ 8105E@ 8111E@ FP@ MDC@ CIR@ KBL@
2 2
S3
O O O O O X
Function Felica BLUE TOOTH G-SENSOR SKU LVDS Camera & Mic
S5 S4/AC
O O O O X X
description Felica BLUE TOOTH G-SENSOR SKU 3D Panel Camera & Mic
S5 S4/ Battery only
O O O X X X explain Felica BLUE TOOTH G-SENSOR Discrete Optimus Discrete Optimus Camera & Mic
S5 S4/AC & Battery BTO FELICA@ BT@ GSENSOR@ DIS@ OPT@ 3D@ NO3D@ OPTFH@ CAM@
don't exist
O X X X X X
Function S3 Power Saving GPU New Card
description S3 Power Saving N11P & N11E N11M New Card
PCH SM Bus Address
explain No Power Saving Power Saving VRAM N11P N11E N11M-GE1 N11M-OP1 New Card
Power Device HEX Address NOPS@ PS@ 8PCS@ N11P@ N11E@ N11MGE@ N11MOP@ NEW@
BTO
+3VS DDR SO-DIMM 0 A0 H 1010 0000 b
3
+3VS DDR SO-DIMM 1 A4 H 1010 0100 b 3
Function Card reader
+3VS Clock Generator D2 H 1101 0010 b
+3VS New Card description JMB385C/389C
+3VS WLAN/WIMAX
explain JMB385C JMB389C
+3VS Clock Generator
+3VS 3G BTO JMB385@ JMB389@
SIGNAL
STATE SLP_S3# SLP_S4# SLP_S5#
EC SM Bus1 Address EC SM Bus2 Address
Full ON HIGH HIGH HIGH
Power Device HEX Address Power Device HEX Address S1(Power On Suspend) HIGH HIGH HIGH
+3VL Smart Battery 16 H 0001 0110 b +3VS PCH 96 H 1001 0110 b S3 (Suspend to RAM) LOW HIGH HIGH
+3VL HDMI-CEC 34 H 0011 0100 b +3VS NVIDIA GPU 9A H 1001 1010 b
S4 (Suspend to Disk) LOW LOW HIGH
+3VS G-Sensor 40 H 0100 0000 b
+3VS Light Sensor 52 H 0101 0010 b S5 (Soft OFF) LOW LOW LOW
4
Power Device HEX Address 4
G3 LOW LOW LOW
+3VL Cap. Sensor Virtual I2C
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 200910/9 Deciphered Date 2010/01/23 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 2.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NWQAA LA-6062P M/B
Date: Tuesday, March 23, 2010 Sheet 4 of 59
A B C D E
5 4 3 2 1
JCPUB
1 2 H_COMP3 AT23
R1 20_0402_1% COMP3 CLK_CPU_BCLK
BCLK A16 CLK_CPU_BCLK <33>
MISC
1 2 H_COMP2 AT24 B16 CLK_CPU_BCLK# CLK_CPU_BCLK# <33>
R2 20_0402_1% COMP2 BCLK#
H_COMP1 G16 CLK_CPU_XDP_R 1 CLK_CPU_XDP
CLOCKS
1 2 COMP1 BCLK_ITP AR30 2
@ R4 49.9_0402_1% AT30 CLK_CPU_XDP#_R 1 R41 @ 2 0_0402_5% CLK_CPU_XDP#
1000P_0402_50V7K 2 DRAMPWROK H_COMP0 AT26 BCLK_ITP#
1 C487 1 2 COMP0
R42 @ 0_0402_5%
R3 49.9_0402_1% E16 CLK_PEG
PEG_CLK CLK_PEG <29>
@ D16 CLK_PEG#
PEG_CLK# CLK_PEG# <29>
1000P_0402_50V7K 2 1 C488 VTTPWROK_CPU T41 PAD TP_SKTOCC# AH24 SKTOCC#
+VTT A18
DPLL_REF_SSCLK
DPLL_REF_SSCLK# A17 Unused by Clarksfield rPGA989 +VTT
D 1 2 CATERR# AK14 D
CATERR#
THERMAL
R18 49.9_0402_1%
F6 SM_DRAMRST#_CPU PM_EXTTS#0 R15 2 1 10K_0402_5%
PECI SM_DRAMRST#
<33> PECI AT15 PECI
SM_RCOMP[0] AL1 SM_RCOMP_0 R6 1 2 100_0402_1% DDR3 Compensation Signals PM_EXTTS#_R R13 2 1 10K_0402_5%
Power has removed VR_TT# SM_RCOMP[1] AM1 SM_RCOMP_1 R7 1 2 24.9_0402_1% Layout Note:Please these
SM_RCOMP[2] AN1 SM_RCOMP_2 R8 1 2 130_0402_1% resistors near Processor
+VTT 1 2 H_PROCHOT# AN26
+VTT PROCHOT#
R9 68_0402_5% AN15 PM_EXTTS#0
DDR3
MISC
PM_EXT_TS#[0]
PM_EXT_TS#[1] AP15 PM_EXTTS#_R 2 1 PM_EXTTS# <11,12>
R12 0_0402_5%
H_THERMTRIP# AK15
<33> H_THERMTRIP# THERMTRIP#
2
R10
68_0402_5% AT28 XDP_PRDY#
PRDY# XDP_PREQ# XDP_TDI_R XDP_TDI
@ PREQ# AP27 1 2
R20 0_0402_5%
1
AN28 XDP_TCK
H_CPURST# XDP_RST#_R H_CPURST# TCK XDP_TMS XDP_TDO_M XDP_TDO
1 2 AP26 RESET_OBS# TMS AP28 1 @ 2
PWR MANAGEMENT
PWR MANAGEMENT
R36 1K_0402_5% AT27 XDP_TRST# Routed as a single daisy chain R21 0_0402_5%
TRST#
1
JTAG & BPM
PMSYNCH AL15 AT29 XDP_TDI_R R23
<30> PMSYNCH PM_SYNC TDI
AR27 XDP_TDO_R 0_0402_5%
TDO XDP_TDI_M
TDI_M AR29 2 1 +3VS
2 1 H_PWRGOOD1_R AN14 AP29 XDP_TDO_M R312 1K_0402_5%
2
+1.5V_CPU 0_0402_5% R25 VCCPW RGOOD_1 TDO_M XDP_TDI_M 1 @ 2