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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101D JULY 1985 REVISED APRIL 2003
D D D D D D D D D D D D D
Bidirectional Transceivers Meet or Exceed the Requirements of ANSI Standards TIA/EIA-422-B and TIA/EIA-485-A and ITU Recommendations V.11 and X.27 Designed for Multipoint Transmission on Long Bus Lines in Noisy Environments 3-State Driver and Receiver Outputs Individual Driver and Receiver Enables Wide Positive and Negative Input/Output Bus Voltage Ranges Driver Output Capability . . . ±60 mA Max Thermal Shutdown Protection Driver Positive and Negative Current Limiting Receiver Input Impedance . . . 12 k Min Receiver Input Sensitivity . . . ±200 mV Receiver Input Hysteresis . . . 50 mV Typ Operate From Single 5-V Supply
SN65176B . . . D OR P PACKAGE SN75176B . . . D, P, OR PS PACKAGE (TOP VIEW)
R RE DE D
1 2 3 4
8 7 6 5
VCC B A GND
description/ordering information
The SN65176B and SN75176B differential bus transceivers are integrated circuits designed for bidirectional data communication on multipoint bus transmission lines. They are designed for balanced transmission lines and meet ANSI Standards TIA/EIA-422-B and TIA/EIA-485-A and ITU Recommendations V.11 and X.27. The SN65176B and SN75176B combine a 3-state differential line driver and a differential input line receiver, both of which operate from a single 5-V power supply. The driver and receiver have active-high and active-low enables, respectively, that can be connected together externally to function as a direction control. The driver differential outputs and the receiver differential inputs are connected internally to form differential input/output (I/O) bus ports that are designed to offer minimum loading to the bus when the driver is disabled or VCC = 0. These ports feature wide positive and negative common-mode voltage ranges, making the device suitable for party-line applications. ORDERING INFORMATION
TA PDIP (P) 0°C to 70°C SOIC (D) SOP (PS) PDIP (P) 40°C to 105°C SOIC (D) PACKAGE Tube of 50 Tube of 75 Reel of 2500 Reel of 2000 Tube of 50 Tube of 75 Reel of 2500 ORDERABLE PART NUMBER SN75176BP SN75176BD SN75176BDR SN75176BPSR SN65176BP SN65176BD SN65176BDR TOP-SIDE MARKING SN75176BP 75176B A176B SN65176BP 65176B
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101D JULY 1985 REVISED APRIL 2003
description/ordering information (continued)
The driver is designed for up to 60 mA of sink or source current. The driver features positive and negative current limiting and thermal shutdown for protection from line-fault conditions. Thermal shutdown is designed to occur at a junction temperature of approximately 150°C. The receiver features a minimum input impedance of 12 k, an input sensitivity of ±200 mV, and a typical input hysteresis of 50 mV. The SN65176B and SN75176B can be used in transmission-line applications employing the SN75172 and SN75174 quadruple differential line drivers and SN75173 and SN75175 quadruple differential line receivers. Function Tables
DRIVER INPUT D H L X ENABLE DE H H L RECEIVER DIFFERENTIAL INPUTS AB VID 0.2 V 0.2 V < VID < 0.2 V VID 0.2 V X Open ENABLE RE L L L H L OUTPUT R H ? L Z ? OUTPUTS A H L Z B L H Z
H = high level, L = low level, ? = indeterminate, X = irrelevant, Z = high impedance (off)
logic diagram (positive logic)
3 DE D RE R 4 2 6 1 7 A B Bus
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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101D JULY 1985 REVISED APRIL 2003
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT VCC R(eq) 16.8 k NOM 960 NOM 960 NOM TYPICAL OF A AND B I/O PORTS VCC TYPICAL OF RECEIVER OUTPUT VCC 85 NOM
Input
Output
GND Driver input: R(eq) = 3 k NOM Enable inputs: R(eq )= 8 k NOM R(eq) = Equivalent Resistor Input/Output Port
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Voltage range at any bus terminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V to 15 V Enable input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Package thermal impedance, JA (see Notes 2 and 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W PS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 95°C/W Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential input/output bus voltage, are with respect to network ground terminal. 2. Maximum power dissipation is a function of TJ(max), JA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) TA)/JA. Operating at the absolute maximum TJ of 150°C can affect reliability. 3. The package thermal impedance is calculated in accordance with JESD 51-7.
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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101D JULY 1985 REVISED APRIL 2003
recommended operating conditions
MIN VCC VI or VIC VIH VIL VID IOH IOL TA Supply voltage Voltage at any bus terminal (separately or common mode) High-level input voltage Low-level input voltage Differential input voltage (see Note 4) High-level High level output current Low-level Low level output current Operating free air temperature free-air Driver Receiver Driver Receiver SN65176B SN75176B 40 0 D, DE, and RE D, DE, and RE 2 0.8 ±12 60 400 60 8 105 70 4.75 TYP 5 MAX 5.25 12 7 UNIT V V V V V mA µA mA °C
NOTE 4: Differential input/output bus voltage is measured at the noninverting terminal A, with respect to the inverting terminal B.
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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101D JULY 1985 REVISED APRIL 2003
DRIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER VIK VO |VOD1| |VOD2| VOD3 |VOD| VOC |VOC| IO IIH IIL Input clamp voltage Output voltage Differential output voltage g Differential output voltage Differential output voltage Change in magnitude g g of differential output voltage§ Common-mode Common mode output voltage Change in magnitude g g of common-modeoutput voltage§ Output current High-level input current Low-level input current TEST CONDITIONS II = 18 mA IO = 0 IO = 0 RL = 100 , RL = 54 , See Note 5 RL = 54 or 100 , RL = 54 or 100 , RL = 54 or 100 , Output disabled, , See Note 6 VI = 2.4 V VI = 0.4 V VO = 7 V VO = 0 VO = VCC VO = 12 V No load Outputs enabled Outputs disabled 42 26 See Figure 1 See Figure 1 See Figure 1 VO = 12 V VO = 7 V See Figure 1 See Figure 1 MIN 0 1.5 1/2 VOD1 or 2¶ 1.5 1.5 2.5 5 5 ±0.2 ±0 2 +3 1 ±0.2 ±0 2 1 0.8 20 400 250 150 250 250 70 35 mA mA V V V V mA µA µA 3.6 TYP MAX 1.5 6 6 UNIT V V V V
IOS
Short-circuit Short circuit output current
ICC
Supply current (total package)
The power-off measurement in ANSI Standard TIA/EIA-422-B applies to disabled outputs only and is not applied to combined inputs and outputs. All typical values are at VCC = 5 V and TA = 25°C. § |VOD| and |VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level to a low level. ¶ The minimum VOD2 with a 100- load is either 1/2 VOD1 or 2 V, whichever is greater. NOTES: 5. See ANSI Standard TIA/EIA-485-A, Figure 3.5, Test Termination Measurement 2. 6. This applies for both power on and off; refer to ANSI Standard TIA/EIA-485-A for exact conditions. The TIA/EIA-422-B limit does not apply for a combined driver and receiver terminal.
switching characteristics, VCC = 5 V, RL = 110 , TA = 25°C (unless otherwise noted)
PARAMETER td(OD) tt(OD) tPZH tPZL tPHZ tPLZ Differential-output delay time Differential-output transition time Output enable time to high level Output enable time to low level Output disable time from high level Output disable time from low level TEST CONDITIONS RL = 54 , RL = 54 , See Figure 4 See Figure 5 See Figure 4 See Figure 5 See Figure 3 See Figure 3 MIN TYP 15 20 85 40 150 20 MAX 22 30 120 60 250 30 UNIT ns ns ns ns ns ns
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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101D JULY 1985 REVISED APRIL 2003
SYMBOL EQUIVALENTS DATA-SHEET PARAMETER VO |VOD1| |VOD2| |VOD3| |VOD| VOC |VOC| IOS IO | |Vt| |Vt| | |Vos| |Vos Vos| |Isa|, |Isb| |Ixa|, |Ixb| Iia, Iib TIA/EIA-422-B Voa, Vob Vo Vt (RL = 100 ) TIA/EIA-485-A Voa, Vob Vo Vt (RL = 54 ) Vt ( (test termination measurement 2) | |Vt |Vt| | |Vos| |Vos Vos|
RECEIVER SECTION electrical characteristics over recommended ranges of common-mode input voltage, supply voltage, and operating free-air temperature (unless otherwise noted)
PARAMETER VIT+ VIT Vhys VIK VOH VOL IOZ II IIH IIL rI IOS ICC Positive-going input threshold voltage Negative-going input threshold voltage Input hysteresis voltage (VIT+ VIT) Enable Input clamp voltage High-level High level output voltage Low-level Low level output voltage High-impedance-state output current Line input current High-level enable input current Low-level enable input current Input resistance Short-circuit output current Supply current (total package) No load Outputs enabled Outputs disabled II = 18 mA VID = 200 mV, , See Figure 2 VID = 200 mV, , See Figure 2 VO = 0.4 V to 2.4 V Other input = 0 V, , See Note 7 VIH = 2.7 V VIL = 0.4 V VI = 12 V 12 15 42 26 85 55 35 VI = 12 V VI = 7 V IOH = 400 µ , µA, IOL = 8 mA, , 2.7 27 0.45 0 45 ±20 1 0.8 20 100 VO = 2.7 V, VO = 0.5 V, TEST CONDITIONS IO = 0.4 mA IO = 8 mA MIN 0.2 50 1.5 TYP MAX 0.2 UNIT V V mV V V V µA mA µA µA k mA mA
All typical values are at VCC = 5 V, TA = 25°C. The algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for common-mode input voltage and threshold voltage levels only. NOTE 7: This applies for both power on and power off. Refer to EIA Standard TIA/EIA-485-A for exact conditions.
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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101D JULY 1985 REVISED APRIL 2003
switching characteristics, VCC = 5 V, CL = 15 pF, TA = 25°C
PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation delay time, low- to high-level output Propagation delay time, high- to low-level output Output enable time to high level Output enable time to low level Output disable time from high level Output disable time from low level TEST CONDITIONS VID = 0 to 3 V, See Figure 6 V See Figure 7 See Figure 7 MIN TYP 21 23 10 12 20 17 MAX 35 35 20 20 35 25 UNIT ns ns ns
PARAMETER MEASUREMENT INFORMATION
RL VOD2 2 RL 2 VOC
VID VOH VOL +IOL IOH
Figure 1. Driver VOD and VOC
Figure 2. Receiver VOH and VOL
3V Input CL = 50 pF (see Note A) Output Output 50% 10% 1.5 V 1.5 V 0V td(OD) 90% td(OD) 2.5 V 50% 10% 2.5 V tt(OD)
Generator (see Note B)
50 3V
RL = 54
tt(OD) TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, tr 6 ns, tf 6 ns, ZO = 50 .
Figure 3. Driver Test Circuit and Voltage Waveforms
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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101D JULY 1985 REVISED APRIL 2003
PARAMETER MEASUREMENT INFORMATION
Output S1 0 V or 3 V CL = 50 pF (see Note A) Generator (see Note B) 50 RL = 110 tPZH Output 2.3 V tPHZ VOLTAGE WAVEFORMS 0.5 V VOH Voff 0 V Input 1.5 V 1.5 V 0V 3V
TEST CIRCUIT
NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, tr 6 ns, tf 6 ns, ZO = 50 .
Figure 4. Driver Test Circuit and Voltage Waveforms
5V RL = 110 Output tPZL tPLZ 5V 0.5 V VOL TEST CIRCUIT VOLTAGE WAVEFORMS 3V Input 1.5 V 1.5 V 0V
S1 3 V or 0 V CL = 50 pF (see Note A) Generator (see Note B) 50
Output
2.3 V
NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, tr 6 ns, tf 6 ns, ZO = 50 .
Figure 5. Driver Test Circuit and Voltage Waveforms
3V Input Generator (see Note B) 51 1.5 V Output CL = 15 pF (see Note A) tPLH Output tPHL VOH 1.3 V 1.3 V VOL TEST CIRCUIT VOLTAGE WAVEFORMS 1.5 V 1.5 V 0V
0V
NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, tr 6 ns, tf 6 ns, ZO = 50 .
Figure 6. Receiver Test Circuit and Voltage Waveforms
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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101D JULY 1985 REVISED APRIL 2003
PARAMETER MEASUREMENT INFORMATION
1.5 V 1.5 V CL = 15 pF (see Note A) S1 2 k S2 5V
5 k
1N916 or Equivalent
Generator (see Note B)
50 S3 TEST CIRCUIT
3V Input 1.5 V 0V tPZH VOH Output 1.5 V 0V Output 1.5 V S1 to 1.5 V S2 Open S3 Closed Input
3V 1.5 V S1 to 1.5 V 0 V S2 Closed S3 Open 4.5 V VOL
tPZL
3V Input 1.5 V 0V tPHZ 0.5 V Output 1.3 V VOLTAGE WAVEFORMS VOH Output 0.5 V tPLZ S1 to 1.5 V S2 Closed S3 Closed Input 1.5 V
3V S1 to 1.5 V S2 Closed S3 Closed 0V
1.3 V VOL
NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, tr 6 ns, tf 6 ns, ZO = 50 .
Figure 7. Receiver Test Circuit and Voltage Waveforms
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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101D JULY 1985 REVISED APRIL 2003
TYPICAL CHARACTERISTICS
DRIVER DRIVER
HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
5 VOH VOH High-Level Output Voltage V 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 40 60 80 100 IOH High-Level Output Current mA 20 120 VCC = 5 V TA = 25°C VOL Low-Level Output Voltage V 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0
LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
VCC = 5 V TA = 25°C
20 40 60 80 100 IOL Low-Level Output Current mA
120
Figure 8
DRIVER
Figure 9
DIFFERENTIAL OUTPUT VOLTAGE vs OUTPUT CURRENT
4 VCC = 5 V TA = 25°C
VOD VOD Differential Output Voltage V
3.5 3 2.5 2 1.5 1 0.5 0
0
10
20
30 40 50 60 70 80 IO Output Current mA
90 100
Figure 10
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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101D JULY 1985 REVISED APRIL 2003
TYPICAL CHARACTERISTICS
RECEIVER RECEIVER
HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
5 4.5 VOH VOH High-Level Output Voltage V 4 3.5 3 2.5 2 1.5 1 0.5 0 0 5 10 15 20 25 30 35 40 45 50 IOH High-Level Output Current mA VCC = 4.75 V VCC = 5.25 V VCC = 5 V VOH VOH High-Level Output Voltage V VID = 0.2 V TA = 25°C
HIGH-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE
5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 40 VCC = 5 V VID = 200 mV IOH = 440 µA
20
0
20
40
60
80
100
120
TA Free-Air Temperature °C Only the 0°C to 70°C portion of the curve applies to the SN75176B.
Figure 11
RECEIVER
Figure 12
RECEIVER
LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
0.6 VOL VOL Low-Level Output Voltage V VOL VOL Low-Level Output Voltage V VCC = 5 V TA = 25°C 0.5 0.6
LOW-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE
VCC = 5 V VID = 200 mV IOL = 8 mA
0.5
0.4
0.4
0.3
0.3
0.2
0.2
0.1
0.1
0 0 5 10 15 20 25 30 IOL Low-Level Output Current mA
0 40
20
0
20
40
60
80
100
120
TA Free-Air Temperature °C
Figure 13
Figure 14
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SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS101D JULY 1985 REVISED APRIL 2003
TYPICAL CHARACTERISTICS
RECEIVER RECEIVER
OUTPUT VOLTAGE vs ENABLE VOLTAGE
5 VID = 0.2 V Load = 8 k to GND TA = 25°C 6
OUTPUT VOLTAGE vs ENABLE VOLTAGE
VCC = 5.25 V VID = 0.2 V Load = 1 k to VCC TA = 25°C VCC = 5 V
4 VO VO Output Voltage V
VCC = 5.25 V VO VO Output Voltage V
5 VCC = 4.75 V 4
3
VCC = 5 V
VCC = 4.75 V
3
2
2
1
1
0 0 0.5 1 1.5 2 2.5 3 VI Enable Voltage V
0 0 0.5 1 1.5 2 2.5 3 VI Enable Voltage V
Figure 15
Figure 16
APPLICATION INFORMATION
SN65176B SN75176B RT RT SN65176B SN75176B
Up to 32 Transceivers
NOTE A: The line should be terminated at both ends in its characteristic impedance (RT = ZO). Stub lengths off the main line should be kept as short as possible.
Figure 17. Typical Application Circuit
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MECHANICAL DATA
MPDI001A JANUARY 1995 REVISED JUNE 1999
P (R-PDIP-T8)
0.400 (10,60) 0.355 (9,02) 8 5
PLASTIC DUAL-IN-LINE
0.260 (6,60) 0.240 (6,10)
1
4 0.070 (1,78) MAX 0.325 (8,26) 0.300 (7,62) 0.015 (0,38) 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.010 (0,25) NOM Gage Plane
0.020 (0,51) MIN
0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.010 (0,25) M
0.430 (10,92) MAX
4040082/D 05/98 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
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