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A B C D E
Page
01
Title of schematic page
Page List
Rev.
1A
Date Page
42
Title of schematic page
HOLE/EMI/KB
Rev.
1A
Date 1
02 Block Diagram 1A 43 AUDIO Woofer 1A
03 Change List 1A 44 IO PORT LIST 1A
04 IVY 1/4(HOST&PCIE) 1A 1A
4 4
05 IVY 2/4(DDR3 I/F) 1A * : No mount
L@ : For LVDS output
06 IVY 3/4(POWER) 1A D@ : For eDP output
E@ : For DIS GFX
07 IVY 4/4(GND/Strap) 1A I@ : For UMA
08 PCH 1/6(DMI/FDI/VIDEO) 1A
09 PCH 2/6(SATA/RTC/HDA/LPC) 1A
10 PCH 3/6(PCIE/USB/CLK/NV) 1A
11 PCH 4/6(GPIO/CPU/STRAP) 1A
12 PCH 5/6(POWER) 1A
13 PCH 6/6 (GND) 1A
14 DDR3 DIMM-0-STD 1A
3 3
15 DDR3 DIMM-1-STD 1A
16 WPCE985L & FLASH 1A
17 LVDS/CAMERA 1A
18 CARD READER(RTS5209) 1A
19 HDMI/THERMAL 1A
20 USB 1A
21 LAN (RTL8111GS) 1A
22 WLAN/KB-BL 1A
23 HDD/ODD/G-SENSOR/TP/FAN 1A
24 Audio ALC233-CG 1A
2
25 LED/PS/DMIC 1A 2
26 POWER +VCC_CORE (ISL95835) 1A
27 POWER 3VPCU&RVCC5(PM6686) 1A
28 POWER 1.5VSUS/VTT_MEM 1A
29 POWER +1.05V(G5602R41U)-15A 1A
30 POWER VCCSA/VCCIO 1A
31 POWER VCC1.8/Thermal 1A
32 POWER(BAT IN / ADA IN/ UL) 1A
33 POWER CHARGER (ISL88731C) 1A
34 POWER VGA_CORE( RT8812A) 1A
35 POWER VCC1.5_VRAM/1.05V 1A
1 1
36 NVIDIA N14 GB2-64 PCIE 1A
1/4
37 NVIDIA N14 GB2-64 TMDS 2/4 1A
38 NVIDIA N14 GB2-64 VRAM 3/4 1A
39 NVIDIA N14 GB2-64 VRAM 4/4 1A
A B C D E
5 4 3 2 1
Chief River ULV BLOCK DIAGRAM 02
intel
Nvidia VRAM
PCI-E
PCIE3 1GB / 2GB
D
DDR3L : 1.35V Ivy Bridge X16
D
DDR3 : 1.5V 5GT/s N14P-GV2 P36 ~ P39 P38~P39
Dual Channel
MEMORY
SYSTEM
P14~P15
BGA1023
DDR
(31mm X 24mm)
FDI DMI
TOUCH P17 P4~P7
SCREEN PORT8
FDI
DMI
X8 X4
Camera P17 2.7GT/s 5GT/s
PORT10
FDI DMI
P23 HDD SATA0 intel
Interfaces
SATA Gen3 LVDS/eDP
6Gb/s
C
WiMax/BT P22 C
iGFX
P17
PORT9 P23 ODD SATA3 SATA Gen2
3Gb/s HDMI
USB I/O P20 USB 2.0
PORT3 P19
USB I/O P20
PORT2 Panther Point
USB I/O P20 USB
PCIE4
5GT/s PCI-Express Gen2
PORT1
PCIE3
PCIE1
USB I/O P20 USB 3.0
PORT0
mBGA25mm)
(25mm X
989
I2C Giga-LAN
NFC Card Reader
RTL8111GS
Azalia HDA P21 RTS5209
B B
P18
RJ45
SPI
P8~P13
SD-XC
WLAN/BT P21
LPC
Audio CODEC
SPI ROM P21
ALC233-CG 8MB P9
P24
Power LED Button
Sleep LED ASSIST#
EC
MIC Jack
HP Jack
SATA LED Power SW
SPK
DMIC
NPCE985L
Battery LED
A
Touch Pad CAPSLED A
P23
NUMLED
Keyboard
P24 P24 P42
P24 P24 P16
5 4 3 2 1
5 4 3 2 1
Change List
MB_SCH_PVT_001
P22-Add R333 0_6S.
03
P22- U15 don't mount
P22-Add Q32(2N7002).
P22-Add R335(100K_4).
Reason : Modify circuit for KB Backlight.
Possible Risk: No.
D
MB_SCH_PVT_002 D
P23-CON11.11 delete net"DATA_ODD_DA#
P10-U17.G40 delete net"SATA_ODD_DA#".
P10-Delete R64(10K_4).
Reason : Modify circuit for Zero Power ODD.
Possible Risk: No.
MB_SCH_PVT_002
P08-ADD 0.1UF on "PCH_PWROK_EC"
Reason : Modify circuit for ESD.
Possible Risk: No.
C C
B B
A A
Quanta Computer Inc.
PROJECT :Chief River
Size Document Number Rev
Change List 1A
Date: Thursday, January 17, 2013 Sheet 3 of 41
5 4 3 2 1
5 4 3 2 1
Ivy Bridge Processor (CLK,MISC,JTAG)
Ivy Bridge Processor (DMI,PEG,FDI)
U16A
PEG_ICOMPI G3 PEG_COMP R224 24.9/F_4
+1.05V
U16B
BCLK J3 CLK_CPU_BCLKP (10)
04
PEG_ICOMPO G1 BCLK# H2 CLK_CPU_BCLKN (10)
CLOCKS
MISC
(8) DMI_TXN0 M2 DMI_RX#[0] PEG_RCOMPO G4
P6 F49 R241 L@1K_4
(8) DMI_TXN1 DMI_RX#[1] (9) H_SNB_IVB# PROC_SELECT#
(8) DMI_TXN2 P1 DMI_RX#[2] DPLL_REF_CLK AG3 DPLL_REF_CLKP (10)
(8) DMI_TXN3 P10 DMI_RX#[3] PEG_RX#[0] H22 DPLL_REF_CLK# AG1 DPLL_REF_CLKN (10)
J21 SKTOCC# C57
PEG_RX#[1] TP5 PROC_DETECT#
N3 B22 R240 L@1K_4
(8) DMI_TXP0 DMI_RX[0] PEG_RX#[2] +1.05V
(8) DMI_TXP1 P7 DMI_RX[1] PEG_RX#[3] D21
DMI
D (8) DMI_TXP2 P3 DMI_RX[2] PEG_RX#[4] A19 D
(8) DMI_TXP3 P11 DMI_RX[3] PEG_RX#[5] D17
B14 TP_CATERR# C49
PEG_RX#[6] TP26 CATERR#
(8) DMI_RXN0 K1 DMI_TX#[0] PEG_RX#[7] D13
THERMAL
(8) DMI_RXN1 M8 DMI_TX#[1] PEG_RX#[8] A11 PEG_RXN7 (36)
(8) DMI_RXN2 N4 DMI_TX#[2] PEG_RX#[9] B10 PEG_RXN6 (36)
(8) DMI_RXN3 R2 DMI_TX#[3] PEG_RX#[10] G8 PEG_RXN5 (36) (16) EC_PECI A48 PECI SM_DRAMRST# AT30 CPU_DRAMRST# (5)
PEG_RX#[11] A8 PEG_RXN4 (36)
(8) DMI_RXP0 K3 DMI_TX[0] PEG_RX#[12] B6 PEG_RXN3 (36)
M7 H8 BF44 SM_RCOMP_0 R263 140/F_4
DDR3
MISC
(8) DMI_RXP1 DMI_TX[1] PEG_RX#[13] PEG_RXN2 (36) SM_RCOMP[0]
P4 E5 H_PROCHOT# R218 56/J_4 H_PROCHOT#_R C45 BE43 SM_RCOMP_1 R261 25.5/F_4
(8) DMI_RXP2 DMI_TX[2] PEG_RX#[14] PEG_RXN1 (36) PROCHOT# SM_RCOMP[1]
T3 K7 BG43 SM_RCOMP_2 R262 200/F_4
(8) DMI_RXP3 DMI_TX[3] PEG_RX#[15] PEG_RXN0 (36) SM_RCOMP[2]
PEG_RX[0] K22
PEG_RX[1] K19 (7,11) PM_THRMTRIP# D45 THERMTRIP#
PEG_RX[2] C21
(8) FDI_TXN0 U7 FDI0_TX#[0] PEG_RX[3] D19
W11 C19 N53
PCI EXPRESS -- GRAPHICS
(8) FDI_TXN1 FDI0_TX#[1] PEG_RX[4] PRDY#
(8) FDI_TXN2 W1 FDI0_TX#[2] PEG_RX[5] D16 PREQ# N55
(8) FDI_TXN3 AA6 FDI0_TX#[3] PEG_RX[6] C13
W6 D12 L56 XDP_TCLK R222 51/J_4
(8) FDI_TXN4 FDI1_TX#[0] PEG_RX[7] TCK
V4 C11 L55 XDP_TMS R226 51/J_4
(8) FDI_TXN5 FDI1_TX#[1] PEG_RX[8] PEG_RXP7 (36) TMS +1.05V
Y2 C9 C395 *47P/50V/NPO_4 J58 XDP_TRST# R221 51/J_4
(8) FDI_TXN6 FDI1_TX#[2] PEG_RX[9] PEG_RXP6 (36) TRST#
PWR MANAGEMENT
(8) FDI_TXN7 AC9 FDI1_TX#[3] PEG_RX[10] F8 PEG_RXP5 (36)
JTAG & BPM
C8 R219 0_4 C48 M60 XDP_TDI_R R228 51/J_4
PEG_RX[11] PEG_RXP4 (36) (8) PM_SYNC PM_SYNC TDI +1.05V
Intel(R) FDI
C5 L59 XDP_TDO_R R227 51/J_4
PEG_RX[12] PEG_RXP3 (36) TDO
U6 H6 C390 0.1U/10V/X5R_4
(8) FDI_TXP0 FDI0_TX[0] PEG_RX[13] PEG_RXP2 (36)
(8) FDI_TXP1 W10 FDI0_TX[1] PEG_RX[14] F6 PEG_RXP1 (36)
W3 K6 R207 22/J_4 B46
C
(8) FDI_TXP2 FDI0_TX[2] PEG_RX[15] PEG_RXP0 (36) (11) H_PWRGOOD UNCOREPWRGOOD C
(8) FDI_TXP3 AA7 FDI0_TX[3] DBR# K58 XDP_DBRST# (8)
W7 G22 R208 10K/J_4
(8) FDI_TXP4 FDI1_TX[0] PEG_TX#[0]
(8) FDI_TXP5 T4 FDI1_TX[1] PEG_TX#[1] C23
AA3 D23 PM_DRAM_PWRGD_R BE45 G58
(8) FDI_TXP6 FDI1_TX[2] PEG_TX#[2] SM_DRAMPWROK BPM#[0]
(8) FDI_TXP7 AC8 FDI1_TX[3] PEG_TX#[3] F21 BPM#[1] E55
PEG_TX#[4] H19 BPM#[2] E59
(8) FDI_FSYNC0 AA11 FDI0_FSYNC PEG_TX#[5] C17 BPM#[3] G55
(8) FDI_FSYNC1 AC12 FDI1_FSYNC PEG_TX#[6] K15 BPM#[4] G59
F17 CPU_PLTRST# R29 43_4 D44 H60
PEG_TX#[7] PEG_TXN7_C C79 [email protected]/10V/X5R_4 RESET# BPM#[5]
(8) FDI_INT U11 FDI_INT PEG_TX#[8] F14 PEG_TXN7 (36) BPM#[6] J59
A15 PEG_TXN6_C C70 [email protected]/10V/X5R_4 R30 75/J_4 J61
PEG_TX#[9] PEG_TXN6 (36) +1.05V BPM#[7]
AA10 J14 PEG_TXN5_C C68 [email protected]/10V/X5R_4
(8) FDI_LSYNC0 FDI0_LSYNC PEG_TX#[10] PEG_TXN5 (36)
AG8 H13 PEG_TXN4_C C81 [email protected]/10V/X5R_4
(8) FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] PEG_TXN4 (36)
M10 PEG_TXN3_C C71 [email protected]/10V/X5R_4
PEG_TX#[12] PEG_TXN3 (36)
F10 PEG_TXN2_C C83 [email protected]/10V/X5R_4 C77 0.1U/10V/X5R_4
PEG_TX#[13] PEG_TXN2 (36)
D9 PEG_TXN1_C C73 [email protected]/10V/X5R_4
PEG_TX#[14] PEG_TXN1 (36)
J4 PEG_TXN0_C C75 [email protected]/10V/X5R_4
PEG_TX#[15] PEG_TXN0 (36)
AF3 IC,IVB_2CBGA,0P7
R239 24.9/F_4 eDP_COMP eDP_COMPIO
+1.05V AD2 eDP_ICOMPO PEG_TX[0] F22
AG11 eDP_HPD# PEG_TX[1] A23
(17) eDP_HPD PEG_TX[2] D24
R118 1K/J_4 E21
+1.05V PEG_TX[3]
(17) eDP_AUX# AG4 eDP_AUX# PEG_TX[4] G19
(17) eDP_AUX AF4 eDP_AUX PEG_TX[5] B18
PEG_TX[6] K17
eDP
PEG_TX[7] G17
AC3 E14 PEG_TXP7_C C80 [email protected]/10V/X5R_4
(17) eDP_TX0# eDP_TX#[0] PEG_TX[8] PEG_TXP7 (36)
AC4 C15 PEG_TXP6_C C69 [email protected]/10V/X5R_4
(17) eDP_TX1# eDP_TX#[1] PEG_TX[9] PEG_TXP6 (36)
AE11 K13 PEG_TXP5_C C67 [email protected]/10V/X5R_4
B eDP_TX#[2] PEG_TX[10] PEG_TXP5 (36) B
AE7 G13 PEG_TXP4_C C82 [email protected]/10V/X5R_4
eDP_TX#[3] PEG_TX[11] PEG_TXP4 (36)
K10 PEG_TXP3_C C72 [email protected]/10V/X5R_4
PEG_TX[12] PEG_TXP3 (36)
AC1 G10 PEG_TXP2_C C84 [email protected]/10V/X5R_4
(17) eDP_TX0 eDP_TX[0] PEG_TX[13] PEG_TXP2 (36)
AA4 D8 PEG_TXP1_C C74 [email protected]/10V/X5R_4
(17) eDP_TX1 eDP_TX[1] PEG_TX[14] PEG_TXP1 (36)
AE10 K4 PEG_TXP0_C C76 [email protected]/10V/X5R_4
eDP_TX[2] PEG_TX[15] PEG_TXP0 (36) +3V_S5
AE6 eDP_TX[3]
IC,IVB_2CBGA,0P7
+1.05V
R33
1K/J_4
CPU_PLTRST# R22
PLTRST# (10,16,18,21,22)
62_4
6
2
3
5
H_PROCHOT#
H_PROCHOT# (26)
3
Q5
2N7002DW
2 C78
+1.5V_CPU (16) PROCHOT
Q4 47P/50V/NPO_4
1
4
+3V_S5 2N7002W(SOT323)
SNB_IVB#:
C233 0.1U/10V/X5R_4 R23
1
- It is NC when using Sandy Bridge.(1.05V)
A - For next generation processor it will be grounded in package.(1.0V) R123 *100K/F_4 A
5
200/F_4
(16,26,28,30,31) ALL_SYS_PWRGD 2
U18 4 R122 130/F_4 PM_DRAM_PWRGD_R
1 74AHC1G09
FDI Disabling (Discrete Only) (8) PM_DRAM_PWRGD
-FDI_FSYNC (J18/J17/J19/H17) can gang all these Quanta Computer Inc.
3
4 signals together and tie them with only one
1K resistor to GND (DG V0.5 Ch2.2.9). PROJECT :Chief River
Size Document Number Rev
- FDI_INT connect to GND with 1K ohm. 1A
1.Level 1 Environment-related Substances Should Never be Used. SNB/IVB 1/4
2.Recycled Resin and Coated Wire should be procured from Green Partners. Date: Thursday, January 17, 2013 Sheet 4 of 41
5 4 3 2 1
5 4 3 2 1
Ivy Bridge Processor (DDR3)
05
(15) M_B_DQ[63:0]
U16C U16D
(14) M_A_DQ[63:0]
M_A_DQ0 AG6 M_B_DQ0 AL4
M_A_DQ1 SA_DQ[0] M_B_DQ1 SB_DQ[0]
AJ6 SA_DQ[1] SA_CK[0] AU36 M_A_CLKP0 (14)