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A GREAT ER M EA SU R E O F C O N F I D E N C E (TEGs) will be covered in a subsequent
article.
2. Particularly for new device technologies,
it's essential to establish a measurement
baseline using sequential testing prior to
implementing parallel test. Variations in
device performance are more common
with new technologies than with existing
ones. Given that one of the objectives of
parametric testing is to understand where
the variations in the process are and then
to reduce them through the development
process, it's critical to establish this
sequential test baseline; parallel testing
may introduce additional variations as
Implementation
a result of either tester timing or device
interference. Without a sequential test
baseline for comparison, it's impossible to
of Wafer Level
distinguish between "new device" varia-
tions and "parallel test" variations. When
using a Keithley parametric test systems
Parallel Test the company's pt_execute software pro-
vides a toolset and coding method for
parallel test that allows switching from
sequential to parallel testing quickly
and easily. It also manages test resource
randall Lee allocation.
Keithley Instruments, Inc. 3. For new processes, the best time to turn
P
parallel test "on" is at the beginning of
araLLeL parametric test is an increasing the number of measured param- a volume ramp. This strategy offers the
emerging strategy for wafer-level eters even when continuing to test existing greatest bang for the investment buck by
testing that involves concurrent structures. reducing the number of testers needed as
execution of multiple tests on the product goes into volume production.
multiple scribe line test struc- Planning For Parallel Test Note: It is best to learn how to use par-
tures. It offers a relatively inexpensive way Parallel Test Candidates