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A B C D E




1




Compal confidential 1




Schematics Document
Mobile Penryn uFCPGA with Intel
2 Cantiga_GM+ICH9-M SFF core logic 2




Fossil
2009-02-03
3 3




4 4




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/02/13 Deciphered Date 2006/03/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-5221P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 03, 2009 Sheet 1 of 45
A B C D E
A B C D E



Compal confidential
File Name : LA-5221P Fossil
CK505 Accelerometer
Thermal Sensor Mobile Penym
1
EMC1402 LV/ULV Dual Core Clock Generator LIS302DLTR 1


uFCPGA-956 CPU - SFF ICS9LPRS397
page 4 page 25
page 15
page 4,5,6,7

Fan Conn
page 4 H_A#(3..35) FSB
H_D#(0..63)
667/800/1066MHz 1.05V




Display Port
Intel Cantiga GS DDR3 800MHz 1.5V
DDR3-SO-DIMM X 1
page 16 BANK 0, 1, 2, 3 page 14
FCBGA 1363 - SFF Singal Channel
LCDpage 17
conn
page 8,9,10,11,12,13

2
WWAN Card 2



USB x1 USB2.0 BT(SoftBreeze) Conn USB x 1
DMI X4 page 30
page 25

USB conn x 1(For I/O)
PCI-E BUS USB2.0 page 30

USB2.0
Intel ICH9-M Azalia
USB conn x 2(For I/O)
SATA0 daughter board
10/100/1000 LAN WLAN Card WBMMAP-569 - SFF page 28
PCIE x1 page 19,20,21,22
Marvelle 88E8072 USB x1(Camara)
page 26
CardReader Controller page 17
page 23
RealTek RTS5159 Audio CKT TPA6047
SPI
92HD75B2 page 27 AMP & Audio Jack page 28
24HST1041A-3
3 RJ45 CONN 2.5" SATA HDD Connector
3

page 24
SPI ROM OR
SD/MMC Slot MXIC/MX25L1605AM2C-12G SO8 (2MB) NAND Flash module(SSD)
page 20
LED LPC BUS or
page 18 WINBOND/W25X16-VSSIG(2MB)
page 31


RTC CKT. daughter board
page 20 SMSC KBC 1091
page 32

Power OK CKT.
page 33 Touch Pad CONN. Int.KBD
page 29 page 29

4 4
Power On/Off CKT.
page 34


Security Classification Compal Secret Data Compal Electronics, Inc.
2006/02/13 2006/03/10 Title
DC/DC Interface CKT. Issued Date Deciphered Date
Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
page 34 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-5221P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 03, 2009 Sheet 2 of 45
A B C D E
A




( O MEANS ON X MEANS OFF )
Voltage Rails
Symbol Note :
+B +5VALW +1.8V +5VS
+3VL +3VALW +3VS
+1.5VS : means Digital Ground
power
plane +0.9V
+VCCP ZZZ1

+CPU_CORE : means Analog Ground

@ : means just reserve , no build PCB-MB
CONN@ : means ME part.
State 45@ : means install after SMT.
U1



ULV723@ mean CPU ULV723 (U1) for L01
SU9300@ mean CPU SU9300 (U1) for L02 CPU
SU9300@


S0
O O O O
S1
O O O O
S3
O O O X
S5 S4/AC
O O X X
S5 S4/ Battery only
O X X X
S5 S4/AC & Battery
1
don't exist X X X X 1




SMBUS Control Table


SERIAL THERMAL
SOURCE INVERTER BATT EEPROM SENSOR SODIMM CLK CHIP MINI CARD LCD
(CPU)

SMB_EC_CK1
SMB_EC_DA1
KB926 X V V X X X X X
SMB_EC_CK2
SMB_EC_DA2
KB926 X X X V X X X X
SMB_CK_CLK1
I2C / SMBUS ADDRESSING SMB_CK_DAT1 ICH9 X X X X V V V X
DEVICE HEX ADDRESS LCD_CLK
LCD_DAT Cantiga
X X X X X X X V
DDR SO-DIMM 0 A0 10100000
CL OCK GENERATOR (EXT.) D2 11010010
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/03/10 Deciphered Date 2006/03/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-5221P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Date: Tuesday, February 03, 2009 Sheet 3 of 45
5 4 3 2 1




XDP Connector +VCCP


XDP_TDI R1 1 2 54.9_0402_1%

XDP_TMS R2 1 2 54.9_0402_1%
PAD TP10 XDP_BPM#4
XDP_TDO R3 1 2 54.9_0402_1%
PAD TP11 XDP_BPM#3
PAD TP12 XDP_BPM#2 XDP_BPM#5 R4 1 2 54.9_0402_1%

PAD TP13 XDP_BPM#1 PAD TP16 XDP_HOOK1 R5 1 2 @ 54.9_0402_1%
PAD TP14 XDP_BPM#0
D XDP_TRST# R6 54.9_0402_1% D
1 2
TP22
PAD XDP_TCK R7 54.9_0402_1%
Place close to U1. 1 2

PAD TP15 TP17 PAD
+VCCP This shall place near CPU
TP18 PAD
<8> H_A#[3..16]
U1A 02/03 R8 TP19 PAD
H_A#3 P2 M4 1K_0402_5%
H_A#4 A[3]# ADS# H_ADS# <8> install-->@
V4 J5 H_BNR# <8> <5,20> H_PWRGOOD 2 1 H_PWRGOOD_R CLK_CPU_XDP <15>
H_A#5 A[4]# BNR#
W1 L5 H_BPRI# <8> CLK_CPU_XDP# <15>
A[5]# BPRI#




2



2
56_0402_5%
H_A#6 T4
A[6]#




ADDR GROUP 0
H_A#7 AA1 N5 R10 H_RESET#_R 1 R11 2 1K_0402_5% H_RESET#
H_A#8 A[7]# DEFER# H_DEFER# <8> XDP_DBRESET#
AB4 F38 51_0402_1%
A[8]# DRDY# H_DRDY# <8>
H_A#9 T2 J1
A[9]# DBSY# H_DBSY# <8> @




R9
H_A#10 AC5 TP20 PAD




1



1
H_A#11 A[10]#




CONTROL
AD2 M2 H_BR0# <8>
H_A#12 A[11]# BR0#
AD4
H_A#13 A[12]#
AA5 A[13]# IERR# B40
H_A#14 AE5 D8 R12
H_A#15 A[14]# INIT# H_INIT# <20>
AB2 0_0402_5%
H_A#16 A[15]# PAD TP21 XDP_PRE#
AC1 A[16]# LOCK# N1 H_LOCK# <8> 1 2
<8> H_ADSTB#0 Y4
ADSTB[0]# H_RESET#
RESET# G5 H_RESET# <8>
<8> H_REQ#0 R1 REQ[0]# RS[0]# K2 H_RS#0 <8>
<8> H_REQ#1 R5 REQ[1]# RS[1]# H4 H_RS#1 <8>
<8> H_REQ#2 U1 REQ[2]# RS[2]# K4 H_RS#2 <8>
<8> H_REQ#3 P4 L1 H_TRDY# <8>
REQ[3]# TRDY#
<8> H_REQ#4 W5
REQ[4]#
H2
C
<8> H_A#[17..35] H_A#17
H_A#18
AN1
AK4
A[17]#
HIT#
HITM# F2
H_HIT# <8>
H_HITM# <8> PWM Fan Control circuit 12/22 Follow consumer design C
H_A#19 A[18]# XDP_BPM#0
AG1 A[19]# BPM[0]# AY8
ADDR GROUP 1




H_A#20 AT4 BA7 XDP_BPM#1
H_A#21 A[20]# BPM[1]# XDP_BPM#2
AK2 A[21]# BPM[2]# BA5
H_A#22 AT2 AY2 XDP_BPM#3 R13
H_A#23 A[22]# BPM[3]# XDP_BPM#4 0_0402_5% +5VS
AH2 AV10
XDP/ITP SIGNALS




H_A#24 A[23]# PRDY# XDP_BPM#5_R XDP_BPM#5
AF4 A[24]# PREQ# AV2 1 2
H_A#25 AJ5 AV4 XDP_TCK
H_A#26 A[25]# TCK XDP_TDI
AH4 AW7
A[26]# TDI




1
H_A#27 AM4 AU1 XDP_TDO
H_A#28 A[27]# TDO XDP_TMS
AP4 AW5
H_A#29 A[28]# TMS XDP_TRST# 0_0603_5%
AR5 AV8
H_A#30 A[29]# TRST# XDP_DBRESET# R892
AJ1 J7 XDP_DBRESET# <21>
H_A#31 A[30]# DBR#
AL1




2
H_A#32 A[31]#
AM2 A[32]#
H_A#33 AU5 THERMAL Place Close to U1. +VCCP +3VS
A[33]# C3
H_A#34 AP2
H_A#35 A[34]# H_PROCHOT# R14
AR1 A[35]# PROCHOT# D38 1 2 68_0402_5% 1 2
AN5 BB34 H_THERMDA @ 0.1U_0402_10V6K
<8> H_ADSTB#1 ADSTB[1]# THERMDA




5
BD34 H_THERMDC U50 JP2
THERMDC
C7 2 1 FAN_PWM_R 1 1 1




P
<20> H_A20M# A20M# <32> FAN_PWM INB
D4 B10 H_THERMTRIP# R890 3K_0402_5% 4 2 1 2 2 G1 4
<20> H_FERR# FERR# THERMTRIP# H_THERMTRIP# <8,20> O
ICH




F10 2 R891 2.2K_0402_5% 3 3 G2 5
<20> H_IGNNE# IGNNE# INA




G
H_THERMDA, H_THERMDC routing together, for RF, HP 12/10
F8 TC7SH00FU_SSOP5 ACES_85204-03001




3
<20> H_STPCLK# STPCLK# Trace width / Spacing = 10 / 10 mil
C9 H CLK conn@
<20> H_INTR LINT0 +VCCP +3VS
<20> H_NMI C5 LINT1 BCLK[0] A35 CLK_CPU_BCLK <15>
<20> H_SMI# E5 C35 CLK_CPU_BCLK# <15>
SMI# BCLK[1]




2
V2
RSVD01 R896
Y2
RSVD02
AG5 RSVD03 01/11 HP review 10K_0402_5%
RESERVED




B B
AL5 RSVD04 Del R15 and R16(short short net)




2
B
J9 Q21




1
RSVD05
F4
RSVD06




E


C
H8 H_PROCHOT# 3 1
RSVD07 <42> H_PROCHOT#
12/22 HP review PMBT3904_SOT23
Remove test point


PENRYN SFF_UFCBGA956 External Thermal Sensor EMC1402
ULV723@ +3VS




2
C4

0.1U_0402_16V4Z
1 U2


1 8 ICH_SM_CLK <14,15,21,25>
C5 2200P_0402_50V7K VDD SMCLK
1 2 H_THERMDA 2 7
DP SMDATA ICH_SM_DA <14,15,21,25>
H_THERMDC 3 6
DN ALERT# THERM_SCI# <21>
4 5 1 2 +3VS
THERM# GND R17 10K_0402_5%

A A
MAINPWON 1 2 EMC1402-1-ACZL-TR_MSOP8
R18 @ 0_0402_5%
H_THERMTRIP# Put the sensor colse to CPU



Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/02/13 Deciphered Date 2006/03/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Penryn(1/3)-AGTL+/ITP-XDP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-5221P 0.1
MAY BE USED BY OR DISCLOSED TO ANY T