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DID II
Accessory Development Guide
HP 9000 Series 300 Computers
Models 330/350
HP Part Number 98562-90010
FhOW HEWLETT
a:~ PACKARD
Hewlett-Packard Company
3404 East Harmony Road, Fort Collins, Colorado 80525
NOTICE
The Information contained In this document IS subject to change without notice
HEWLETT-PACKARD MAKES NO WARRANTY OF ANY KIND WITH REGARD TO THIS MANUAL, INCLUDING, BUT NOT LIMITED TO THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE Hewlett-Packard shall not be liable for errors contained herein or direct, Indirect, special,
Incidental or consequential damages In connection With the furnishing, performance, or use of this matenal
WARRANTY
A copy of the speCIfic warranty terms applicable to your Hewlett-Packard product and replacement parts can be obtained from your local Sales and Service Office
Copynght 1987 Hewlett-Packard Company
ThiS document contains propnetary Information which IS protected by copynght All nghts are reserved No part of thiS document may be photocopied, reproduced or
translated to another language Without the pnor wntten consent of Hewlett-Packard Company The Information contained In thiS document IS subject to change Without
notice
Restncted Rights Legend
Use, duplication or disclosure by the Government IS subject to restnctlons as set forth In paragraph (b)(3)(B) of the Rights In Technical Data and Software clause In
DAR 7-104 9(a)
ii
Printing History
New editions of this manual will incorporate all Inaterial updated since the previous edition.
Update packages may be issued between editions and contain replacelnent and additional pages
to be merged into the manual by the user. Each updated page will be indicated by a revision
date at the bottom of the page. A vertical bar in the margin indicates the changes on each page.
Note that pages which are rearranged due to changes on a previous page are not considered
revised.
The manual printing date and part number indicate its current edition. The printing date
changes when a new edition is printed. (Minor corrections and updates which are incorporated
at reprint do not cause the date to change.) The manual part nmnber changes when extensive
technical changes are incorporated.
February 1987 ... Edition 1
Printing History iii
iv
Table of Contents
Chapter 1: Introduction
Objectives of This Manual ................................................... 1-1
Liability and Support. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1-2
What Is Not Covered In This Document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1-3
Recommended Design Methodology .... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1-4
Chapter 2: DIO II Bus Overview
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-1
DIO II Bus Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-2
Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-3
Signal Names ............................................................. " 2-4
Interface System Elements ................................................... 2-9
Bus Subsystems ........................................................... 2-12
General Bus Timing Background. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 2-13
Chapter 3: DIO II Memory Map
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-1
DIO II Memory Map and Card Registers ....................................... 3-3
DIO II Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-3
Cached Region ......................................................... 3-4
U ncached Region ....................................................... 3-5
Uncached Region Card Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-6
DIO Memory Map and Card Registers ......................................... 3-7
DIO Memory Map ...................................................... 3-7
DIO External I/O Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-8
DIO I/O Card Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-9
Chapter 4: Data Transfers
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-1
Data Transfer Signal Names. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-2
Data Transfer Overview ..................................................... 4-4
Address and Data Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-5
Data Transfer Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-10
Bus Skew ............................................................. 4-10
Address Only Cycles ................................................... 4-10
SINGLE READ ....................................................... 4-12
Single Write. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-17
Block Transfers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-21
Read Modify Write Cycles ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-28
ENDT Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-32
Read Cycle Using ENDT ............................................... 4-33
Write Cycle Using ENDT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 4-35
Table of Contents V
Chapter 5: Bus Error
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5-1
Bus Error Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5-1
Bus Error Timing ........................................................... 5-2
Bus Timeout ............................................................... 5-2
Auto-Locate of Processor RAM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5-3
BERR for Page Faulting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5-3
Guidelines for Utilizing BERR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5-4
Chapter 6: Interrupt Operation
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6-1
Interrupt Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6-2
External Vectored Interrupt Cycle ............................................ 6-4
Autovectored Interrupt Cycle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 6-6
Chapter 7: Bus ~rbitration
Bus Arbitration Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7-1
Bus Arbitration Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7-3
Bus Arbitration Sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 7-5
Chapter 8: DMA Operation
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-1
DMA Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-2
DMA Overview ............................................................. 8-3
HP 98620 D MA Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-4
DMA Output Cycle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-5
DMA Input Cycle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-8
DMA Speed Considerations ................................................. 8-11
Terminating DMA Transfers ................................................. 8-11
Software Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-12
HP 98620B Compatible Registers ........................................ 8-13
General Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-17
CHANNEL SPECIFIC Registers ......................................... 8-19
Software Performance ...................................................... 8-23
Use of Interrupts Versus Fast Handshake. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-23
Programmable BUS Bandwidth. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 8-24
Chapter 9: DIO Bus Utilities
Bus Drive Disable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 9-1
Reset Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 9-2
Halt Operation .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 9-3
Function Code Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 9-3
vi Table of Contents
Chapter 10: Electrical Specifications
Power Distribution and Grounding. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-1
Power Supply Tolerances .................................................. " 10-2
Current Requirements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-2
DIO II Current Requirements ........................................... 10-2
DIO I/O Card Current Requirements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-3
On-Card Fuse Specification ................................................. 10-3
Signal Loading ............................................................ 10-4
DIO II Signal Loading. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-4
DIO Signal Loading ....... : . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 10-5
Chapter 11: Mechanical Specifications
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 11-1
DIO II Boards and DIO Card Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 11-2
DIO II (System) Boards ................................................ 11-2
DIO Cards. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 11-6
Cardcage Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 11-9
DIO II (System) Cardcage Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 11-9
DIO Cardcage Specifications ........................................... 11-10
Minimizing RFI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 11-11
PC Layout Rules ......................................................... 11-12
DIO II Pin Assignment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 11-12
DIO II (System) Boards ............................................... 11-12
DIO Cards. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 11-15
Chapter 12: Operation In The HP 9888A Bus Expander
Features Of The Bus Expander. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 12-1
Operating Limitations In The Bus Expander ., . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 12-2
Chapter 13: Bus Slave Design Summary
External I/O Card Design Guidelines. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 13-1
External DIO II Design Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 13-2
Chapter 14: DIO II and DIO Card Qualification
Software Qualification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 14-2
Hardware Qualification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 14-2
Configuration Testing .................................................. 14-2
Environmental Testing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 14-2
Safety Compliance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 14-4
Table of Contents vii
viii
Introduction 1
Objectives of This Manual
The DID II Accessory Development Guide for HP 9000 Models 330/350 Computers is a specifi-
cation type of manual which is meant to be used by experienced design engineers in the devel-
opment of interface cards for the DIQ II Bus. It is not a replacement for the previous HP 9000
Series 200/300 Computers Accessory Development Guide (Manual Reorder No. 09800-90011)
which is used with the DIO Bus of the Series 200 computers (and Series 300 Models 310/320
computers). The DID II Accessory Development Guide (this manual) is used with the HP 9000
Series 300 Models 330 and 350 computers.
For ease of communication in this manual: