Text preview for : MS-6391.pdf part of Microstar MS-6391 Microstar MS-6391.pdf



Back to : MS-6391.pdf | Home

8 7 6 5 4 3 2 1




Version101
Cover Sheet
Block Diagram
1
2
MS-6391 7/19/2001
Update
INTEL (R) Brookdale Chipset
GPIO Spec. 3
D
Willamette/Northwood 478pin mPGA-B Processor Schematics D


Clock CY28324 & ATA100 IDE CONNECTORS 4
CPU:
mPGA478-B INTEL CPU Sockets 5-6
Willamette/Northwood mPGA-478B Processor
INTEL Brookdale MCH -- North Bridge 7-8
INTEL ICH2 -- South Bridge 9 - 10 System Brookdale Chipset:
INTEL MCH (North Bridge) +
LPC I/O W83627HF 11
INTEL ICH2 (South Bridge)
AC'97 Codec AD1885 12
On Board Chipset:
Audio Amp TL072 & GAME 13
C BIOS -- FWH C


FWH -- BIOS & CNR RISER 14
AC'97 Codec -- AD1881
SDR DIMM-168 15 LPC Super I/O -- W83627HF
AGP 4X SLOT (1.5V) 16 Clock Generation -- CY28324
LAN -- INTEL 82562EM/ET
PCI SLOT 1 & 2 & 3 17
PCI SLOT 4 & 5 18
Front Panel & Connectors 19
USB & FAN Connectors 20
B

PC2PC & D_LED &4 CHANNEL AUDIO 21 Expansion Slots: B




AGP2.0 SLOT * 1
Votlage Regulator 22
PCI2.2 SLOT * 5
Intersil HIP6301 PWM 23 CNR SLOT * 1
IO Connectors 24 ISA SLOT * 1 (Share PCI5)
LAN INTEL 82562EM/ET 25
PCI TO ISA BRIDGE AND ISA SLOT 26,27
JUMPER SETTING 28
A A

MANUAL 29
Title Rev
HISTORY 1 30 M i c ro-Star MS-6391 1.01
Document Number
Cover Sheet
Last Revision Date:
Thursday, July 26, 2001 Sheet 1 of 32
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
AGP
4X(1.5V)
AGP CONN




D D




(478PINS)
(100MHz)
Power
Supply VRM Willamette/Northwood CK408 Clock
CONN 9.2 Socket (mPGA478-B) (100MHz)
(400MHz) Scalable Bus Scalable Bus/2
4 X (66MHz) AGP
AGP 4X
(1.5V) MCH: Memory
Controller HUB
( 5 93PINS/FCBGA) (133MHz)
DIMM 1:3
VRM
AGP
CONN
( 66MHz X 4 ) HUB Interface

(14.318MHz)
C SM Bus C

ICH2: I/O PCI (33MHz)
PCI Slots 1:5
( 3 60PINS/EBGA)
Controller HUB
IDE CONN 1&2
(48MHz)
PCI TO ISA BRIDGE ISA SLOT 1




(33MHz)
(33MHz)
LPC Bus AC Link
USB Port 0:3 CNR Riser
(Shared slot)

(USB3)
AC '97 Audio
FWH: Firmware HUB AMP
Codec
SIO
PC2PC Line Out
Telephone In
MIC In
Heceta Hardware
B Monitor Audio In B
LAN
Line In
PS2 Mouse & Parallel (1) Floppy Disk Stuffing
DLED Options CD-ROM
Keyboard Serial (2) Drive CONN
Stuffing
Options
RJ45




A A




Title Rev
M i c ro-Star MS-6391 1.01
Document Number
Block Diagram
Last Revision Date:
Friday, July 27, 2001 Sheet 2 of 32
8 7 6 5 4 3 2 1
5 4 3 2 1




General Purpose I/O Spec.

ICH2
D GPIO Pin Type Function D



GPIO 0 I PCI TO ISA REQA#
GPIO 1 I Non Connect (PREQ#5)
GPIO 2 I INTE#
GPIO 3 I INTF#
GPIO 4 I INTG#
DEVICE ICH INT Pin IDSEL
GPIO 5 I INTH#
GPIO 6 I CNR Detect
FWH PCI Slot 1 INTA# AD16
GPIO Pin Type Function INTB#
GPIO 7 I None
INTC#
GPI 0 I ATA IDE 1 Detect
GPIO 8 I LAN Wake Up INTD#
C
GPI 1 I ATA IDE 2 Detect C

GPIO 9 I AC'97 Serial Data In
PCI Slot 2 INTB# AD17
GPI 2 I Reserved
GPIO 10 I Non Connect INTC#
GPI 3 I Reserved INTD#
GPIO 11 I Non Connect
INTA#
GPIO 12 I External SMI
GPIO 13 I LPC PME DLED PCI Slot 3 INTC# AD18
INTD#
GPIO 14~15 I Not Implemented GPIO Pin Type Function INTA#
INTB#
GPIO 16 O PCI TO ISA GNTA# GP32 I/OD DLED1
GPIO 17 O Non Connect (PGNT#5) GP24 I/OD DLED2 PCI Slot 4 INTD#
AD19
INTA#
GPIO 18 O Not Implemented GP34 I/OD DLED3
INTB#
B
GPIO 19 O VIO Voltage Control GP33 I/OD DLED4 INTC# B




GPIO 20 O VIO Voltage Control
PCI Slot 5 INTB#
AD21
GPIO 21 O O v er Voltage INTC#
INTD#
GPIO 22 OD PCI TO ISA NOGO
INTA#
GPIO 23 O BIOS Locked/Unlocked
GPIO 24 O Non Connect
GPIO 25 O VIO Voltage S3 Control
GPIO 26 O Non Connect
GPIO 27 I/O Audio 4 channel control
GPIO 28 I/O Lan Enable/Disable
A A


GPIO 29~31 I/O Not Implemented
Title Rev
M i c ro-Star MS-6391 1.01
Document Number
GPIO Spec.
Last Revision Date:
Friday, July 27, 2001 Sheet 3 of 32
5 4 3 2 1
8 7 6 5 4 3 2 1

VCC3
CP5 *Trace less 0.5"
2 1 CB280 X_104P
CLOCK GENERATOR BLOCK CB281 X_104P Shut Source Termination Resistors Pull-Down Capacitors
CB282 X_104P
CPUCLK R230 49.9RST
U18 CPUCLK# R231 49.9RST CN15 X_10p
FB21 X_601S/0805 39 41 R243 33RST CPUCLK MCHCLK R232 49.9RST CPUCLK 8 7
VCC3 CPU_VDD CPU0 CPUCLK (5)
40 R238 33RST CPUCLK# MCHCLK# R233 49.9RST CPUCLK# 6 5




+
CB160 CPU0# CPUCLK# (5)
Rubycon CT33 CB159 CB168 MCHCLK 4 3
104P 105P/0805 104P 36 38 R239 33RST MCHCLK MCHCLK# 2 1
CPU_GND CPU1 37 R240 33RST MCHCLK# MCHCLK (7)
MCHCLK# (7) ITP_CLK C160 10P
D for good filtering from 10K~1M CPU1# ITP_CLK# C161 10P D
46
ELS10/16-B MREF_VDD 45 C_STP R241 X_33RST ITP_CLK
CB169 3VMREF/CPU_STP# 44 P_STP R242 X_33RST ITP_CLK# ITP_CLK Trace less 0.2"
104P 43 3VMREF#/PCI_STP# ITP_CLK# CN16 X_10p
CP6 MREF_GND 49.9ohm for 50ohm M/B impedance
MCH_66 8 7
2 1 32 31 1 2 MCH_66
MCH_66 (7) ICH_66 6 5
3V66_VDD 3V66_0 30 RN16 3 4 ICH_66 AGPCLK 4 3
3V66_1 ICH_66 (10)
CB171 28 8P4R-33 5 6 AGPCLK 2 1
104P 29
3V66_GND
3V66_2
3V66_3
27 C166 22P 7 8 AGPCLK (16) CLOCK STRAPPING RESISTORS
6 FS2 1 2 SIO_PCLK SIO_PCLK (11)
FS4 R315 10K VCC3V CN17 X_10P
FB27 X_601S/0805 VCC3V 9 FS2/PCI_F0 7 FS3 RN21 3 4 FWH_PCLK FS3 R318 10K VCC3V PCICLK4 8 7
VCC3 PCI_VDD FS3/PCI_F1 8 FWH_PCLK (14)
MODE 8P4R-33 5 6 FWH_PCLK 6 5
+




CB204 CT37 CB196 CB197 MODE/PCI_F2 FS2 7
Rubycon 8 ICH_PCLK ICH_PCLK (9)
FS1 R298 X_10K VCC3V 4 3
104P 105P/0805 104P 5 10 FS4 R304 33 ISAPCLK ISAPCLK (26) R299 10K ICH_PCLK 2 1
PCI_GND FS4/PCI0 11 R305 33 PCICLK4 PCICLK0 CN18 2 1 X_10p
for good filtering from 10K~1M PCI1 PCICLK4 (18)
18 12 APIC_CLK 5/23/2001 FS0 R303 10K VCC3V PCICLK1 4 3
ELS10/16-B PCI_VDD PCI2 14 7 8 PCICLK0 R308 X_10K PCICLK2 6 5
CB198 PCI3 15 RN22 5 6 PCICLK1 PCICLK0 (17)
PCICLK1 (17) PCICLK3 8 7
104P 13 PCI4 PCICLK2 SIO_PCLK C198 22P
16 3 4 PCICLK2 (17)
PCI_GND PCI5 17 1 2 PCICLK3 R316 X_10K VCC3V APIC_CLK C196 22P
*Put GND copper under Clock Gen. PCI6 8P4R-33 PCICLK3 (18)
FS2 R317 10K ISAPCLK C260 22P
connect to every GND pin 24
48_VDD 22 FS0 R313 33 ICH_48 ICH_48 C193 10P
* 40 mils Trace on Layer 4 FS0/48MHz ICH_48 (10)
CB199 23 FS1 R307 33 SIO_48 MODE R314 10K SIO_48 C187 10P
with GND copper around it 104P 21 FS1/24_48MHz SIO_48 (11)
48_GND OSC C182 10P
* put close to every power pin 2 ICH_14 C167 10P
C C
REF_VDD 48 MUL0 R249 33 ICH_14 MUL0 R273 10K VCC3V
* Trace Width 7mils. VCC3 CB194 MUL0/REF0
1 MUL1 R289 33 OSC
ICH_14 (10) R274 X_10K
MUL1/REF1 OSC (27)
104P 47
* Same Group spacing 15mils REF_GND MUL1 R300 X_10K VCC3V
Trace less 0.2"
34 3 C179 18P R301 10K VCC3
* Different Group spacing 30mils CORE_VDD X1 32pF
R312 CB170 X3 14M-32pf-HC49S-D
* Different mode spacing 7mils on itself 104P 33 4 C175 18P CRST# R246 X_10K VCC3V
10K CORE_GND X2 CB257 CB258
(10,11,14,15) SMBCLK SMBCLK 26 35 R226 475RST 104P 104P
SMBDATA 25 SCLK IREF SMBCLK R264 1K
(10,11,14,15) SMBDATA SDATA VCC3
20 CRST# R248 0 FP_RST# FP_RST# SMBDATA R263 1K
R311 0 VTT_GD# 19 RST# 42 R225 4.7K VCC3V
VTT_GD# PWR_DN# VCC3V
+12V VCCP R327 220 Q32 ICS 950208/CY28323/4 C_STP R224 X_1K VCC3V used only for EMI issue
2N3904S P_STP R219 X_1K
VTT_GD# R324 X_1K
R578
X_10K
Q69
X_2N3904S
PRIMARY IDE BLOCK SECONDARY IDE BLOCK
R579
X_1K CB283
R176 X_4.7K
ATA100 IDE CONNECTORS R210 X_4.7K
X_105P/0805 IDE1 IDE2
D2x20-1:21-BL-ZBT D2x20-1:21-WH-SBT
HD_RST# 1 2 HD_RST# 1 2
PDD7 3 4 PDD8 SDD7 3 4 SDD8
B (10) PDD[0..7] PDD6 PDD9 PDD[8..15] (10) (10) SDD[0..7] SDD6 SDD[8..15] (10) B
5 6 5 6 SDD9
PDD5 7 8 PDD10 SDD5 7 8 SDD10
PDD4 9 10 PDD11 SDD4 9 10 SDD11 VCC3
PDD3 11 12 PDD12 SDD3 11 12 SDD12
PDD2 13 14 PDD13 SDD2 13 14 SDD13
PDD1 15 16 PDD14 SDD1 15 16 SDD14
PDD0 17 18 PDD15 SDD0 17 18 SDD15
19 C261 X_104P 19 C87
21 22 VCC3 21 22 X_103P
(10) PD_DREQ 23 24 (10) SD_DREQ 23 24
(10) PD_IOW# (10) SD_IOW#
(10) PD_IOR# 25 26 (10) SD_IOR# 25 26
27 28 R99 470 FOR EMI 27 28 R97 470
(10) PD_IORDY 29 30 (10) SD_IORDY 29 30
(10) PD_DACK# (10) SD_DACK#
(9) IRQ14 31 32 5/23/2001 (9) IRQ15 31 32 5/23/2001
(10) PD_A1 33 34 PD_DET (14) (10) SD_A1 33 34 SD_DET (14)
(10) PD_A0 35 36 PD_A2 (10) (10) SD_A0 35 36 SD_A2 (10)
(10) PD_CS#1 37 38 PD_CS#3 (10) (10) SD_CS#1 37 38 SD_CS#3 (10)
(19) PD_LED 39 40 (19) SD_LED 39 40


R95 C84 C88 R94 C85 * Trace Width : 5mils
VCC5 R88 8.2K 10K X_4700p VCC5 R90 8.2K 220P 10K X_4700p * Trace Spacing : 7mils
VCC3 VCC3 * Length(longest)-Length(shortest)<0.5"
* Trace Length less than 5"

VCC3 R330 330
R329 X_1K VCC5
A RESET BLOCK VCC5_SB A

R356 HD_RST#
X_4.7K

R367 330 VCC3 R360 330 VCC3 R333 X_4.7K Q34 Title Rev
X_2N3904S
(9) PCIRST#
PCIRST# 1 2
PCIRST#1 (7)
PCIRST# 3 4
PCIRST#2 (11,16,17,18)
M i c ro-Star MS-6391 1.01
PCIRST# R355 X_4.7K Q39
U24A U24B X_2N3904S Document Number
DM7407-SOIC14 C230 DM7407-SOIC14 PCIRST# 11 10 HD_RST#
Clock CY28323/4 & ATA100 IDE
(VCC5_STR) (VCC5_STR) R354
X_10P U24E Last Revision Date:
X_10K DM7407-SOIC14 Sheet of
Friday, July 27, 2001 4 32
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1



CPU SIGNAL BLOCK
CPU GTL REFERNCE VOLTAGE BLOCK
VCCPS+ (23)
(7) HA#[3..31] VCCPS- (23)

VCCP




HA#28




HA#18
1
0
9

7
6
5
4
3
2
1
0
9

7
6
5
4
3
2
1
0
HA#3
HA#3
HA#2

HA#2
HA#2
HA#2
HA#2
HA#2
HA#2
HA#2
HA#2
HA#1

HA#1
HA#1
HA#1
HA#1
HA#1
HA#1
HA#1
HA#1
HA#9

HA#7
HA#6
HA#5
HA#4
HA#3
HA#8




CVID4
CVID3
CVID2

CVID0
CVID1
R73