Text preview for : 19780508_Desk-Top_NoteTaker_Proposal.pdf part of xerox 19780508 Desk-Top NoteTaker Proposal xerox notetaker memos 19780508_Desk-Top_NoteTaker_Proposal.pdf
Back to : 19780508_Desk-Top_NoteTak | Home
XEROX
PALO ALTO RESEARCH CE~TER
Systems Science Laboratory
LSI Sysfems Area
May 8, 1978
For Xerox Intcrnal usc Only
To: Distribution
From: Doug Fairbairn
Subject: Desk - Top NoteTaker Proposal
stored: [I VY]
In discussing _the NoteTaker ge~ign_ .wit~ v:ari~us_ people, it has b~come clear th.at .there is ~
critical need ror a machme ot the Note I alstation. This machine would fill the large gap between a simple keystroke-capture station
and the present DO machine. ASD, among others, has expressed a strong interest in such a
machine.
After carefully examining the requirements of the portable and desk-top versions of this
machine, I have concluded that the two systems should be compatible at the module or
board level, not at the package level. This of course means that the systems would be
software compatible as well. The packaging needs of the two systems are just too different
1-A ,,1I0"! -tAT' f'Af"Y\1"'\at1hilit" at th1t.' i",,,,,,l Th", rl':>SL--tAT"I C\lct"'n1 r",nllirpc '::l l-:lra.:> (1 ,,", rl1ST"lI'::l\T
;~ ~Pti;J~~lj fl~ppy Ldi~k1L~ndL ~~jJb;~{e";ies" "Th~" p~r~Ufbl~) ~;;~Ji~~~~~~~i's ~ J;I~;l1 '(7") dispi~y:
requires a mini-floppy disk, and has a significant volume set aside for batteries. The two
machines might share the same power supply, however, keeping in mind that the batteries
are optional.
The PC boards presently envisioned for use in the portable NoteTaker are an awkward size:
5" x IT'. Th is size is not consistent with the needs of the desk -top version, and represents a
manufacturing problem for either system. An additional negative aspect of these boards is
that they are too large to include only one or two subsystems. Using Alto technology (MSI
TTL), a new subsystem generally required 60-90 new chips. This was about the number of
chips which fit on a board so that was a reasonable board size. With the level of integration
proposed for the NoteTaker, each subsystem will require roughly 20-40 chips, thus making
smaller boards the more logical choice.
Based primarily on the modularity and manufacturability arguments above, I propose that
the two systems use a common module size of approximately 8.5" x 5". Amazingly enough,
th is is the same length to width ratio wh ich Xerox sta nda rds propose as the max i m LIm (1.7).
This module size is the same height as the NoteTaker boards, but is half the length. The
boards will have a 100 pin edge connector along the 5" side. In the current NoteTaker
package, they would fit into the package as shown in Pig. l. Eight of these modules could
be plugged into the NoteTaker. The two separate back-planes which the cards plug into are
connected by a flexible cable. A significant feature of this arrangement is that there is an
unobstructed airflow over the cards.
A short historical perspect i ve on how the NoteTa ker arch itect ure evol ved would probably be
helpful at this point. I spent a fair amount of time looking at the various processor-
memory configllr;.ltions which seemed reasonable for the NoteTaker system. The one which
had the must appeal is diagrammed in Fig. 2. This diagram was generated when I was
investigating hov; the DOILSI components could be integrated into the NoteTaker
architecture. In general this architecture is characterized by a large cOlllmon memory shared
2
by multi -processors. The various processors have their own local memory as well. This
local memory can take the form of a hardware-managed cache, a simple RAM, etc. In this
particular diagram, the emulation processor has a content-addressable cache and the I/O
processor has a straight RAM.
When it became clear that there were not going to be enough people to push the DOILSI
program ahead in the near future, I made the decision to merely replace the custom
emulation processor with the 8086 machine. The I/O and memory systems remained
essentially unchanged.
It is interesting to note that this architecture is essentially an updated version of the Alto
architecture in the following respect. The Alto had several tasks running essentialy
simultaneously which communicated through main memory. These tasks of course did not
run exactly concurrently because they all shared the same processor. In the NoteTaker
architecture, the processes still communicate through main memory but in fact can now run
truly simultaneously because of the multiprocessor configuration.
In summary, the current architecute is one we can grow with. It will support multi-
processors and a large main memory OM word). The processors can be of varying power
and complexity, making use of various types of local memory. One can even choose to make
the overall system simpler. The large main memory can be replaced by a very sma11 one,
possibly without error correction. The processors can use ROM to hold most of their local
code with only the minimum amount of RAM.
A description of the potential module types is given below.
1.0 :v1ain Memory
It will be assumed in this discussion that we are talking about a memory system with single
bit error correction and double bit detection. The memory will operate as a 32 bit wide
system with 7 error correction bits. The options which are available to us are 16K RAMs in
a 16 pin package and 2 16K RAMs in an 18 pin package. Early next year 64K RAMs will
become avaiiabie in iimited quantities and we wiii have the same packaging options for
those chips. The following discussion will assume 16K RAMs.
The ideal memory module would include 64K x 16 bits of RAM using 18 pin packages,
some address and data buffering, and a custom LSI chip to do memory data error correction.
Without the custom LSI chip, all 32 bits from the memory would have to be brought to a
connector on the back of the board. It would then connect to a module which did the error
correction. After the error correction was done, the 32 bits would be multiplexed onto a 16
bit data bus available to all the cards in the system.
The memory timing circuits would share a board with the the system bus controller and the
error loggi ng processor.
2.0 Processors
There will be several processors in the system, each with its own local memory. They will
all have access to the main memory and will communicate as described in the NoteTaker
System Manual. The local memory may ,consist of RAM, PROM or both. 4K is probably
the maximum amount of local memory which can be currently provided, although this can
gro\v later on when 16K static chips become avaiabk and also if PROM or ROM can be
lIsed instead of RAM.
J.O Sample System Configurations
A sa 111 pie system configura tion usi ng a 1\ off-the-shelf com ponen ts and 16 K R A1'\11s is shown
below'. This system could be built in moderate to large quantities in early 1979.
Function # of Modules
128K x 16 Memory 2
3
Memory Control 1
Memory error corr. 1
Em ulation Processor 1
Disk Control1er 1/2
Display Controller 1/2
Gen. Purpose I/O 1/4
Ethernet Controller 3/4
lotal Modules: 7
A system which could be available in small quantities in mid-1979 and which used a custom
data errror correction chip and display controller, 64K RAMs, a more capable floppy disk
controller, etc. is shown below:
Function # of Modules
256K x 16 Memory 1
Memory/System Control 1
Emulation Processor 3/4
Display Controller 1/4
Disk Controller 1/4
Gen. Purpose I/O 1/4
Ethernet Controller 1/2
Iotal Modules: 4
The total power drain for these systems, including the mini-floppy disk but not the display
is in the area of 50-100 watts.
These are obviously just sample systems, Other combinations and more custom LSI are
possible. We need to identify more carefully where the costs are in these systems to see
where the most leverage is. .
4.0 Future Options
All of the above sytems include an 8086 processor as the emulation processor. If a more
powerful processor is desired, there are the following options:
1) Use a bit-slice processor. This would require two boards in the above system and
could be built out of existing components. The power requirements of this option
are relatively high. The 8086 processor board will require 5-7 watts while the bit-
slice approach would likely use about 30 watts. This last issue is only of great
importance to the portable NoteTaker.
The computational power of this machine