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1 2 3 4 5 6 7 8
PCB STACK UP
LAYER 1 : TOP
LAYER 2 : GND
BU5 Block Diagram 01
LAYER 3 : IN1
LAYER 4 : SVCC
LAYER 5 : IN2
A USB-11 A
INT_LVDS LCD/CCD Con. P17
LAYER 6 : IN3 Port-A
LAYER 7 : GND
DDRIII-SODIMM1
LAYER 8 : BOT DDRIII-SODIMM2 Sandy Bridge(UMA+VGA) CRT Con.
P13,14
INT_CRT P17
DDR SYSTEM MEMORY
Dual Channel DDR III PCI-E
800/1066/1333 MHZ
Graphics Interfaces
HDMI Con.
INT_HDMI HDMI-passive level shift
rPGA 989 Port-B P16
P16
P3,4, 5, 6,
SATA - HDD FDI DMI
P21
DMI(x4)
SATA - ODD FDI DMI
P21 SATA 0
B SATA B
SATA 4 PCI-Express
PCI-E
PCIE-3
USB-3 3G
USB Con. Daughter board P18
USB-8,USB-9
CougarPoint POWER SYSTEM
ISL88731C P28
USB-5 USB 2.0 (Port0~13)
SIM CARD. PCIE-6 PM6686 P29
USB
P18 WLAN UP6163 P30
PCH USB-13
RT8240 P31
P18
P7,8, 9, 10, 11,12 TPS51461 P32
USB-4
Cardreader Con. ISL95835HRTZ P33
PCIE-1
3 IN 1 P20 G966A P34
RTC Giga/10/100 Lan
P23
BATTERY +VCC_CORE
PCIE-1
C P8 C
USB-1 USB 3.0
P19
+1.5V
Azalia IHDA +1.5VSUS
NVRAM
LPC
USB 3.0 Conn. +VTT
P19
LPC +1.05V
+1.8V
Audio Codec EC +1.5V_S5
P22 P27
+3VPCU
+3V_S5
Port-B
Port-A
+3V
FAN K/B Con. HALL Sensor SPI Flash Touch Pad /B Power /B +5VPCU
MIC JACK HP SPK Con. Con. Con. +5V_S5
P22 P22 P22 P3 P25 P17 P27 P25 P25 +5V
D +SMDDR_VTERM D
+SMDDR_VREF
+VCCSA
Quanta Computer Inc.
PROJECT : BU5
Size Document Number Rev
2A
Block Diagram
Date: Wednesday, November 17, 2010 Sheet 1 of 35
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
02
Power States
Table of Contents
CONTROL
PAGE DESCRIPTION BOI-FUNCTIONS POWER PLANE VOLTAGE SIGNAL ACTIVE IN
A A
1 Schematic Block Diagram VIN 10V~+19V S0~S5
2 Front Page
+VCCRTC +3.0V~+3.3V S0~S5
3-6 Processor CPU
7-12 PCH CLG +3V +3.3V MAIN_ON S0
8 RTC RTC
13-14 DDRIII SO-DIMM DDR
17 VGA Connector VGA +3V_S5 +3.3V S5_ON S0~S5
16 LCD Panel LDS
+3V_HDP +3.3V MAIN_ON S0
CRT & CRT BUS SWITCH CRT
CCD CCD +3VPCU +3.3V AC/DC Insert enable S0
HALL SENSOR&BACK LIGHT SWITCH HSR
+5V +5V MAIN_ON S0
19 Display Port DPP
20 HDMI comm part HDM +5V_S5 +5V S5_ON S0~S5
HDMI for GM HMG
+5VPCU +5V AC/DC Insert enable S0~S5
21 SATA ODD ODD
Main SATA HDD & 2nd SATA HDD HDD +5V_TMA +5V MAIN_ON S0
G-Sensor H3D
WIMAX_P +3.3V WMAX_P for EC
B 22 5 IN 1 Card reader MMC B
IEEE1394 FIW +1.8V +1.8V MAIN_ON S0
23 MINI Card (Wi-Fi & WIMAX) WLN
+1.5V +1.5V MAIN_ON S0
MINI Card 2nd MNC
MINI Card 3nd MNC +1.5V_S5 +1.5V S5_ON S0~S5
TMA Connector TMA
+1.5V_SUS +1.5V SUSON S0~S3
24 INT KeyBoard & K/B LED Power KBC +VCC_CORE VRON S0
LED Board LED
+VTT +1.05V~+1.1V MAIN_ON S0
TP&FP board TPD,FPD
Bluetooth Connector BTM +1.05V +1.05V MAIN_ON S0
Felica Connector FEC
+VAXG GFXVR_EN S0
MMB Connector MMB
Power SW PSW
ITEM Value Code FUNCTIONS
B-CAS Connector BCS GND PLANE PAGE
1 EV@ DISCRETE
GND_SIGNAL 2 IV@ UMA
25 New Card (Express Card) EXC 32
3 U3@ USB 3.0
E-SATA comb USB ESA CARD_GND
21 4 U2@ USB 2.0 (colay W USB 3.0)
USB Connector USB
C AGND_DC/DC 5 HM@ HDMI C
Audio & USB Board USB,ADO 31
6 IHM@ Internal HDMI
Light Sensor LSN
GND ALL 7 EHM@ External HDMI
Satellite LED LED
8 3G@ 3G
RF LED / WIMAX LED / Kill SW KSW
9 C@ Cost issue
26 EC WP8763LDG/WPC8769L(O) KBC
10 MDC@ Modem
CIR CIR
11 S3@ S3 Power Reduction
27 Codec (CX20583) ADO
12 NS3@ No S3 Power Reduction
28 FM Tunner FMM
PAGE DESCRIPTION BOI-FUNCTIONS 13 E@ EMI
Modem Connector MDM
34 VAXG (ISL62881) PWM 14 51@ 1G LAN
HOLE
35 +VTT (UP6111A) PWM 15 52@ 10/100 LAN
36 +1.05V (UP6111AQDD) PWM 16 GS@ G-SENSOR
29 Atheros LAN LAN
37 DDR 1.5V (TPS51116) PWM 17 NGS@ No G-SENSOR
30 NVRAM Connecyor NVR
38 Discharge (1.5V_S5/1.8V) PWM
39 Power Tree Table
31 Charger (ISL6251A) PWM
40 PCH Power Plane
32 System 5V/3V (ISL6237) PWM
41 Power Management
33 CPU CORE (ISL62882) PWM
42 Change List
D D
Quanta Computer Inc.
PROJECT : BU5
Size Document Number Rev
2A
POWER STAGE AND BOI-FUNCTION
Date: Wednesday, November 17, 2010 Sheet 2 of 35
1 2 3 4 5 6 7 8
5 4 3 2 1
Sandy Bridge Processor (DMI,PEG,FDI)
U22A
J22 PEG_COMP
Sandy Bridge Processor (CLK,MISC,JTAG)
U22B
03
PEG_ICOMPI J21
B27 PEG_ICOMPO H22 A28 CLK_CPU_BCLKP_R R357 3 4 0X2
[7] DMI_TXN0 CLK_CPU_BCLKP [9]
MISC
DMI_RX#[0] PEG_RCOMPO BCLK
CLOCKS
B25 C26 A27 CLK_CPU_BCLKN_R 1 2
[7] DMI_TXN1 DMI_RX#[1] [8] H_SNB_IVB# PROC_SELECT# BCLK# CLK_CPU_BCLKN [9]
A25
[7] DMI_TXN2 B24 DMI_RX#[2] K33
[7] DMI_TXN3 DMI_RX#[3] PEG_RX#[0] M35 AN34
SKTOCC#
PEG_RX#[1] TP8 SKTOCC#
B28 L34 A16 CLK_DPLL_SSCLKP_R R362 1K_4
[7] DMI_TXP0 B26 DMI_RX[0] PEG_RX#[2] J35 DPLL_REF_CLK A15 CLK_DPLL_SSCLKN_R R361 1K_4 +VTT
[7] DMI_TXP1 DMI_RX[1] PEG_RX#[3] DPLL_REF_CLK#
DMI
A24 J32
[7] DMI_TXP2 B23 DMI_RX[2] PEG_RX#[4] H34
[7] DMI_TXP3 DMI_RX[3] PEG_RX#[5] H31 AL33
TP_CATERR#
D PEG_RX#[6] TP63 CATERR# D
G21 G33
[7] DMI_RXN0 E22 DMI_TX#[0] PEG_RX#[7] G30
[7] DMI_RXN1 DMI_TX#[1] PEG_RX#[8]
THERMAL
F21 F35
[7] DMI_RXN2 D21 DMI_TX#[2] PEG_RX#[9] E34 AN33 R8
[7] DMI_RXN3 DMI_TX#[3] PEG_RX#[10] [27] EC_PECI PECI SM_DRAMRST# CPU_DRAMRST# [15]
E32
PEG_RX#[11]
DDR3
MISC
G22 D33
[7] DMI_RXP0 D22 DMI_TX[0] PEG_RX#[12] D31
[7] DMI_RXP1 DMI_TX[1] PEG_RX#[13]
PCI EXPRESS* - GRAPHICS
F20 B33 R330 56_4 H_PROCHOT#_R AL32 AK1 SM_RCOMP_0 R34 140/F_4
[7] DMI_RXP2 DMI_TX[2] PEG_RX#[14] [27,33] H_PROCHOT# PROCHOT# SM_RCOMP[0]
C21 C32 A5 SM_RCOMP_1 R368 25.5/F_4
[7] DMI_RXP3 DMI_TX[3] PEG_RX#[15] SM_RCOMP[1] A4 SM_RCOMP_2 R367 200/F_4
J33 SM_RCOMP[2]
PEG_RX[0] L35 PM_THRMTRIP# AN32
PEG_RX[1] THERMTRIP# REV-A1A Change from 26.1/F_4 to 25.5/F_4
K34
A21 PEG_RX[2] H35
[7] FDI_TXN0 H19 FDI0_TX#[0] PEG_RX[3] H32
[7] FDI_TXN1 FDI0_TX#[1] PEG_RX[4] TP7
E19 G34
[7] FDI_TXN2 F18 FDI0_TX#[2] PEG_RX[5] G31 AP29 XDP_PRDY#_R TP5
Intel(R) FDI
[7] FDI_TXN3 FDI0_TX#[3] PEG_RX[6] PRDY#
B21 F33 REV-A1A add 0.01uF capacitor AP27 XDP_PREQ#
[7] FDI_TXN4 C20 FDI1_TX#[0] PEG_RX[7] F30 PREQ#
[7] FDI_TXN5 FDI1_TX#[1] PEG_RX[8] parallel 10K resistor can pass turbo boot
D18 E35 AR26 XDP_TCLK
[7] FDI_TXN6 FDI1_TX#[2] PEG_RX[9] TCK
PWR MANAGEMENT
E17 E33 AR27 XDP_TMS
JTAG & BPM
[7] FDI_TXN7 FDI1_TX#[3] PEG_RX[10] F32 AM34 TMS AP30 XDP_TRST#
[7] PM_SYNC R328 0_4 PM_SYNC_R
PEG_RX[11] D34 PM_SYNC TRST#
A22 PEG_RX[12] E31 AR28 XDP_TDI_R TP1
[7] FDI_TXP0 G19 FDI0_TX[0] PEG_RX[13] C33 TDI AP26 XDP_TDO_R
[7] FDI_TXP1 FDI0_TX[1] PEG_RX[14] TDO
E20 B32 R322 0_4 H_PWRGOOD_R AP33
[7] FDI_TXP2 FDI0_TX[2] PEG_RX[15] [10] H_PWRGOOD UNCOREPWRGOOD
G18 R320 10K_4
[7] FDI_TXP3 FDI0_TX[3]
B20 M29 C393 *0.1U/10V_4X
[7] FDI_TXP4 C19 FDI1_TX[0] PEG_TX#[0] M32 AL35 XDP_DBR#_R R332 0_4 XDP_DBRST# [7]
[7] FDI_TXP5 D19 FDI1_TX[1] PEG_TX#[1] M31 V8 DBR#
[15] PM_DRAM_PWRGD_R PM_DRAM_PWRGD_R
[7] FDI_TXP6 FDI1_TX[2] PEG_TX#[2] SM_DRAMPWROK
F17 L32
[7] FDI_TXP7 FDI1_TX[3] PEG_TX#[3] L29 AT28 XDP_BPM0_R TP2
J18 PEG_TX#[4] K31 R324 *75/F_4 BPM#[0] AR29 XDP_BPM1_R TP3
[7] FDI_FSYNC0 FDI0_FSYNC PEG_TX#[5] +VTT BPM#[1]
J17 K28 AR30 XDP_BPM2_R TP58
[7] FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] J30 BPM#[2]
CPU_PLTRST# R323 *43_4 CPU_PLTRST#_R AR33 AT30 XDP_BPM3_R TP57
H20 PEG_TX#[7] J28 RESET# BPM#[3] AP32 XDP_BPM4_R TP4
[7] FDI_INT FDI_INT PEG_TX#[8] H29 BPM#[4] AR31 XDP_BPM5_R TP61
J19 PEG_TX#[9] G27 BPM#[5] AT31 XDP_BPM6_R TP59
[7] FDI_LSYNC0 H17 FDI0_LSYNC PEG_TX#[10] E29 BPM#[6] AR32 XDP_BPM7_R TP60
[7] FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] F27 BPM#[7]
C C
PEG_TX#[12] D28
PEG_TX#[13] F26
PEG_TX#[14] E25
A18