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KW3 BLOCK DIAGRAM 1
CPU THERMAL
SENSOR
Calistoga / Yonah /ICH7-M
CPU Yonah/Merom MAX6648
14.318MHz CPU CORE MAX8736
A
PG 23 A
POWER VCORE 1.2V /44A
479 Pins (uPGA) CPUCLK, PG31
CPUCLK#
CLOCK GEN SYSTEM MAX8734
PG 4,5
SBLINKCLK, SBLINKCLK#
ICS954206 POWER(3/5V)
56pins
NBSRCCLK, NBSRCCLK# PG32
FSB HTREFCLK SYSTEM POWER TPS51124
533M/667M
PG3 (VCC1.5/VCCP)
OSC14M PG33
CRT port R.G,B Calistoga SYSTEM POWER TPS51116
PG 10 (1.8VSUS/0.9V SMDDR_VREF)
945GM/940GML DDRII-SODIMM1
Channel A PG34
LCD Panel LVDS X1 DDRII 533,667 MHz
1466 FCBGA PG 12,13
PG 18 Channel B
B BATT CHARGER B
PG 6,7,8,9,10,11 DDRII 533,667 MHz DDRII-SODIMM2 MAX8724ETI+
PG35
PG 12,13 USB6
DMI X4 BATTERY CONNECTOE
32.768KHz MiniCard /
IDE - ODD NBSRCCLK, NBSRCCLK# New Card PG36
PG 26 WLAN
PG 23 PG 21
ATA 66/100/133
PATA - HDD PCI-Express
SATA - HDD PG 26 SATA 150MB ICH7-M 25MHz 24.576MHz
33MHZ, 3.3V PCI
USB 2.0 652 BGA
USB PORT 1 PG 29
Azalia
USB PORT 3 PG 29
USB PORT 5 PG 29 PWRCLKP RTL8110SCL
PWRCLKN CARDBUS R5C843
C FP/B USB PORT 7 PG 29 PG 14,15,16,17 DIB_DATAN RTL8100CL C
DIB_DATAP
USB PORT 0 PG 22 PG 20,21
Finger print PG25
Finger print PG 25 LPC
32.768KHz
USB PORT 2 MDC Azalia PCMCIA 4 IN 1 IEEE 1394
Bluetooth PG 25 AUDIO CODEC RJ45
PG25
ALC262 PG 21 PG 21 PG 20
USB PORT 4 PG27
PG 22
Docking PG 24 PC87541 Config KW3:
WIRE
TQFP 176pins PCB 8L M/B:DA0KW3MB8C7 31KW3MB0021 945GM
USB PORT 6 AMP AMP F/B: DAKW3TB28D5 31KW3MB0055 940GML
RJ11 MIC MAX9710 MAX4411
PCI_E USB PG 21 T/P: DA0KW3TR8C1
PG 30 PG22 PG27 PG28 PG28
Config KW3DC2:
S/W: DAKW3TB18C1
31KW3MB0047 945GM
PCB 6L M/B:DAKW3MB16C9
PC87383 PG24 31KW3MB0039 940GML
F/B: DAKW3TB26C2
FAN Touch Key FLASH INT SPK
D TPM1.2 HP T/P: DA0KW3TR6B9 D
PAD Board ROM PG28 PG27
Parallel SERIAL PG25 PG23 PG25 PG29 PG30
S/W: DAKW3TB16B8
PORT PORT
PG24 PG24
PROJECT : K3W
Quanta Computer Inc.
Port Replicator Size Document Number Rev
PG24 SYSTEM BLOCK DIAGRAM A
Date: Tuesday, May 16, 2006 Sheet 1 of 36
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Voltage Rails
Voltage Rails
VCC_CORE Core voltage for Processor
ON S0~S2
X
ON S3 ON S4 ON S5 Ctl Signal
VR_ON
PCB STACK UP
LAYER 1 : TOP
2
GMCH_VTT Core voltage for CPU / NB X MAINON LAYER 2 : SGND
SMDDR_VREF 0.9V for DDR2 Termination voltage X MAINON LAYER 3 : IN1
VMEM_VTT 1.25V for VRAM Termination voltage X MAINON LAYER 4 : IN2 CPU Power On Sequence
A A
LAYER 6 : SVCC
LAYER 6 : BOT VID
VR_ON Tsft_star_vcc
RVCC3 X X X RVCCD
Vboot
Vcc-core Tboot
Tboot-vid-tr
CPU_UP Tcpu_up
VCC1.5 X MAINON
VCC1.8 X MAINON PCI DEVICES IRQ ROUTING Vccp
VCC2.5 X MAINON
Vccp_UP Tvccp_up
VCC3 MAIND K3W PCI DEVICE IDSEL# REQ# / GNT# Interrupts
X
VCC5 X MAIND RTL Lan AD16 REQ0# / GNT0# INT D#
Vccgmch
GMCHPWRGD Tgmch_pwrgd
1.8VSUS SUSON R5C843 AD23 REQ1# / GNT1# INT A/B/C#
X X
3VSUS X X SUSD CLK_ENABLE#
B B
5VSUS X X SUSD
IMVP4_PWRGD Tcpu_pwrgd
3VPCU X X X X VL
5VPCU X X X X VL
9VPCU X X X X 5VPCU
ACIN POWER ON TIMING Power Sequencing and Reset Signal Timings
Hub interface "CPU
Reset Complete"
ACIN message
5VPCU/3VPCU STPCLK#,CPUSLP#,
STP_CPU#,STP_PCI#
NBSWON# SLP_S1#,C3_STAT#
Frequency Strap Values Normal
PWRBTN# Straps Operation]
To ICH6
2~3RTC
PCIRST#
RVCC_ON 32~38RTC
SUS_STAT#
C C
To ICH6
RSMRST# PWROK, 99ms
VGATE
SUSB#,SUSC# Vcc3_3, Vcc1_5, 0ms
VCCHI, V_CPU_IO
From ICH6
SUSON 0ms
From 87541
MAINON 10ms
LAN_PWROK
From 87541
VSUS,VCC VccLAN3_3, 0ms
VccLAN1_5
From 87541
VR_ON 1~2RTC
SLP_S3#
GMCH_VTT 1~2RTC
/1.05V SLP_S4#
VCORE_CPU V5Ref 110ms
SLP_S5#
CK410_PWRGD
To clock generator 110ms
SUSCLK
PWROK 99ms < t 214 10ms
D D
/IMVP_PWRGD RSMRST#
To GMCH/other
PLTRST# PCI device VccSus3_3, 0ms
\PCIRST# VccSus1_5
H_PWRGD From ICH6 to CPU 0ms
V5RefSus PROJECT : K3W
2ms RTCRST#
5ms Quanta Computer Inc.
H_CPURST# Form GMCH to CPU Size Document Number Rev
SYSTEM INFORMATION A
VccRTC
Date: Tuesday, May 16, 2006 Sheet 2 of 36
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A B C D E
FSC FSB FSA CPU SRC PCI L15 25 mils
ACB2012L-120-T
1
0
0
0
0
1
1
1
1
100
133
166
100
100
100
33
33
33
Default
(8,9,10,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,30,31,32) VCC3
VCC3
120 ohms@100Mhz
VDD_SRC_CPU
C74
0.1U/10V
C83
0.1U/10V
C82
0.1U/10V
C64
0.1U/10V
C87
10U
3
0 1 0 200 100 33 R69 2.2/F VDD_A
(4,5,6,9,10,14,17,33) GMCH_VTT
0 0 0 266 100 33 C73 C80
0.1U/10V 10U
1 0 0 333 100 33 VDD_A
4 Close to IC <500mils 4
1 1 0 400 100 33 33P/0402
C564 CG_XIN
1 1 1 200 100 33 Place these termination to close CK410M.
2
R434 12.1/F
37
38
CL=20 - 22P 14M_SIO (24)
SEL2 SEL1 SEL0 Y6 U34
14.318MHZ 50 52 14M_REF R431 12.1/F
VDDA
GNDA
XTAL_IN REF0 14M_ICH (16)
L14 SMbus address D2 /IDT 33P/0402
1
25 mils ACB2012L-120-T C563 CG_XOUT 49 44 R_HCLK_CPU 1 2
XTAL_OUT CPU0 HCLK_CPU (4)
VCC3 VDD_PCI VCC3 R55 *10K 43 R_HCLK_CPU# 3 4 C572 C570
CPU0# HCLK_CPU# (4)
RP36 33X2 *10P *10P
120 ohms@100Mhz C58 C51 C50 (16,31) VR_PWRGD_CK410# VR_PWRGD_CK410# 10 41 R_HCLK_MCH 1 2
Vtt_PwrGd#/PD CPU1 HCLK_MCH (6)
0.1U/10V 0.1U/10V 10U (16) PM_STPPCI# PM_STPPCI# 55 40 R_HCLK_MCH# 3 4
PCI/SRC_STOP# CPU1# HCLK_MCH# (6)
(16) PM_STPCPU# PM_STPCPU# 54 RP37 33X2
CPU_STOP#
CPU2_ITP/SRC7 36 T46 Place these termination
R43 2.2/F VDD_48 CGCLK_SMB 35
(13,23) CGCLK_SMB CPU2#_ITP/SRC7# T47
CGDAT_SMB
C63 C47 (13,23) CGDAT_SMB RCLK_PCIE_MINI 2 33X2
to close CK410M.
0.1U/10V 10U (16) CLKUSB_48 R57 33
46 SCLK CK-410M SRC6 33
RCLK_PCIE_MINI#
1 CLK_PCIE_MINI (23)
HCLK_CPU R437 49.9/F/B
CLKUSB_48 47 SDATA SRC6# 32 3 4 CLK_PCIE_MINI# (23)
RP39 HCLK_CPU# R439 49.9/F/B
CPU_BSEL0 R440 8.2K 12 31 RPCIE_MCH 1 2
FSA/USB_48MHz SRC5 CLK_PCIE_MCH (8)
CPU_BSEL1 16 30 RPCIE_MCH# 3 4 HCLK_MCH R441 49.9/F/B
FSB/TEST_MODE SRC5# CLK_PCIE_MCH# (8)
R47 1 VDD_REF CPU_BSEL2 R428 8.2K 53 RP42 33X2 HCLK_MCH# R444 49.9/F/B
FSC/REF1 RPCIE_SATA
SRC4_SATA 26 3 4 33X2 CLK_PCIE_SATA (14)
C60 C55 VDD_REF 48 27 RPCIE_SATA# 1 2 CLK_PCIE_MINI R445 49.9/F/B
VDD_REF SRC4#_SATA CLK_PCIE_SATA# (14)
0.1U/10V 10U VDD_SRC_CPU 42 RP43 CLK_PCIE_MINI# R446 49.9/F/B
VDD_CPU CLK_PCIE_NEW
SRC3 24
VDD_PCI 1 25 CLK_PCIE_NEW# CLK_PCIE_MCH R448 49.9/F/B
VDD_PCI_1 SRC3# CLK_PCIE_MCH# R450 49.9/F/B
7 VDD_PCI_2
3 22 RPCIE_ICH 3 4 33X2 3
SRC2 CLK_PCIE_ICH (15)
VDD_SRC_CPU 21 23 RPCIE_ICH# 1 2
VDD_SRC0 SRC2# CLK_PCIE_ICH# (15)
VCC3 28 RP40 CLK_PCIE_SATA R71 49.9/F/B
VDD_SRC1 CLK_PCIE_SATA# R72 49.9/F/B
Use 1% R 34 VDD_SRC2 SRC1 19 T1
20 T2
VDD_48 SRC1# RP38
11 VDD_48
17 R_DREFSSCLK 3 4 33X2
Iref=5mA, SRC0/DREFSSCLK DREFSSCLK (8)
R62 475/F IREF 39 18 R_DREFSSCLK# 1 2
Ioh=4*Iref IREF SRC0#/DREFSSCLK# DREFSSCLK# (8)
Q7 R56 R58
2
RHU002N06 10K 10K 5 R_PCLK_541 R430 33
PCI5 PCLK_541 (30)
4 R_PCLK_R5C841 R427 33 CLK_PCIE_ICH R67 49.9/F/B
PCI4 PCLK_R5C841 (20)
3 1 CGDAT_SMB RP58 3 R_PCLK_LAN R424 33 CLK_PCIE_ICH# R70 49.9/F/B
GND_PCI_1
GND_PCI_2
(16) PDAT_SMB PCI3 PCLK_LAN (22)
GND_SRC
GND_CPU
GND_REF
DREFCLK 1 2 R_DOT96 14 56 PCLK_MINI_LPC R425 12.1/F
(8) DREFCLK DOT96MHz PCI2 PCLK_LPC_DEBUG (18,23)
GND_48
DREFCLK# 3 4 R_DOT96# 15