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THE MAXC MICROPROCESSOR
MAXC 0.1
March 2, 1972
B u t 1 er Lampson
Ed Fiala
E d McCreight
Chuck Thacker
Xerox Palo A l t o Research Center
3180 P o r t e r Drive
P a l o Alto, CA 94304
--, -
, I
f
MICROPROCESSOR / Lampson, e t al. MAXC 8.1 / Page 2
Xerox P a l o Alto Research C e n t e r March 2, 1972
C 1.0 Overview
1.1 N o t a t i o n
20 C o n t r o l
.
2.1 Interrupts
2.2 Flag Register
3.0 Ar it hme t ic/Lo g i c Sect i o n
3.1 R e g i s t e r Banks
3.2 P and Q R e g i s t e r s ; C y c l e and Mask
3.3 A r i t h m e t i c and Logic O p e r a t i o n s
3 . 4 Communication w i t h t h e Bus
4 . 0 Local Memories
4.1 Scratch Pad Memory
4.2 D i s p a t c h Memory
4.3 Map
44
. Instruction Memory
5 . 0 Memory I n t e r f a c e
. 6.0 Maintenance I n t e r f a c e ,
7 . 0 Disk C o n t r o l
Appendix A Summary of M i c r o i n s t r u c t i o n Bits
Appendix B Summary of Branch C o n d i t i o n s
Appendix C Summary of P r i m a r y a n d Secondary F u n c t i o n s
Appendix D Summary of Bus S o u r c e s and D e s t i n a t i o n s
Appendix E Summary of F l a g R e g i s t e r B i t s
Appen3ix F Summary o f System Maintenance I n t e r f a c e I n s t r u c t i o n s .
( N o t written yet)
Appendix G More Than You R e a l l y Wanted t o Xnaw About D i s k Control
Table 1.. I n s t r u c t i o n S e q u e n c i n g and S t a c k Actions
Table 2. P Input S e l e c t i o n
Table 3. Q Input Selection
Table 4.. ALU F u n c t i o n s
Table 5 0 . KSET-, KCSET-, and KSTAT Bus B i t s
Figure 1. MAXC Processor O r g a n i z a t i o n
c
MICROPROCESSOR / Lampson, e t al, MAXC 8,1 / Page 3
X e r o x P a l 0 A l t o Research Center ,March 2, 1 9 7 2
c. 1 0 Overview
. \
The MAXC m i c r o p r o c e s s o r i s i n t e n d e d t o be a r e a s o n a b l y
g e n e r a l p u r p o s e p r o c e s s o r , c u s t o m i z e d t o some e x t e n t f o r PDP-18
emulation. It w i l l be u s e d a s a c e n t r a l F r o c e s s o r and d i s c
c o n t r o l l e r i n t h e MAXC s y s t e m , Physically, the processor
o c c u p i e s 24 c a r d p o s i t i o n s i n t w o Augat c a r d cages (19'1 x 8,7tt) ,
a n d t h e d i s c c o n t r o l o c c u p i e s 8 card p o s i t i o n s i n a t h i r d c a g e .
F i g u r e 1 i s a l o g i c a l block d i a g r a m of the p r o c e s s o r , It is
o r g a n i z e d a r o u n d a 3 6 - b i t b u s , on which a l l t r a n s f e r s b e t w e e n
s u b s e c t i o n s of t h e machine Occur, Data t r a n s f e r s t o a n d from
this b u s a n d a l l o t h e r f u n c t i o n s i n t h e machine a r e under c o n t r o l
of a 7 2 - b i t m i c r o i n s t r u c t i o n W o r d , A machine may be c o n f i g u r e d
w i t h e i t h e r 1 0 2 4 or 2 0 4 8 words of i n s t r u c t i o n memory.
Two f i e l d s in e v e r y m i c r o i n s t r u c t i o n s p e c i f y a b u s s o u r c e ,
w h i c h l o a d s d a t a o n t o t h e b u s , and a b u s d e s t i n a t i o n which reads,
and u s u a l l y stores, t h e d a t a , Sometimes a s i n g l e v a l u e o f t h e
s o u r c e o r d e s t i n a t i o n f i e l d may s p e c i f y a d d i t i o n a l o p e r a t i o n s , o r
s e v e r a l d i f f e r e n t s o u r c e o r d e s t i n a t i o n v a l u e s may s p e c i f y t h e
same b u s o p e r a t i o n s , T f r e s e p e c u l i a r i t i e s a r e s p e c i f i e d i n t h e
a p p r o p r i a t e s e c t i o n of this manual. The s o u r c e s a n d d e s t i n a t i o n s
a r e l i s t e d a n d t h e i r p r o p e r t i e s summarized i n Appendix D m In
g e n e r a l a n y s o u r c e may be s e n t t o a n y d e s t i n a t i o n , w i t h t h e
f o l 1 o w i n g " e x c e p t i o n : a s l o w s o u r c e may n o t be s e n t t o a s l o w
c destination.
S l o w s o u r c e s are:
a l o c a l memory
NOT F
t h e ALU;
KSTAT a n d KUNXT i n t h e d i s k i n t e r f a c e
s l o w d e s t i n a t i o n s are:
a l o c a l memory
Y i f the next i n s t r u c t i o n c o n t a i n s PQRCYY
Q if t h e n e x t i n s t r u c t i o n c o n t a i n s QODE o r QEVEN
T h e r e a r e also t w o f u n c t i o n f i e l d s F l a n d F2 w h i c h i n v o k e
v a r i o u s a c t i o n s supplementary t o the source-destination scheme ,
These actions a r e s p e c i f i e d w h e r e a p p r o p r i a t e t h r o u g h o u t t h e
manual a n d summarized i n Appendix C.
Th'e m a c h i n e i s SYnChrOnOuS, w i t h a c y c l e t i m e of 150 n s . The
t e c h n o l o g y w i t h which t h e p r o c e s s o r i s implemented is 74H TTL;
ICgs a r e mounted on w i r e - w r a p cards, and t h e back p a n e l s a r e a l s o
wire-wrapped. An e x c e p t i o n i s t h e 1 0 2 4 x 1 9 - b i t memory c a r d
w h i c h i s u s e d f o r the i n s t r u c t i o n , d i s p a t c h , map, a n d s c r a t c h
~ c. m e m x i e s ; t h i s card i s a p r i n t e d c i r c u i t . A l l cables e x i t t h e
processor from the rear edges of t h e cards. N o special
MICROPROCESSOR / Lampson, e t a l . MAXC 8,1 / Page 4
Xerox P a l o Alto R e s e a r c h C e n t e r March 2, 1972
mechanical p r o v i s i o n s are r e q u i r e d f o r c a b l i n g . The p r o c e s s o r i s
cooled b y a f a n u n i t which mounts i m m e d i a t e l y below t h e p r o c e s s o r
c a r d cage, a n d powered by a power s u p p l y mounted on t h e bottom o f
the cabinet.
The e x t e r n a l i n t e r f a c e s t o t h e p r o c e s s o r are shown d a s h e d i n
F i g u r e 1, and c o n s i s t of the f o l l o w i n g :
1, 8 disc u n i t cables, which c o n n e c t t h e d i s c control
p o r t i o n of the p r o c e s s o r t o 8 2 3 1 4 or . 3 3 3 8 t p e d i s c
files;
2. 2 memory p o r t cables, which c o n n e c t t o t w o p o r t s of t h e
MAXC memory system. T h i s memory is a 512K (expandable
t o l V 2 4 K ) x 4 0 b i t (+8 e r r o r c o r r e c t i o n and d e t e c t i o n
b i t s ) dynamic MOS system. Access time a n d c y c l e t i m e
a r e 880 ns, One p o r t i s u s e d f o r d i s k t r a n s f e r s , t h e
second for CPU t r a n s f e r s -
One i n t e r p r o c e s s o r communication cable (labeled "TO
NOVA"). T h i s i n t e r f a c e has two E u n c t i c n s .
a. I t carries i n t e r p r o c e s s o r ccmmunication strobes
between all p r o c e s s o r s o f the MAXC system. All
normal communication b e t w e n processors o c c u r s
t h r o u g h memory, a n d these s t r o b e s serve t o i n d i c a t e
t h e p r e s e n c e of messages i n mailbox l o c a t i o n s known
t o a l l processors.
b. I t i s c o n n e c t e d t o a c o n t r o l l i n g minicomputer (Data
G e n e r a l Nova), which h a s t h e t a s k of monitoring t h e
s y s t e m for error's and abnormal. c o n d i t i o n s . This
i n t e r f a c e i s used. for debugging microcode i n t h e
processor under c o n t r o l of a debugger i n t h e Nova.
The control memory of t h e microFrocessor i s loaded
v i a t h i s i n t e r f a c e a t s t a r t up, d u r i n g debugging,
and when errors o c c u r d u r i n g normal o p e r a t i o n .
1.1 N o t a t i o n
i n t h i s document a r e i n decimal unless followed
A l l .numbers
by a i n which case t h e y are o c t a l .
B, Thus, 10 = 12B.
Arithmetic is 2s complement.
Names f o r f i e l d s i n t h e m i c r o i n s t r u c t i c n are in Appendix A,
Registers, memories and d a t a paths are named L, R, P, Q, X, AC,
Y, B (bus) S ( s c r a t c h p a d ) I D ( d i s p a t c h ) MAP, I ( i n s t r u c t i o n
memory) , NPC, STACK, IMA ( i n s t r u c t i o n memcry a d d r e s s ) , MAR, MDR,
MDRL (low 4 bits of the 4 0 b i t memory word) BALUBC ( b u s and A L U
branch c o n d i t i o n s ) 8 F ( f l a g register) 8 ( o u t p u t of arithmetic-
c l o g i c u n i t ) , G, H, J, K t o (F r e g i s t e r b i t s ) .
MICROPROCESSOR / Lampson, e t a l . MAXC 8.1 / Page 5
Xerox Palo A l t o Research C e n t e r March 2 , 1 9 7 2
B i t s i n registers (and on d a t a ' p a t h s l i k e B and ALU) a r e
r e f e r e n c e d by i n t e g e r s i n b r a c k e t s f o l l o w i n g t h e r e g i s t e r name,
c o u n t i n g from t h e l e f t a s t h o u g h the r e g i s t e r (or p a t h ) were 36
b i t s wide. Numbering r e g i s t e r s i n t h i s way i s compatible w i t h
PDP-10 d o c u m e n t a t i o n ( i t would otherwise b e better t o number from
t h e : r i g h t ) , Thus B[0) i s t h e sign b i t of t h e b u s , Y[27 J i s t h e
s i g n b i t of the 9 - b i t Y r e g i s t e r , and B C 9 - 1 2 7 i s t h e AC f i e l d of
a PDP-10 i n s t r u c t i o n on t h e bus. For 4 0 - b i t r e g i s t e r s l i k e MDR,
the e x t r a 4 b i t s a r e MDR[36-39].
I f A is a number w i t h g b i t s and B a number w i t h bits, then
(A,B) is a number w i t h a+b bits a n d
(A, B) [ (36-b) - 3 5 ]=B
, (
-
(A,B) [ (36-a-b) ( 35-b) ]=A
D e s t i n a t i o n names a l w a y s a p p e a r a s NAME- a n d t h e y are t h e
o n l y names i n t h i s manua1,which a r e w r i t t e n w i t h a f i n a l to-. If
a r e g i s t e r i s both a s o u r c e and a d e s t i n a t i o n , these a r e a l w a y s
c a l l e d NAME (the s o u r c e ) a n d NAME- ( t h e d e s t i n a t i o n ) Also, some
o p e r a t i o n s c a n be i n i t i a t e d by e i t h e r prircary o r s e c o n d a r y
f u n c t i o n s , a n d t h e s e a r e g i v e n t h e same name i n F1 and F2, When
. a f i e l d i n t h e m i c r o i n s t r u c t i o n is u s e d t o address a memory M,
t h e f i e l d i s c a l l e d MA ( @ . g o , LA, RA, SA). Sources ,
d e s t i n a t i o n s , and functions p e r t a i n i n g t o t h e disk c o n t r o l
*
c. s e c t i o n of t h e . m i c r o p r o c e s s o r h a v e names b e g i n n i n g w i t h llKflr
. ..
The word 4 1 i l l e g a 1 1 f means llmust be avoided by the programmer,
s i n c e t h e . r e s u l t i s n o t w e l l - d e f i n e d by t h e i m p l e m e n t a t i o n of t h e
processor.Ic T h e - h a r d w a r e does not check f o r i l l e g a l o p e r a t i o n s .
MAP
II
1
6
W36
L. IMAWTEN- I
MICROPROCESSOR / Lampson, e t al. MAXC 8 . 1 / Page 6
Xerox Palo A l t o R e s e a r c h C e n t e r March 2, 1972
c- 2.0 Control
The c o n t r o l s e c t i o n of t h e p r o c e s s o r c o n s i s t s o f a n 1 1 - b i t
program counter (NPC) , a n 1 1 - b i t x 1 2 - l e v e l s u b r o u t i n e s t a c k ,
gating t o produce an i n s t r u c t i o n memory address, a n d t h e
i n s t r u c t i o n memory.
T h e p r o c e s s o r h a s s i n g l e i n s t r u c t i o n lookahead, L e o, t h e
f e t c h of a n i n s t r u c t i o n o c c u r s d u r i n g t h e e x e c u t i o n of t h e
previous instruction. A l l i n s t r u c t i o n s r e q u i r e one c y c l e f o r
execution. A n i d l e c y c l e ( d u r i n g which a n i n s t r u c t i o n is f e t c h e d
from t h e c o n t r o l memory, b u t no i n s t r u c t i o n is e x e c u t e d ) o c c u r s
o n l y a f t e r a read or w r i t e of t h e i n s t r u c t i o n memory. Execution
of a n i n s t r u c t i o n c a n be d e l a y e d one o r more c y c l e s by t h e memory
i n,-e r f a c e ; see s e c t i o n 5,
t
Three fields of t h e m i c r o i n s t r u c t i o n a r e used for c o n t r o l .
T h e s e a r e a n e l e v e n - b i t b r a n c h address f i e l d (BA) , a f i v e - b i t
f i e l d (BC) w h i c h s p e c i f i e s o n e of 3 2 c o n d i t i o n s t o be t e s t e d t o
d e t e r m i n e w h e t h e r a b r a n c h is t o be d o n e , and a t m - b i t f i e l d
which s p e c i f i e s t h e t y p e of branch (BT). The BT f i e l d i s
i n t e r p r e t e d as follows:
-
TYPE
0
EFFECT
GOTO (BA f i e l d ) I F ( c o n d i t i o n )
1 CALL (BA f i e l d ) I F ( c o n d i t i o n )
2 RETURN I F ( c o n d i t i o n )
3 DGOTO (BA f i e l d ) I F ( c o n d i t i o n )
c--^--
I_ . . ..
. .
I f BT = DGOTO a n d t h e b r a n c h c o n d i t i o n i s t r u e , n o i n t e r r u p t c a n
o c c u r a f t e r t h i s i n s t r u c t i o n (see s e c t i o n 2.1) ,
-- - - - - - - -
The c o n d i t i o n selected b y BC (see Appendix B) i s tested, a n d
if t r u e , t h e b r a n c h s p e c i f i e d by BT occurs, The branch
c o n d i t i o n s which t e s t t h e v a l u e s of t h e ALU c u t p u t and t h e b u s
r e f e r t o t h e v a l u e s computed b y t h e p r e v i o u s i n s t r u c t i o n ( u n l e s s
c
-F1 = FRZBALUEC and INT=8 i n t h a t i n s t r u c t i o n , i n which case t h e y
--
have t h e same r e s u l t t h a t t h e y would have had in that
;instruction). T h o s e which test b i t s i n r e g i s t e r s r e f e r t o t h e
value a t - t h e b e g i n n i n g of t h e c u r r e n t i n s t r u c t i c n , Note t h a t t h e
complement of e v e r y b r a n c h c o n d i t i o n i s a l s o a branch c o n d i t i o n .
.._._"_ -
, . - - .- - . . -.-
T a b l e l a s p e c i f i e s how t h e n e x t i n s t r u c t i o n a n d t h e n e x t
program c o u n t e r . (NPC) v a l u e a r e d e t e r m i n e d b y t h e c u r r e n t
'
i n s t r u c t i o n and t h e i n t e r r u p t system. Note t h a t a deferred
b r a n c h .(DGi)TD) " a X l B w s t h e n e x t i n s t r u c t i o n i n s e q E n c e t o be
< e x e c u t e d before s e n d i n g c o n t r o l t o t h e l o c a t i o n s p e c i f i e d by BA.
The e f f e c t o f a DGOTO can t h e r e f o r e be c a n c e l l e d ' b y a GOTQ o r
RETURN i n t h e n e x t i n s t r u c t i o n , a n d a CALL i n t h e n e x t
i n s t r u c t i o n w i l l push the address s u p p l i e d by t h e DGOTO, The
e f f e c t of DGOTO B[25-353 is p r o v i d e d by F2=LOADPC.
MICROPXOCESSOR d Lampson, e t al, MAXC 8 1 / Page 7
.
X e r o x P a l o A l t o Research C e n t e r March 2 , 1972
The 12-level s u b r o u t i n e stack h o l d s r e t u r n links for
s u b r o u t i n e c a l l s and i n t e r r u p t s , The ways i n which the stack can
be a f f e c t e d by t h e c u r r e n t i n s t r u c t i o n are s p e c i f i e d i n Table l b .
T h e STACK- d e s t i n a t i o n p u s h e s two 11-bit f i e l d s from t h e b u s o n t o
t h e - s t a c k ; normally t h i s i s combined w i t h F2=LOADPC t o provide a
3-level d i s p a t c h . I t is i l l e g a l t o do a RETURN i n the
i n s t r u c t i o n following o n e w h i c h does STACK-. N o e x p l i c i t PUSH
o p e r a t i m i s provided, s i n c e t h e same e f f e c t c a n be obtained b y
LOADPC, I3[25-35 ]-argument t o be p u s h e d ;
CALL .+l;
The s t a c k c a n be r e a d o n t o t h e b u s , (right j u s t i f i e d ) ; it i s
i l l e g a l t o do t h i s i n a n i n s t r u c t i o n w h i c h h a s a CALL o r PUSH o f
t h e stack,
. .
' c.
- .
....
. .-
.
--.a - . . *
. . .--.- .
.. . .
. .
. . -
_
.
. . --
-
-
,- . .
MICROPROCESSOR / Lampson, e t a l . MAxC 8 1
. / Page a
Xerox Palo A l t o Research Center March 2, 1972
(r
A c t i o n of C u r r e n t Address o f Next Next V a l u e
Instruction I n s t r u c t i o n (XMA) of NPC
No b r a n c h N PC NPC + 1
N o branch G i n t e r r u p t INTADR NPC
GOTO BA BA + 1
GOTO G i n t e r r u p t INTADR BA
DGOTO NPC BA
DGOTO G i n t e r r u p t --not a l l o w e d ; i n t e r r u F t is delayed-
CALL BA EA + 1
CALL E I n t e r r u p t INTADR BA
RETURN STACK STACK + 1
RETURN & i n t e r r u p t I NTADR STACK
Note : F2=LOADPC makes the n e x t v a l u e of NPC be B[25-35]
r e g a r d l e s s of w-hat is s a i d above,
T a b l e la. , I n s t r u c t i o n S e q u e n c i n g
* A c t i c n of C u r r e n t Effect on S t a c k
1n s t r u c ti on
lC CALL PUSH NPC
L . RETURN POP
F1 O r F2=POP* POP
BD=STACK-.* PUSH B[1-111, t h e n .
P U S H BC13-23 J
* I l l e g a l i t h e same i n s t r u c t i o n w i t h CALL o r RETURN
n
Table lb: S t a c k Actions
MICROPROCESSOR / Lampson, e t al, mxc 8.1 Page 9
Xerox P a l o Alto Research C e n t e r March 2, 1 9 7 2
21
. Interrupts
An i n t e r r u p t system i s p r o v i d e d t o allow h i g h s p e e d d e v i c e s
s u c h a s t h e d i s k s t o be s e r v i c e d , The e l e m e n t s of t h e i n t e r r u p t
s y s t e m are:
1.. A flag, INT, which d e t e r m i n e s w h e t h e r t h e processor i s
i n normal mode o r i n i n t e r r u p t mode,
2. D u p l i c a t e copies of some p r o c e s s o r registers; see below
for d e t a i l s .
3, A 1 6 - b i t A R M r e g i s t e r , o n e b i t per i n t e r r u p t c h a n n e l ,
T h i s r e g i s t e r may be a b u s d a t a s i n k o r s o u r c e (selected
by f u n c t i o n s ) , An i n t e r r u p t r e q u e s t for which t h e '
c o r r e s p n d i n g ARM b i t i s 0 i s i g n o r e d .
. 4, - A
2.2) -
single interkupt e n a b l e f l a g i n t h e F r e g i s t e r (see
The f i r s t 1 6 m i c r o i n s t r u c t i o n s a r e reserved for a n i n t e r r u p t
t r a n s f e r vector, When a n i n t e r r u p t o c c u r s , the i n s t r u c t i o n i n
l o c a t i o n n ( 0 5 n L 17B) is e x e c u t e d and XNT i s s e t , T h e
i n t e r r u p t i n s t r u c t i o n i s s i m p l y sandwiched i n t o t h e n o r m a l flow .
.
c,
-- of c o n t r o l , so t h a t when i t is i n e x e c u t i o n , NPC c o n t a i n s t h e
a d d r e s s of t h e i n s t r u c t i o n w h i c h t h e program would have e x e c u t e d
d u r i n g t h a t c y c l e i f t h e i n t e r r u p t had n o t o c c u r r e d . The
i n t 2 r r u p t i n s t r u c t i o n must c o n t a i n an u n c G n d i t i o n a 1 CALL t o s a v e
NPC on t h e s t a c k and s e n d c o n t r o l t o t h e s t a r t of the i n t e r r u p t
r o u t i n e , T h e last i n s t r u c t i o n of t h e i n t e r r u p t r o u t i n e s h o u l d b e
a RETUZN w h i c h i n c l u d e s t h e I R E T f u n c t i o n , T h i s f u n c t i o n c l e a r s
INT and r e s t o r e s t h e s t a t e t o i t s p r e - i n t e r r u p t v a l u e , - See below
for a d e s c r i p t i o n of t h e t i m i n g .
The scheme just described w o r k s o n l y i f e v e r y t h i n g c u r r e n t l y
known a b o u t t h e s e q u e n c i n g of t h e main program i s c o n t a i n e d i n
the NPC v a l u e , S i n c e t h i s i s n o t the case immediately a f t e r t h e
e x e c u t i o n of an i n s t r u c t i o n w h i c h loads NPC w i t h a n y t h i n g e x c e p t
IMA + 1, a n i n t e r r u p t i s n o t permitted t o o c c u r a f t e r s u c h a n
i n s t r u c t i o n , b u t must w a i t f o r a more o p p o r t u n e moment. Only
i n s t r u c t i o n s c o n t a i n i n g F2=LOADPC o r a s u c c e s s f u l DGOTO have t f i s
problem, and t h e processor a u t o m a t i c a l l y i n h i b i t s an i n t e r r u p t
from o c c u r r i n g in t h e c y c l e a f t e r t h e s e i n s t r u c t i o n s ,
It is t h e programmer's r e s p o n s i b i l i t y t o i n h i b i t i n t e r r u p t s
i n other cases where t h a t is n e c e s s a r y by s e t t i n g F2=INHI,NT,
T h i s must be done - .- I . ..
1. If BD = RMW- or F1 = RMWREF o r RMWTiEFDXK, s i n c e a n
c i n t e r r u p t c a n n o t be a l l o w e d d u r i n g t h e Wl p h a s e of a Raw
memory r e f e r e n c e , T h e p r o c e s s o r a u t o m a t i c a l l y i n h i b i t s
i n t e r r u p t s a f t e r e v e r y i n s t r u c t i o n of t h e RM p h a s e
MICROPROCESSOR / Lampson, et al, MAXC 8.1 / Page 10
Xerox P a l o A l t o R e s e a r c h C e n t e r March 2 , 1972
except the f i r s t , so t h e programmer need p r o v i d e F2 =
INHINT o n l y on the i n s t r u c t i o n which starts the
reference.
2.. If BD = WRITE- o r 5'1 = WREF or WREFDXK and MDR does n o t
y e t c o n t a i n t h e d a t a which i s t o be w r i t t e n (see s e c t i o n
5). If a n o t h e r i n s t r u c t i o n i s e x e c u t e d before MDR i s
loaded, t h e programmer must have F2 = INHINT on t h a t
instruction also, I t i s n o t n e c e s s a r y t o INHINT on a n
i n s t r u c t i o n c o n t a i n i n g WRESTART, b u t i f - b y t h e e n d o f
t h e i n s t r u c t i o n a f t e r t h e WRESTART, MDX i s n o t loaded,
t h e n t h a t i n s t r u c t i o n must I N H I N T , I t i s not necessary
t o have F2 = I N H I N L ' on t h e i n s t r u c t i o n which l o a d s MDR,
s i n c e a n i n t e r r u p t . a f t e r t h a t i n s t r u c t i o n c a u s e s no
t.ro ubl e
- ~ ..
.
~.
When i n t e r r u p t s a r e i n b i b i t e d , a n y pending i n t e r r u p t i s s i m p l y
delayed. N o - p e n d i n g i n t e r r u p t r e q u e s t i s l o s t . Note t h a t a l o o p
c o n s i s t i n g e n t i r e l y of i n s t r u c t i o n s w i t h s u c c e s s f u l D G O T W s ,
LOADPC's or I N H I N T ' S w i l l lock . o u t i n t e r r u p t s i n d e f i n i t e l y .
-:.o
t
Because m i c r & i n t e r r u p t r o u t i n e s a r e used for data t r a n s f e r s
and from t h e d i s k packs, it i s i m p o r t a n t t o avoid t i m e -
consuming s t a t e s a v i n g and r e s t o r i n g b y m i c r o - i n t e r r u p t r o u t i n e s . .
W i t h ' a s i n g l e d i s k u n i t i n o p e r a t i o n , e a c h a d d i t i o n a l micro-
i n s t r u c t i o n i n t h e i n t e r r u p t r o u t i n e r e d u c e s t h r o u g h p u t by 1%.
C o n s e q u e n t l y , c o n s i d e r a b l e extra hardware h a s been p u t i n t o
a u t o m a t e s t a t e s a v i n g and r e s t o r i n g d u r i n g i n t e r r u p t s .
.. ..
:. . During non- i n t e r r u p t instruction execution, duplicate
XegLsters for P,. X , . Y and BALUBC a r e loaded whenever t h e p r i m a r y
registers a r e loaded., . During an i n t e r r u ~ t , however, these
d u p l i c a t e r e g i s t e r s remain f r o z e n a t t h e i r former v a l u e s . The
p r i m a r y X, Y , and BALUBC r e g i s t e r s a r e lo a d e d from t h e d u p l i c a t e s
by t h e - IRET f u n c t i o n , . The- f i r s t - i n s t r u c t i o n - . of t h e i n t e r r u p t
l m u t h e i s " e x p e c t e d t o - s a v e NPC on t h e s t a c k b y c a l l i n g t h e
i n t e r r u p t r o u t i n e , . and t o . s a v e Q i n o n e of t h e r e g i s t e r banks,
-say:-*.-at,r- SAVEDQ;: : t h i s -:
. is why- d u p l i c a t e s f o r Q and NPC a r e n o t
provid2d.. The f i n a l - i n s t r u c t i o n of t h e i n t e r r u p t r o u t i n e must,
t o cestore a l l t h e s e t h i n g s , i n c l u d e :
_. . -
--.---I
_.I.. 9 ~ -- -I..I_~ - - . . .. - . . . _ _--.
.
- .
.. _- 1 >- f
': :-
I ,
: .. *I IRET., RETURN, Q-SAVEDQ, PlP1
-. - .
I I
-
.
. _ . .-" " - . - I ~ ..
. .
. .
A- ' d u p l i c a t e - r e g i s t e r - f o r K U N I T i s a l s c F r o v i d e d , b u t this is
handled . i n a d i f f e r e n t way, d i s c u s s e d i n s e c t i o n 7 , A l s o note
t h a t - .AC and- F- axe.-n o t - d u p l i c a t e d . (because i n t e - r r u p t r o u t i n e s o n l y
c h a n g e F i n t e n t i o n a l l y and d o n ' t u s e AC) .
The i n t e r r u p t -system a c c e p t s 1 6 l e v e l s c a l l e d i n t e r r u p t
c. r e q u e s t s : ( I R E Q i , 1 = 0 t o 15). I n t e r r u p t i w i l l Occur a f t e r the
e x e c u t i o n of the c u r r e n t i n s t r u c t i o n i f :
MICROPROCESSOR / Lampson, e t a l . EAXC 8 1 / Page 1 1
.
Xerox Palo A l t o Research C e n t e r March 2, 1972
c- 1 -
. INT = 0 (i.e. , n o i n t e r r u p t is i n p r o g r e s s ) or FI =
PREIRET i n t h e p r e v i o u s i n s t r u c t i o n . Note t h a t t h i s
i m p l i e s t h a t if P R U R E T is n o t used, a t l e a s t one non-
i n t e r r u p t i n s t r u c t i o n i s e x e c u t e d a f t e r each i n t e r r u p t
. r o u t i n e i s done, before t h e next one is s t a r t e d . To
a v o i d t h i s , t h e n e x t t o l a s t i n s t r u c t i o n of the
i n t e r r u p t r o u t i n e s h o u l d s p e c i f y F1 = PREIRET. The n e x t
i n s t r u c t i o n a f t e r one which h a s PREIRET must h a v e I R E T .
2. IENABLE ( a f l a g r e g i s t e r bit) = 1. When t h e i n t e r r u p t
s y s t e m is d i s a b l e d a l l i n t e r r u p t s h a v e t o w a i t .
3. N o READ-MODIFY-WRITE is i n i t s RM p h a s e (i.e., has
s t a r t e d t o read b u t n o t s t a r t e d t o write).
4 -
. The c u r r e n t i n s t r u c t i o n does n o t have F2 = INHZNT o r
LOADPC or a s u c c e s s f u l DGOTO,
5.. i i s t h e l a r g e s t number for w h i c h A R M i AND I R E Q i = 1.
Changes i n t h e v a l u e of A R M or IENABLE do n o t a f f e c t t h e
. i n t e r r u p t system u n t i l t h e s e c o n d f o l l o w i n g i n s t r u c t i o n . Thus i f
i n s t r u c t i o n i clears IENABLE, a n i n t e r r u p t may o c c u r ( i f t h e
o t h e r c o n d i t i o n s a r e s a t i s f i e d ) a f t e r i o r a f t e r i+l, b u t will
c n o t occur a f t e r i + 2 .
., *- .
c, . .
, e
MICROPROCESSOR / Lampson, e t a l . MAXC 8,1 / Page 12
Xerox P a l o Alto Research C e n t e r March 2 , 1 9 7 2
c 2a2 F l a q Reqister
The 3 6 - b i t f l a g r e g i s t e r F s e r v e s as a r e F o s i t a r y f o r v a r i o u s
f l a g s i n t h e p r o c e s s o r and p r o v i d e s a number of g e n e r a l - p u r p o s e
s i n g l e b i t f l a g s w h i c h c a n be c o n v e n i e n t l y nianipulated, Some
b i t s of F a r e s e t ox cleared by assorted e v e n t s i n t h e p r o c e s s o r ;
t h e s e a r e mentioned i n c o n n e c t i o n w i t h t h e d e s c r i p t i o n of t h e
r e l e v a n t e v e n t a n d summarized in Appendix E. I n a d d i t i o n , there
a r e o p e r a t i o n s which wowk on a l l t h e b i t s of F;
NOT F reads NOT F o n t o t h e b u s
SETF [ s ] sets t h e b i t s of F which a r e 1 i n S [ s ]
SETFCC s , cond ] does SETFCs] i f t h e b r a n c h c o n d i t i o n i s
t r u e . _ ( t h e r e w i l l a l s o be a b r a n c h i f t h e
condition is t r u e )
CLEARns J c l e a r s t h e b i t s of F which a r e 1 i n S[sJ
CLEARFCC s, cond J dQes CLEARFCs] i f t h e branch c o n d i t i o n i s
t r u e (there w i l l also be a b r a n c h i f t h s
condition is true)
,
SETFBC s cond] does S E T F l s ] i f t h e b r a n c h c o n d i t i o n i s
t r u e , CLEARF [ s ] i f i t i s f a l s e ( t h e r e
w i l l a l s o be a b r a n c h i f t h e c o n d i t i o n is
true).
SETSF[ s 3 sets b i t s of F selected by S[ s J[ 32-35 J
c ( i a e a , K,. J, H , a n d G ) i f (F A N D S[sJ AND
-20B) # 0 ,
A l l of these a r e s p e c i f i e d by f u n c t i o n s e x c e p t NOT F, w h i c h i s a
bus s o u r c e , SETSF[ s3 is also a F2, G , w # J and K are b i t s of F
w h i c h c a n be t e s t e d by branch c o n d i t i o n s ; t h e y c a n also be set i n
a v a r i e t y of ways (see Appendix E . )
For i = ,6, 1, . . ., 35, if
the i n s t r u c t i o n c o n t a i n s SETF, CLEARF o r SETFB, o r
i f i t c o n t a i n s SETFC o r CLEARFC and t h e b r a n c h
c o n d i t i o n i s t r u e , or i 2 32 a n d i t c o n t a i n s SETSF;
b i t i of t h e word r e a d from S i s 1 ;
bit i of t h e f l a g r e g i s t e r ( F [ i J) is b e i n g s e t or
cleared i n d e p e n d e n t l y by some o t h e r p a r t of t h e
processor ;.
then t h e new v a l u e of F[ i ] i s t h e OR of t h e v a l u e i t would hav2
gotten from (1) a n d ( 2 ) above, a n d t h e v a l u e i t would h a v e g o t t e n
from ( 3 ) above. .
- - : - I
MICROPROCESSOR / Lampson, e t a l . MAXC 8 1 1 Page 13
.
Xerox P a l o Alto Research C e n t e r March 2, 1972
c 3.0 Arithrnetic/Loqic Section
The a r i t h m e t i c / l o g i c s e c t i o n of t h e p r o c e s s o r is shown i n the
u p p e r l e f t q u a r t e r of F i g u r e 1. I t c o n s i s t s of two r e g i s t e r .
b s n k s L and R w i t h 32 r e g i s t e r s p e r bank, two working r e g i s t e r s P
and Q, m u l t i p l e x i n g for i n p u t s t o P a n d Q, and a 36-bit
arithme t i c / l o g i c unit (ALU) .
3.1 R e q i s t e r Banks
The t w o r e g i s t e r banks a r e addressable from t w o f i v e - b i t
f i e l d s L A and RA i n t h e m i c r o i n s t r u c t i o n , or from t h e low o r d e r
f i v e b i t s of the 8 - b i t X.- r e g i s t e r , or from t h e 4 - b i t AC register.
T h e s a u r c e of a r e g i s t e r bank address is determined by t h e
a p p r o p r i a t e A f i e l d as f o l l o w s :
% *
. 1) A = 0 or 1 : t a k e t h e address frcm X
2) A = 2 o r 3: ta&e t h e address frcm AC
3) A = 4: a d d r e s s _ r e g i s t e r 4 , b u t n e v e r write i n t o i t
- (see be$ow)
4) A > 4: address, register A
The above r u l e s imply t h a t r e g i s t e r s 0 - 3 c a n only be
r e f e r e n c e d frcm X o r AC, (and r e g i s t e r 4 can be s t o r e d i n t o o n l y
'C when addressed v i a X or A . @ Far t h e l e f t bank, i f LA = 1 (3) a n d
X [32-35]=0(AC=B) , t h e i n s t r u c t i o n w i l l read t h e v a l u e 0
r e g a r d l e s s of t h e c o n t e n t s of t h e r e g i s t e r addressed a n d w i l l n o t
write i n t o t h e r e g i s t e r bank. T h i s k l u d g e i s p o v i d e d so t h a t
PDP-18 indexing and self-instructions can be emulated
conveniently. R A = 1 , 5 3 ) . 1 is t h e same a s RA=0 ( 2 ) .
The X r e g i s t e r c a n , be: goaded from f 1 -
B 28-35']
[
B 14--17.3 ( P D P 4 0 ,Lindex-.f i e l d ) ':-- -
[ . -__- - .
B[ 6-11"] j+dJPpI?-.lOl y t e ; - p o l n t.e r s i. z .e. . f i e l d )
. -. .
CL
b . .
- .
c c : - .c: 1 -.:r. 1.
: .... -&
.- - "
The AC reg:ist eg Fan, be . & a d e d - h b m l . .__ ..~
-
Bc 32-35.) -' 5;: ,,
. .
-
. . . ...
'.-,:.I
- I ~ .^
- ._._ .
.-
a (
.
-
r
"
B[ 9-12;].. 2.-(P?P-,0. AC. f i e l d ) . . . .. . . . . ,
I-
. ._. ~
- --C)P P : 5 ;- 2."
,,
'
Both r e g i , s t e r s may be incremented and . decremented w i t h
f u n c t i o n s a n d may: be read-onto: t h e b u s ( r i g h t j u s t i f i e d ) X[ 30-
35.1- may a l s o - b e r e a d , o n t o - t h e b u s - l e f t - j u s t i f i e d ( L e o, into B [ P
$3; t h i s p u t s i t i n t h e PDP-10 b y t e p o i n t e r p s i t i o n f i e l d . Two
b r a n c h c o n d i t i o n s e x i s t t o t e s t t h e s i g n of X. The value of X
( b u t n o t .AC) i s p r e s e r v e d across an i n t e r r u F t .
I n each i n s t r u c t i o n i t i s p o s s i b l e t o a r e a d from or w r i t e into
c. ( b u t n o t b o t h ) t h e l e f t r e g i s t e r bank, and i n d e p e n d e n t l y t o do
t h e same w i t h t h e r i g h t r e g i s t e r bank. T h e d e c i s i o n on whether
t o read or w r i t e is made a s follows. I f t h e r e g i s t e r bank is
MICROPROCESSOR / Lampson, e t a l , MAXC 8 - 1 / Page 1 4
Xerox Palo A l t o Research C e n t e r March 2, 1972
addressed by PS o r QS, i t i s read, ` O t h e r w i s e , it i s w r i t t e n
u n l e s s t h e microinstruction a d d r e s s e s r e g i s t e r 4 , i n which case
n o t h i n g i s done, Note t h a t L A = 1 or 3 may o v e r r i d e t h i s for t h e
l e f t bank i f r e g i s t e r 0 i s addressed by X[32-351 o r AC.
3.2 and Q Rcqisters; C y c l e a n d Mask
The m u l t i p l e x e r s on t h e i n p u t s t o P and Q are under c o n t r o l
of t w o f i e l d s PS a n d QS i n t h e m i c r o i n s t r u c t i o n , The p o s s i b l e
i n p u t s f o r t h e working registers selected b y t h e s e f i e l d s a r e
g i v e n i n T a b l e s 2 and 3. P a n d Q a r e always l o a d e d w i t h t h e d a t a
s p e c i f i e d by these t a b l e s w i t h two e x c e p t i o n s ; P i s n o t l o a d e d
if F 1 = LDPALUH AND ALU@=H; P 0 is n o t l o a d e d i f FZ=ASHOVF.
. .~
When P is l o a d e d from a n y t h i n g e x c e F t B, P1 o r ALU RSH 1 it
-
'
is possible t o mask t h e i n p u t with 2**n 1, L e a , keep the
r i g h t m o s t n b i t s of i n p u t a n d z e r o t h e rest. This a c t i o n is
selected by one of four f u n c t i o n s :
Function -
N
SAMASK SA
BMIASK BAS
AMASK AF ( l i m i t s N to < 40B)
XMASR X register
where t h e mask l e n g t h n = M A X ( 3 6 , N mod 64). If F l is n o t o n e of
t h e s e f o u r , no masking takes p l a c e ,
Note that t h e mask a n d PS f e a t u r e s allow a n a r b i t r a r y f i e l d
t o be e x t r a c t e d from P (or Q, u s i n g RCYQQ or NOTALU, u s i n g
RCYNOTALUQ) and p u t i n t o P r i g h t j u s t i f i e d . The f i e l d c a n be
s p e c i f i e d either by t h e i n s t r u c t i c n ( u s i n g one of SA, BA and AF)
o r b y t h e X(3length) and Y ( r i g h t c y c l e r e q u i r e d ) r e g i s t e r s .
F2=ASHOVF, i n a d d i t i o n t o i n h i b i t i n g t h e l o a d i n g of PB, s e t s
t h e f l a g r e g i s t e r b i t OVF t o 1 i f P0#P1; t h e i n t e n d e d u s e is t o
s e t O V F i f a l e f t s h i f t would have changed t h e s i g n of P. T h e r e
are branch c o n d i t i o n s (QODD, QEVEN) t o t e s t t h e bottom bit of Q
a t t h e `start of t h e i n s t r u c t i o n . They a r e i l l e g a l i f Q w a s
loaded from a slow s o u r c e i n t h e l a s t h s t r u c t i . c n .
I n normal mode (INT = 0 ) I b o t h P a n d P1 are loaded when
l o a d i n g of P is specified by t h e i n s t r u c t i o n . I n t h e i n t e r r u p t
r o u t i n e s (INT=1) , t h e l o a d i n g of P1 is i n h i b i t e d . P1 t h u s
preserves t h e c o n t e n t s of P a c r o s s t h e i n t e r r u F t r o u t i n e . The
h s t i n s t r u c t i o n of t h e i n t e r r u p t r o u t i n e s h o u l d therefore h a v e
PS = P 1 a s w e l l as IRET.
c.
MICROP'ROCESSOR / Lampson, e t a l e MAXC 8,l / Page 15
Xerox P a l o Alto Research C e n t e r March 2, 1 9 7 2
3.3 _ A r i t h m e t i c and Loqic O p e r a t i o n s
- The A L U c a n compute a l l 1 6 Boolean f u n c t i o n s of P and Q as
w e l l as a number of a r i t h m e t i c f u n c t i o n s , Its operation i s
c o n t r o l l e d by a 5 - b i t f i e l d i n t h e i n s t r u c t i o n c a l l e d AF. The
v a l u e s of A F which produce t h e v a r i o u s ALU f u n c t i o n s a r e
s p e c i f i e d i n Table 4. '
The a r i t h m e t i c f u n c t i o n s ( A F 1 2 0 ) are a f f e c t e d by t h e v a l u e
:
of C A R R Y I N , which i s 0 unless one of t h e f u n c t i o n f i e l d s s e l e c t s
1.( F l o r F2=CARRYl) or 3 ( F l = S E T J C B C A R R Y J ) .
)
I n a d d i t i o n t o t h e 3 6 - b i t r e s u l t s p e c i f i e d by T a b l e 4 , the
ALU p r o v i d e s three a d d i t i o n a l b i t s f o r the a r i t h m e t i c f u n c t i o n s
s t a r r e d i n T a b l e 4-,
ALWCB is t h e c a r r y o u t of b i t 0 from t h e twos-complement
add s p e c i f i e d i n p a r e n t h e s e s i n Table 4,
ALUCl is t h e c a r r y o u t of b i t 1
OVERFLOW i s ALUCiEl # ALUC1, I t is 0 i f t h e 3 6 - b i t twos-
:-.. complement result correctly represents the
- s p e c i f i e d f u n c t i o n , 1 i f t h e r e s u l t is wrong by
, -
-
+235
.. L_
_ .
The f k n c t i o n SETOVPC01 se-t.s Elag r e g i s t e r b i t s PC0 a n d PCl t o
t h e values of ALUC0 a n d ALUCLkeS..pectively and crs OVERFLOW i n t o
. flag r e g i s t e r b i t OVF, T h e " - ' f u n c t i o n SETJCBCLAXRYJ sets J t o
ALUCB, The. f u n. c t. i o n SETHQVF- sets H to ALUCB#ALUCl,
. _ , .. .
The v a l u e of t o 0 i s stored i n
t h e 3 6 - b i t ALU o u t p u t r e l a t i v e
BALURC and may be t e s t e d , b y a branch c o n d i t i o n i n t h e n e x t
,instruction. AL'U8 (for PDP-lf3 f l o a t i n g p o i n t n o r m a l i z a t i o n ) and
30-axe a l s o s t o r e d - i n EVUUBC -and. may'be tested. T h i s information ~"
3's a u t o m a t i c a l l y p r e s e r v e d a c r o s s i n t e r r u p t s ,
- - If INT=ET a n d
:Fl=FRZBALUBC-, B A L - U B C ' h -'frozen a t i t s p r e v i o u s v a l u e r a t h e r than
b e i n g u p d a t e d to k e f i e c ' t '-the're'sults o t h e c u r r e n t i n s t r u c t i o n ,
. . , _- -
r
* - -
*
.
- . -
r
.
.
__ .. r.,," , - _ . _.- - - . . . . ..". . -. .. . . .
_ -
.
- _
..
-.
- - I
,
?
<
. .-
%
. . P
I. r
. ' -
~
~
_ - I .
3.4
. -
h.. Communication w i t h thkl.3us - .
?\..?-. - .-
~
) - . -. '.. , - . r . ~ I
. _ . . .
./ The a r i t h m e t k c j . l o g i c . . sec-ti"on- communicates w i t h t h e r e s t of
- .
-&he p r o c e s s o r v i a a 't h e - bus- .- (aside from f l a g b i t s and b r a n c h
conditions), A s mentioned above, X and AC c a n be l o a d e d from or
read- o n t o t h e b u s , a n d , P -- or, Q can be l o a d e d fvom t h e bus.
L o a d h g o f - P-and Q - i s . ' c o n t . r e l l e d -
by PS and Q S a s described above
knd does n o t r e q u i r e . t h e ' d - e s t i n a t i o n f i e l d . Note t h a t P and Q
:is,
s$&L.>klwa s : ..- Zoa3e.d. ." o. -i&-the programmer' s r e s p o n s i b i l i t y t o
y s,
! ~ v L e s e l e c t P and Q S Q when he does n o t wish t h e v a l u e s t o
PS
@ha_nge-. ' I n a d d i t i o n , ' Q and the ALU r e s u l t nay be read o n t o the
b u s by- s p e c i f y i n g them a s s o u r c e s , and. t h e r e is a f u n c t i o n
READALU t o or t h e ALU r e s u l t w i t h the b u s v a l u e s p e c i f i e d by the
(J s o u r c e f i e l d , . Note t h a t t h e ALU is a slow bus source,
t
MICROPROCESSOR / Lampson, et al. MAXC 8.1 / Page 16
Xerox Palo Alto Research C e n t e r Earch 2, 1972
PS ( o c t a l ) P Input Notes (see n e x t page)
0-4 6 PQ RCYC 0-461 1
47 B cannot be masked
50 P1 cannot be masked
51 ALU
52 A L U ARSHC 1 (P0-ALUCB) c a n n o t be masked
53 L LS@3J 4
54 L LsH[2] 4.
55 L LSHCl] 4
56 L
57 L RSH[ 13
6&1 L RSH[ 2 3
. 61 L RSH[3]
62 R LSH[ 3 7
63 R LsH[2]
64 R LSH[ 1 J
65 R
66 R RSHCl]
67 R RSHC2 J
70 R RSH[ 3 )
* c, 71
72
73
PQ LCY[3]
PQ LCY[ 2 1
PQ I J W ~ J
74 unused
75 PQ RCYCYJ 1,2: I l l e g a l i f Y w a s
loaded from a slow
s o u r c e o n the pre-
v i o u s instruction.
PQ RCYC 44-Y] 1,2,3: Illegal i f Y
was loaded on the
previous i n s t r u c t i o n ,
or if I N T = = l . BEWARE.
unused
Table 2: P Input S e l e c t i o n
."I_ -
--
- I I
MICROPROCESSOR / Lampson, e t a l . MAXC 8 . 1 / Page 1 7
Xerox P a l 0 Alto Research Center March 2 , 1 9 7 2
Notes:
1.. PQ is a 7 2 - b i t number which can have one of the following
va h e s :
Condition L e f t 36 b i t s R i q h t 36 b i t s
F l o r F2=RCYQQ Q Q
F1 or F2=RCYfiQ 0 Q
Fl=RCYNC>TALUQ NOT A L U Q (must have AF<20B)
othe rwi s e P Q
The resulting P i n p u t i s the leftmost 3 6 b i t s of t h e c y c l e d 72-
bit number.
2.. A l s o s e t s H to (Y I 44B) If Y > 4 4 B , then l e t C = (Y IF PS
= PQ RCY Y ELSE 44B-Y MOD 100B IF PS = PQ RCY44E-Y) The P i n p u t
w i l l be PQ LCY (1,2,3) foy C = 77E,76E,75E. It w i l l be something
w e l l - d e f i n e d b u t u s e l e s s o t h e r w i s e , L e e , if H is s e t t o 1 t h e
r e s u l t i s probably wrong.
3. Note t h a t RCY44B-Y i s not the same as LCY Y , s i n c e i t is a l s o
n e c e s s a r y to exchange P and Q.
4.. Zeros a r e s h i f t e d into the v a c a t e d b i t p s i t i o n s .
Table 2:. P Input Selection (continu.ed)
I
I
I I
.
-
-
**
MICROPROCESSOR / Lampson, et al. MAXC 8 1
. 1 Page 18
Xerox Palo A l t o Research C e n t e r March 2, 1972 \
es * p Input Notes
0 L
1 R
2 ALU
3 B
4 Q Q is a slow sink i f t h e n e x t
i n s t r u c t i o n has BC=Q9DD o r QEVEN
#
5 R RSH 1 Q0iALU35 IF PS=ALU RSHl ELSE
R35 IF * ELSE 0
6 Q RSH 1 Q0qP35 IF F2=ASHOVE ELSE
Q35 IF * ELSE 0
7 Q LSH 1 Q35- (ALUB#G) IF FlzQ3SALUG ELSE
Q@ 1.F * ELSE 0
* F1 = RCYQQ or F 2 = RCYQQ or F1 = RCYNOTALUQ
Table 3: Q I n p u t Selection
?
MICROPROCESSOR / Lampson, et a l . MAXC 8 1 / Page 1 9
.
Xerox P a l o Alto R e s e a r c h Center March 2, 1 9 7 2
AF Result AF R e s