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5 4 3 2 1
86 7IVMIV &PSGO (MEKVEQ FAN + SENSOR
MAX6657MSA
PAGE 4
CLOCK GEN
ICS951463
CPU PAGE 5
D
DISCHARGER D
YONAH-CM CIRCUIT
PAGE 37
PAGE 2,3
Power On Sequence
FSB PAGE 40
533MHz
DC/BATT IN
LVDS & INV
PAGE 12
ATI DDR2-533 Dual Channel DDR2
PAGE 41
CPU VCORE
CRT OUT
PAGE 13
RC415M SO-DIMM X 2
PAGE 50
TV OUT 415MD: 02G110013320 PAGE 14,15,16
T/P 415ME: 02G110013300 SYSTEM PWR
PAGE 6,7,8,9,10,11
PAGE 51
DMI interface
PAGE 30
C C
BAT & CHARGER
PCIE *1 MINI CARD
PAGE 57
WLAN
KEYPAD
MATRIX
ATI PAGE 26
LPC
PAGE 29
EC IT8510/8511 33MHz SB600 PCIE *1 NEW
INSTANT KEY CARD
PAGE 38
PAGE 29,30 Azalia PAGE 25
02G110012310 (A21)
PAGE 02G110012302 (A13)
17,18,19,20 10/100 LAN
LED Control RTL8100CL
PAGE 30,38 PAGE 34,35
USB PCI
SATA2 IDE
ISA 33MHz
ROM
USB 2.0
CardBus
B PAGE 24
CON X4 R5C832 1394 B
HDD PAGE 31,32
PAGE 36 PAGE 32
(PATA,SATA)
PAGE 28
Bluetooth
Azalia Codec ODD PAGE 27 CardBus CARD READER
Realtak R5C841 PAGE 33
PAGE 28
660VD PAGE 21,22,23 Camera PAGE 43,44
PAGE 12
FingerPrint PCMCIA
PAGE 32
PAGE 39
A A
TPM
PAGE 42
Title : BLOCK DIAGRAM
ASUSTeK COMPUTER INC
Engineer: MICHAEL WANG
Size Project Name Rev
Custom T12RG 2.0
Date: , 07, 2007 Sheet 1 of 63
5 4 3 2 1
5 4 3 2 1
+VCCP_AGTL+ +VCCP
@
JP201
1 2
SHORT_PIN
2.5A
6 H_A#[16..3]
+VCCP +VCCP 5,6,10,17,19,20,52 6 H_REQ#[4..0]
+VCCP_AGTL+ +VCCP_AGTL+ 3 6 H_A#[31..17]
D D
12G011204792==>12G04600479A
V1.1 ME
T202
H_D#[0..63] 6
U201A
H_A#3 J4 H1 H_ADS#
H_A#4 A[3]# ADS# H_BNR# H_ADS# 6
L4 E2 U201B
H_A#5 A[4]# BNR# H_BPRI# H_BNR# 6 H_D#0 H_D#32
M3 A[5]# BPRI# G5 H_BPRI# 6 E22 D[0]# D[32]# AA23
H_A#6 K5 H_D#1 F24 AB24 H_D#33
H_A#7 A[6]# H_DEFER# H_D#2 D[1]# D[33]# H_D#34
M1 H5 H_DEFER# 6 E26 V24
H_A#8 A[7]# DEFER# H_DRDY# H_D#3 D[2]# D[34]# H_D#35
N2 A[8]# DRDY# F21 H_DRDY# 6 H22 D[3]# D[35]# V26
H_A#9 J1 E1 H_DBSY# H_D#4 F23 W25 H_D#36
H_A#10 A[9]# DBSY# H_DBSY# 6 H_D#5 D[4]# D[36]# H_D#37
N3 A[10]# G25 D[5]# D[37]# U23
H_A#11 P5 F1 H_BR0# R201 H_D#6 E25 U25 H_D#38
H_A#12 A[11]# BR0# H_BR0# 6 H_D#7 D[6]# D[38]# H_D#39
P2 56Ohm E23 U22
H_A#13 A[12]# H_IERR# H_D#8 D[7]# D[39]# H_D#40
L1 A[13]# IERR# D20 +VCCP_AGTL+ K24 D[8]# D[40]# AB25
H_A#14 P4 B3 H_INIT# H_D#9 G24 W22 H_D#41
H_A#15 A[14]# INIT# H_INIT# 17 H_D#10 D[9]# D[41]# H_D#42
P1 A[15]# J24 D[10]# D[42]# Y23
H_A#16 R1 H4 H_LOCK# H_D#11 J23 AA26 H_D#43
H_ADSTB#0 L2 A[16]# LOCK# H_LOCK# 6 H_D#12 D[11]# D[43]# H_D#44
6 H_ADSTB#0 2 1 +VCCP_AGTL+ H26 Y26
ADSTB[0]# H_CPURST# H_D#13 D[12]# D[44]# H_D#45
RESET# B1 H_CPURST# 6 F26 D[13]# D[45]# Y22
H_REQ#0 K3 F3 H_RS#0 R202 H_D#14 K22 AC26 H_D#46
C H_REQ#1 REQ[0]# RS[0]# H_RS#1 H_RS#0 6 H_D#15 D[14]# D[46]# H_D#47 C
H2 F4 54.9Ohm @ H25 AA24
H_REQ#2 REQ[1]# RS[1]# H_RS#2 H_RS#1 6 H_DSTBN#0 D[15]# D[47]# H_DSTBN#2
K2 G3 H_RS#2 6 T201 6 H_DSTBN#0 H23 W24 H_DSTBN#2 6
H_REQ#3 REQ[2]# RS[2]# H_TRDY# H_DSTBP#0 DSTBN[0]# DSTBN[2]# H_DSTBP#2
J3 REQ[3]# TRDY# G2 H_TRDY# 6 6 H_DSTBP#0 G22 DSTBP[0]# DSTBP[2]# Y25 H_DSTBP#2 6
H_REQ#4 L5 H_DINV#0 J26 V23 H_DINV#2
REQ[4]# H_HIT# 6 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 6
HIT# G6 H_HIT# 6
H_A#17 Y2 E4 H_HITM#
H_A#18 A[17]# HITM# H_HITM# 6 H_D#16 H_D#48
U5 A[18]# N22 D[16]# D[48]# AC22
H_A#19 R3 AD4 H_D#17 K25 AC23 H_D#49 Layout Note:
H_A#20 A[19]# BPM[0]# H_D#18 D[17]# D[49]# H_D#50
W6 A[20]# BPM[1]# AD3 P26 D[18]# D[50]# AB22 Comp0,2 connect with Z0=27.4 ohm,
H_A#21 U4 AD1 H_D#19 R23 AA21 H_D#51
A[21]# BPM[2]# +VCCP_AGTL+ D[19]# D[51]# make trace length shorter than 0.5".
H_A#22 Y5 AC4 H_D#20 L25 AB21 H_D#52
H_A#23 A[22]# BPM[3]# PRDY# D[20]# D[52]# H_D#53 Comp1,3 connect with Z0=54.9 ohm,
U2 AC2 1 T203 H_D#21 L22 AC25
H_A#24 A[23]# PRDY# H_PREQ# R203 56Ohm @ H_D#22 D[21]# D[53]# H_D#54 make trace length shorter than 0.5".
R4 A[24]# PREQ# AC1 L23 D[22]# D[54]# AD20
H_A#25 T5 AC5 H_TCK 1 R204 2 56Ohm H_D#23 M23 AE22 H_D#55 Comp[3:0] at least 25 mils away from
H_A#26 A[25]# TCK H_TDI R205 56Ohm H_D#24 D[23]# D[55]# H_D#56 any other toggling signal.
T3 A[26]# TDI AA6 1 2 P25 D[24]# D[56]# AF23
H_A#27 W3 AB3 H_TDO R206 56Ohm @ H_D#25 P22 AD24 H_D#57 27.4 ohm connects with an ~18mil
H_A#28 A[27]# TDO H_TMS R207 56Ohm GND H_D#26 D[25]# D[57]# H_D#58
W5 A[28]# TMS AB5 1 2 P23 D[26]# D[58]# AE21 wide trace to comp0.
H_A#29 Y4 AB6 H_TRST# 1 R208 2 56Ohm H_D#27 T24 AD21 H_D#59 54.9 ohm connect with 5mil-wide
H_A#30 A[29]# TRST# CPU_DBR# T204 +VCCP_AGTL+ H_D#28 D[27]# D[59]# H_D#60
W2 A[30]# DBR# C20 1 R24 D[28]# D[60]# AE25 to comp1
H_A#31 Y1 TPC28T H_D#29 L26 AF25 H_D#61
H_ADSTB#1 A[31]# H_PROCHOT_S# H_D#30 D[29]# D[61]# H_D#62
6 H_ADSTB#1 V4 ADSTB[1]# PROCHOT# D21 T25 D[30]# D[62]# AF22
A24 CPU_THRM_DA H_D#31 N24 AF26 H_D#63
H_A20M# THERMDA CPU_THRM_DC CPU_THRM_DA 4 H_DSTBN#1 D[31]# D[63]# H_DSTBN#3
A6 A25 R209 M24 AD23
17 H_A20M# H_FERR# A20M# THERMDC CPU_THRM_DC 4 6 H_DSTBN#1 H_DSTBP#1 DSTBN[1]# DSTBN[3]# H_DSTBP#3 H_DSTBN#3 6
A5 1KOhm N25 AE24
17 H_FERR# H_IGNNE# FERR# PM_THRMTRIP# 6 H_DSTBP#1 H_DINV#1 DSTBP[1]# DSTBP[3]# H_DINV#3 H_DSTBP#3 6
C4 C7 1% M26 AC20
17 H_IGNNE# IGNNE# THERMTRIP# PM_THRMTRIP# 19 6 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 6
H_STPCLK# D5 GTL_REF AD26 R26 H_COMP0 R210 1 2 27.4Ohm 1%
17 H_STPCLK# H_INTR STPCLK# GTLREF COMP[0]
C6 <500 mil (55 Ohm) MISC U26 H_COMP1 R211 1 2 54.9Ohm 1% GND
17 H_INTR H_NMI LINT0 CLK_CPU_BCLK COMP[1]
B4 A22 U1 H_COMP2 R212 1 2 27.4Ohm 1%
17 H_NMI H_SMI# A3
LINT1 BCLK[0]
A21 CLK_CPU_BCLK# CLK_CPU_BCLK 5
C201 R213 T/B trace 5 @ R214 1 2 TEST1 C26
COMP[2]
V1 H_COMP3 R215 1 2 54.9Ohm 1%
17 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 5 TEST1 COMP[3]
B 0.1UF/10V 2KOhm Space 25 1KOhm B
AA1 @ 1% R216 1 2 TEST2 D25 E5 H_DPRSTP#
RSVD[1] TEST2 DPRSTP# H_DPSLP# H_DPRSTP# 17,50
AA4 T22 51Ohm B5
RSVD[2] RSVD[12] DPSLP# H_DPWR# H_DPSLP# 17
AB2 A2 GND D24
RSVD[3] RSVD[A2] CPU_BSEL0 DPWR# H_PWRGD H_DPWR# 6
AA3 RSVD[4] 5 CPU_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGD 17
M4 D2 GND GND CPU_BSEL1 B23 D7 1
RSVD[5] RSVD[13] 5 CPU_BSEL1 CPU_BSEL2 BSEL[1] SLP#
N5 F6 C21 AE6 T205
RSVD[6] RSVD[14] 5 CPU_BSEL2 BSEL[2] PSI#
T2 D3 H_CPUSLP#
RSVD[7] RSVD[15] PM_PSI# H_SLP# 6,17
V3 RSVD[8] RSVD[16] C1 PM_PSI# 50
B2 AF1 BCLK FSB BSEL2BSEL1BSEL0 12G04600479A
RSVD[9] RSVD[17]
C3 RSVD[10] RSVD[18] D22 12G04600479A
RSVD[19] C23 133 533 L L H
B25 C24
RSVD[11] RSVD[20]
166 667 L H H
12G04600479A 68 ? 5% pull-up to Vcc1_05
If PROCHOT# is not used, then it must be terminated with a
56 pull-up resistor to VCCP.
If PROCHOT# is routed between CPU, IMVP and MCH,
pull-up resistor has to be 75 Ohm ? 5%
+VCCP_AGTL+
R217
A H_PROCHOT_S# A
56Ohm
Title : YONAH CPU (1)
ASUSTeK COMPUTER INC
Engineer: MICHAEL WANG
Size Project Name Rev
Custom T12RG 2.0
Date: , 07, 2007 Sheet 2 of 63
5 4 3 2 1
5 4 3 2 1
+VCCP_AGTL+ +VCCP_AGTL+ 2
+VCORE +VCORE 50
+1.5VO +1.5VO 54
+VCORE
YUNAH FSB667 YUNAH FSB667
U201D
D LFM TYP HFM Min Typ Max A4 VSS[1] VSS[82] P6 1215---PWR comp Vcc Core Decoupling Caps D
VCC 1.14V 1.2V 1.356V VCCP 0.997V 1.05V 1.102V A8 P21 Place the cap on North
C4 C3 C0 Min Typ Max A11
VSS[2]
VSS[3]
VSS[83]
VSS[84] P24
+
CE301 Primary side => Bottom side
A14 R2 of Secondary side
330UF/2V
ICC 0.9A 7.59A 27A ICCP 2.5A A16
VSS[4]
VSS[5]
VSS[85]
VSS[86]
R5 N/A Secondary side => Top side
A19 VSS[6] VSS[87] R22
A23 VSS[7] VSS[88] R25
A26 T1 GND
VSS[8] VSS[89]
B6 VSS[9] VSS[90] T4
B8 VSS[10] VSS[91] T23
+VCORE +VCORE B11 T26
VSS[11] VSS[92]
B13 VSS[12] VSS[93] U3 Place these upper side inside socket cavity on L1
U201C B16 U6
VSS[13] VSS[94]
A7 VCC[1] VCC[68] AB20 B19 VSS[14] VSS[95] U21
A9 AB7 B21 U24
VCC[2] VCC[69] VSS[15] VSS[96] C302 C303 C304 C305 C306 C307
A10 AC7 B24 V2
VCC[3] VCC[70] VSS[16] VSS[97]
A12 VCC[4] VCC[71] AC9 C5 VSS[17] VSS[98] V5
A13 AC12 C8 V22 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
VCC[5] VCC[72] VSS[18] VSS[99]
A15 VCC[6] VCC[73] AC13 C11 VSS[19] VSS[100] V25
A17 VCC[7] VCC[74] AC15 C14 VSS[20] VSS[101] W1
A18 VCC[8] VCC[75] AC17 C16 VSS[21] VSS[102] W4 GND GND GND GND GND GND
A20 AC18 C19 W23
VCC[9] VCC[76] VSS[22] VSS[103]
B7 VCC[10] VCC[77] AD7 C2 VSS[23] VSS[104] W26
B9 VCC[11] VCC[78] AD9 C22 VSS[24] VSS[105] Y3 Place these lower side inside socket cavity on L1
B10 VCC[12] VCC[79] AD10 C25 VSS[25] VSS[106] Y6
B12 VCC[13] VCC[80] AD12 D1 VSS[26] VSS[107] Y21
B14 AD14 D4 Y24 C308 C309 C310 C311 C312 C313
VCC[14] VCC[81] VSS[27] VSS[108]
B15 VCC[15] VCC[82] AD15 D8 VSS[28] VSS[109] AA2
B17 AD17 D11 AA5 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
VCC[16] VCC[83] +VCCA +1.5VO VSS[29] VSS[110] @ @ N/A N/A @ @
B18 VCC[17] VCC[84] AD18 D13 VSS[30] VSS[111] AA8
C B20 VCC[18] VCC[85] AE9 D16 VSS[31] VSS[112] AA11 C
C9 AE10 JP301 D19 AA14 GND GND GND GND GND GND
VCC[19] VCC[86] VSS[32] VSS[113]
C10 VCC[20] VCC[87] AE12 1 1 2 2 D23 VSS[33] VSS[114] AA16
C12 VCC[21] VCC[88] AE13 D26 VSS[34] VSS[115] AA19
C13 AE15 1MM_OPEN_5MIL E3 AA22 Place these upper side inside socket cavity on L6
VCC[22] VCC[89] @ VSS[35] VSS[116]
C15 AE17 E6 AA25
VCC[23] VCC[90] VSS[36] VSS[117]
C17 VCC[24] VCC[91] AE18 E8 VSS[37] VSS[118] AB1
C18 AE20 E11 AB4
VCC[25] VCC[92] VSS[38] VSS[119] C314 C315 C316 C317
D9 VCC[26] VCC[93] AF9 E14 VSS[39] VSS[120] AB8
D10 AF10 E16 AB11
VCC[27] VCC[94] VSS[40] VSS[121] 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
D12 VCC[28] VCC[95] AF12 E19 VSS[41] VSS[122] AB13
D14 VCC[29] VCC[96] AF14 E21 VSS[42] VSS[123] AB16
D15 VCC[30] VCC[97] AF15 E24 VSS[43] VSS[124] AB19
D17 VCC[31] VCC[98] AF17 F5 VSS[44] VSS[125] AB23 GND GND GND GND
D18 AF18 +VCCP_AGTL+ F8 AB26
VCC[32] VCC[99] VSS[45] VSS[126]
E7 VCC[33] VCC[100] AF20 F11 VSS[46] VSS[127] AC3 Place these lower side inside socket cavity on L6
E9 VCC[34] F13 VSS[47] VSS[128] AC6
E10 VCC[35] VCCP[1] V6 F16 VSS[48] VSS[129] AC8
E12 VCC[36] VCCP[2] G21 F19 VSS[49] VSS[130] AC11
E13 J6 F2 AC14 C319 C320 C321 C322
VCC[37] VCCP[3] VSS[50] VSS[131]
E15 VCC[38] VCCP[4] K6 F22 VSS[51] VSS[132] AC16
E17 M6 F25 AC19 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
VCC[39] VCCP[5] VSS[52] VSS[133] @ N/A N/A @
E18 VCC[40] VCCP[6] J21 G4 VSS[53] VSS[134] AC21
E20 K21 G1 AC24
VCC[41] VCCP[7] +VCCA VSS[54] VSS[135]
F7 VCC[42] VCCP[8] M21 120mA / 20mil G23 VSS[55] VSS[136] AD2 GND GND GND GND
F9 VCC[43] VCCP[9] N21