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GALLO 1.0
PV BUILD
2006.02.08




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EE DATE POWER DATE
INVENTEC




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DRAWER




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DESIGN




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CHECK TITLE
RESPONSIBLE GALLO 1.0




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SIZE = 3 VER : SIZE CODE DOC. NUMBER REV




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FILE NAME : XXXX-XXXXXX-XX A3 CS Model_No A01




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DATE CHANGE NO. REV P/N XXXXXXXXXXXX SHEET 1 OF 58




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TABLE OF CONTENTS




PAGE PAGE PAGE
5- DC& BATTERY CHARGER 23- CALISTOGA-3 41- EQ&MIC JACK
6- SELECT & BATTERY CONN 24- CALISTOGA-4 42- AUDIO AMP&HP JACK
7- SYSTEM POWER(3V/5V) 25- CALISTOGA-5 43- HDD CONN
8- SYSTEM POWER(V2.5S/V1.5A) 26- DDR2-DIMM0 44- ODD CONN
9- SYSTEM POWER(VCCP/VGAVCC) 27- DDR2-DIMM1 45- USB CONN
10- SYSTEM POWER(V1.8/V0.9S) 28- DDR2-DAMPING 46- CARDBUS CONTROLL
11- CPU POWER(VCC_CORE) 29- CRT & SVEDIO CONN 47- PC CARD SLOT
12- DDR TERMINATION VOLTAGE 30- LCD CONN 48- 1394 CONN
13- POWER(SLEEP) 31- ICH7-1 49- MINICARD CONN
14- POWER(SEQUENCE) 32- ICH7-2 50- LAN INTERFACE-1
15- CLOCK_GENERATOR 33- ICH7-3 51- LAN RJ45 CONN
16- YOHNA-1 34- ICH7-4 52- DOCKING CONN
17- YOHNA-2 35- ICH7-5 53- SCREW
18- YOHNA-3 36- KBC 54- MDC1.5 CONN
19- YOHNA-4 37- SPI/HDD PROTECTION 55- BLUETOOTH
20- THERMAL&FAN CONTROLLER 38- INT.KBC/POINT DEVICES 56- BUTTON & SWITCH & LED
21- CALISTOGA-1 39- SUPER I/O 57- LED/SWITCH CONN
22- CALISTOGA-2 40- AC97/AZALIA CODEC 58- LED/SWITCH BOTTON BOARD




INVENTEC
TITLE
GALLO 1.0
SIZE CODE DOC. NUMBER REV
A3 CS Model_No A01
CHANGE by CHANG ALEX 8-Feb-2006 SHEET 2 OF 58
XDP
Yohna 478
P19 (uFCPGA)
P16~19 ICS9LP306
Clock generator
P15




FSB DDR II _SODIMM0 DDR II _SODIMM1
LCM LVDS P26 P27


P30 Calistoga DDR2 Interface
1466 PCBGA
DDR2 Interface
PM P21~25
CRT
SPI
EEPROM
P29
P37

DMI
SATA
HDD P43


3.3V, PCI_Interface,33MHz

ODD
P44 ICH7-M
652 BGA PCI_EXPRESS
P31~35
Bluetooth




CONN C
CONN A


CONN B
USB3
USB0




USB4


USB5




USB7
USB6
Dock


Dock
LAN TI_PCI4512
MINI CARD BCM 4401 CARD BUS
P49 P50~51 P46
P55 P45 P45 P45 P52 P52




RJ45
3.3V, 33MHz/Azalia Cardbus 1394
PORT REPLICATOR
SLOT A CONN
P47 P48




BATTERY MDC_1.5/Modem AZALIA_1981HD
P5~6
Module 56K LPC

P54 P40




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System Charger &




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DC/DC System power RJ11 Super I/O INVENTEC




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Kahuna Lite2




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P7~13 47N217 KBC1021 TITLE
GALLO 1.0




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P39 P36




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SIZE CODE DOC. NUMBER REV




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A3 CS Model_No A01




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CHANGE by CHANG ALEX 8-Feb-2006 SHEET 3 OF 58




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ADP_EN
OCP OCP_OC#
ADP_PS0
ADP_PS1 +V5A +V5S

+V3A
CHGCTRL_3 5/3.3V
Charger
Adapter ADP_PRES +V5AL
(BQ24703) ADP_PRES KBC_PW_ON (TPS51120)
(90W)
SLP_S3#_5R +V3AL
AC_AND_CHG

+V3S
+VBDC



Main Battery V1.5S_PG
SLP_S3#_5R
BATSELB +VBATA +V1.5S
Selector +V2.5S
IO POWER LR
AC_AND_CHG (Discrete) +VBATB +VCCP
Travel Battery (TPS51124)
CHGCTRL_3 PWR_GOOD_3 VCCP_PG


BATCON

+VBATR LR +V0.9S
(TPS51100)
SLP_S3#_3R M_VREF



IO POWER +V1.8
+V1.8S
(TPS51117)
V1.8_PG
SLP_S5#_3R
SLP_S3#




+VCC_CORE
IMVP VI

PWR_GOOD_3 (MAX8736

PM_DPRSLPVR +MAX8552)
VR_PWRGD_CK410

PSI#




INVENTEC
TITLE
GALLO 1.0
SIZE CODE DOC. NUMBER REV
A3 CS Model_No A01
CHANGE by CHANG ALEX 8-Feb-2006 SHEET 4 OF 58
52-,47-,44-,43-,42-,40-,39-,38-,34-,32-,29-,20-,14-,13-,11-,10-,8-,5-
DC JACK Q28 52-,47-,44-,43-,42-,40-,39-,38-,34-,32-,29-,20-,14-,13-,11-,10-,8-,5-
+V5S +V5S
1 R896 2 2 3 56-,55-,52-,51-,50-,37-,34-,33-,32-,30-,19-,14-,13-,7-

S D

+VADPBL +VADP +VADPTR 100_5% BSS84_3P +V3A
36- ADP_ID
L1 G
1 R726 2
6-,5- Q6 52-,5- JACK1 1 +VADP




1
1
NFM60R30T222




7
8
9
8 1 5A 1 2 +VADPTR 5A +VADP R724 100K_5% 10K_5%
D S 1 POWER 52-,5-
7 2 2 ID 133K_1%
6 3 52-,5- 1 R727
4 3 3 POWER U14 2 3




2
5 4 1 1 R715 1
5 + U517
G 1 C5003 1 C2 1 C14 1 C3 1 C4 R719 R714 ON_LM393DR2G_SOP_8P 10K_5% R709 2




ID Function Test




4
5
6
AM4825P_AP 1 R522 1 182K_1% 22.6K_1% 3 + 8 47K_5% 4 - OUT
C508 2 2 2 10PF_50V 0.1UF_25V
2 2 1
1 2 10PF_50V 0.1UF_25V 1 ON_LM339DR2G_SOP_14P
R523 1 FOX_JPD113E_LB106_7F_9P 2 2
2 - OUT 2
R725
2 0_5% 2 0.1UF_25V R11 +VADP 12
OPEN 220K_5% R718 36- 80.6K_1% 1 R184 2
2 4 1 ADP_EN
OPEN




2




1
52-,5-
R156 2
1 C214 604K_1%
1 2 R52 R51 1 220K_5%
2 1 2 1 1M_5% 2 0.027UF_10V +V3S
1 D508 R521 52- R720 1




57-,56-,54-,49-,48-,47-,46-,44-,40-,39-,37-,36-,34-,33-,32-,31-,30-,29-,27-,26-,24-,21-,20-,15-,14-,13-,11-,10-,8-,5-
100K_5% LIMIT_SIGNAL 200K_5% 47K_5% 2 10K_1% R717 1 2

1B E 0_5% R713 Q23 3




SSM3K7002F
2 1N4148_OPEN 2 2 D




1
SSM14_1A40V 47K_5% 1G 10K_5% 32-
2 C
3 D Q29




2N7002_OPEN
D4 1 Q15 2 2 OCP_OC#
D3 2 MMBT3906 3 2 D16 S




1N4148
1N4148 0_5% G 2 8 2 R186
U14 1N4148 Q22




2
1 52- ACOCP_EN# R721 5 + 12
Q10




2
S
3
OUT 7




D6
ADP_EN# 5- 1 1 ON_LM339DR2G_SOP_14P D
8 D S 1 1 R544 2 6 - 6 - OUT 1G




1




1

2
7 2 2 R53 1 ON_LM393DR2G_SOP_8P 1 R183 2 1
20K_5%
7 +
S
6 3 4 R716 U517 2
210K_1% 3.9K_5%




SSM3K7002F
5 4 1