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TABLE OF CONTENTS

SHEET

0.4 MEMORY CONTROL CARD BLOCK DIAGRAM

1. WRITE, CREFRESH', MREF, LDMDR, CYCLE RCV, MDCLK, ~MD'

2. REFRESH COUNTER, CAS REGISTERS
3. ADDRESS SELECTION LOGIC, RASDLY, LRASDLY
4. MEMORY BANK SELECTION
5. LOW 64K BANK DRIVERS FOR ADDRESS, CAS', WRITE'
6. LOW BANK A
7. LOW BANK B
8. LOW BANK C
9. LOW BANK D
10. DATA REGISTER, CONTROL REGISTER, CHECK BIT GENERATOR
11. MEMORY CHIP DATA PATHS
12. MEMORY DATA BUFFERS
13. SYNDROME GENERATOR
14. ERROR CORRECTION DATA PATHS
15. ERROR LOG REGISTER
16. RESISTORS AND R-DiPS
17. CAPS, DIODES, AND FUSES
18. TEST POINTS
19. FILTER CAPS
20. FILTER CAPS
21. TEST POINT AND EDGE CONNECTOR LISTINGS
22. EDGE CONNECTOR LISTING
23. EDGE CONNECTOR AND SIGNAL LISTINGS
24.-45. SIGNAL LISTING

MCC