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A A
Compal Confidential
Schematics Document
B
Intel CLARKSFIELD/ARRANDALE B
with IBEX PEAK-M core logic
Cartier DIS
C
LA-4901P C
2009-12-01
REV:1.0
D D
S ecurity Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/09/15 Deciphered Date 2009/12/31 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
Size D o c u m ent Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
C u s t om L A -4 9 0 1 P 1 .0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D a te: T u e s day, December 15, 2009 Sheet 1 of 54
1 2 3 4 5
1 2 3 4 5
Accelerometer
Compal Confidential
File Name : LA-4901P
The rmal Sensor Fan C ontrol DP to Docking
Cartier DIS L IS302DLTR
Page 4 Page 36 Page 34
E M C 2113
Page 4
A Mobile A
XDP C onn.
LCD co nn PEG X 16 A uburndale / Clarksfield DDR3 1066/1333M Hz 1.5V DDR3-SO-DI MM X 2 Page 4
Page 19 N 1 0 M-GLM BANK 0, 1, 2, 3 Page 9,10
Socke t-rPGA989 Dual Channel
C RT Page 20,21,22,23 CK505
Page 18 37.5mm*37.5mm
Page 4,5,6,7,8 Clo ck Generator
CRT to Docking ICS9LPRS397
Page 36 V RAM
D D R3-512MB DMI X4 E-SAT A and USB Page 11
DP co nn
Page 18
Page 24,25 SATA4 comb o conn x 1(For
I/O) Page 32
USB x2 (Docking)Page 34
B E xpress Card 54 WW AN Card USB2.0
B
PCIE X1 + USB X1 PCIE X1 USB2.0 Finger Printer VFM451 daughte r board
Audio Board Page 28
Intel Ibex Peak M U SBx1 Modular Page 33
Azalia
USB conn x 3(For I/O)
1071pins BT Co nn USB x 1
Page 32
25mm*27mm SATA0
PCI -E BUS
USB x1(Camara)
10/100/10 00 LAN WL AN Card Richo R5 C835 SATA1
Page 19
WLAN + PCIE X1 PCI BUS
Page 12,13,14,15,16,17
I ntel Hansville GbE Page 28
Controller MDC V1 .5 R J11
PHY Page 31 Cable
Page 26 Page 30
Audi o CKT TPA6047A
IDT 92HD75 AMP & Audio Jack
Audio Board
RJ45 CONN Audio Board
Page 27
1394 port Smar tModular SD/MMC Board
Card
Audio
S lot
C SAT A ODD Connector C
Page 12
2.5" SATA HDD Connector
LPC B US Page 12 Page 34
Docking CONN.
(2) PS/ 2 Interfaces
RT C CKT. LED (2) USB 2.channels
Page 12 Audio Board (2) SATA Channels
(2) Display Port Channels
(1) Se rial Port
TPM1.2 SMSC Super I/O (1) Pa rallel Port
P ower OK CKT. SMSC KBC 1098 (1) Line In
Page 37 SLB9635TT LPC47N217 Page 36 (1) Line Out
Page 33 page 35 (1) RJ45 (10/100/1000)
(1 ) VGA
COM1 LPT (1) 2 LAN indicator LED's
Po wer On/Off CKT. Touch P ad CONN. In t.KBD ( Docking ) ( Docking ) (1) Power Button
Page 31 Page 31 Page 31 Page 34 Page 34
(1) I2C interface
D D
Track Point CONN.
Page 31
DC/DC Interface CKT.
Page 38
SPI R OM S ecurity Classification Compal Secret Data Compal Electronics, Inc.
8MB Page 33 Issued Date 2008/09/15 Deciphered Date 2009/12/31 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagram
Size D o c u m ent Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
C u s t om L A -4 9 0 1 P 1 .0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D a te: T u e s day, December 15, 2009 Sheet 2 of 54
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1
( O MEANS ON X MEANS OFF )
Voltage Rails Symbol Note :
+RTCVCC +B +5VALW +3VM +1.5V +5VS
+3VL +3VALW +1.05VM +0.75V +3VS
+1.5VS : means Digital Ground
power
plane +VGA_CORE
+VCCP
+CPU_CORE : means Analog Ground
+1.05VS
+1.8VS
State
S0
O O O O O O Install below 45 level BOM structure
S1 45@ : means just put it in the BOM of 45 level.
O O O O O O
S3
O O O O O X
S5 S4/AC
O O O O X X
S5 S4/ Battery only
O O X X X X Install below 43 level BOM structure
S5 S4/AC & Battery @ : means just reserve , no build
don't exist
O X X X X X
CONN@ : means ME part.
VRAM@ : means VRAM strip pin part.
A A
SMBUS Control Table
THERMAL
SOURCE BATT XDP SODIMM CLK CHIP MINI CARD DOCK NIC SENSOR G-SENSOR
SMB_EC_CK1
SMB_EC_DA1
SMSC1098 V X X X X X X X X
SMBCLK
SMBDATA
Calpella X V V V V V X X V
SML0CLK
SML0DATA
Calpella X X X X X X V X X
SML1CLK
SML1DATA
Calpella X X X X X X X V X
S ecurity Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/09/15 Deciphered Date 2009/12/31 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
Size D o c u m ent Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
C u s t om L A -4 9 0 1 P 1 .0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D a te: T u e s day, December 15, 2009 Sheet 3 of 54
1
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Layout rule 10mil width tr ace +VCCP +VCCP +VCCP
length < 0.5", spacing 20mil PM_EXTTS#0 R1 1 2 10K_0402_5%
JCPU1B C O NN@ 2009/02/06 HP DB-2
20_0402_1% 1 2 R2 C O M P3 AT23 PM_EXTTS#1 R3 1 2 10K_0402_5% P M _ P W R B TN#_R R 909
1 @ 2 1K_0402_5%
COMP3 C L K _ BCLK
A16 C L K _ C P U_BCLK 15
BCLK
MISC
20_0402_1% 1 2 R5 C O M P2 AT24 B16 C L K _BCLK# 2008/10/09 HP
COMP2 BCLK# C L K _ C P U_BCLK# 15 + 1.5V
CLOCKS
49.9_0402_1% 1 2 R7 C O M P1 G16 AR30 C L K _ C PU_XDP X D P_TDO R 1 01 2 51_0402_5%
COMP1 BCLK_ITP C L K _ C PU_XDP#
AT30
49.9_0402_1% 1 BCLK_ITP#
2 R9 C O M P0 AT26 This shall place near XDP
1
COMP0 C L K_EXP
E16 C LK_EXP 13
PEG_CLK C LK_EXP# R 1218
D16 C LK_EXP# 13
T P _ S KTOCC# PEG_CLK# 1K_0402_5%
T2 AH24
SKTOCC# R11
A18 1 2 0_0402_5% 2009/04/13 Compal DB-3
DPLL_REF_SSCLK R13
A17 1 2 0_0402_5%
2
H _ C A T E RR# DPLL_REF_SSCLK#
A AK14 A
CATERR#
THERMAL
S S M3K7002F_SC59-3
Q 87
S
D
F6 3 1 D R A M R ST# 9,10
SM_DRAMRST#
15 H _ P E CI 1 R16 2 H _ P E C I_ISO AT15
0_0402_5% PECI AL1 S M _ R COMP0
SM_RCOMP[0] S M _ R COMP1
G
AM1
2
to power; PU to VCCP at power side also SM_RCOMP[1] S M _ R COMP2
AN1 P C H _ D D R _ RST 5 ,15
SM_RCOMP[2]
46 H _ P R O C HOT# 1 R17 2 H _ P R O C H OT#_D AN26
0_0402_5% PROCHOT# PM_EXTTS#0 from DDR
AN15 T3
PM_EXT_TS#[0]
DDR3
MISC
AP15 PM_EXTTS#1 R 18 1 2 0_0402_5% 2009/07/02 HP SI-1b
PM_EXT_TS#[1] PM_EXTTS#1_R 9,10
1
1
15,20 H _ T H E R MTRIP# 1 R19 2 H _ T H E R M TRIP#_R AK15
0_0402_5% THERMTRIP# R 1219 @ C 997
100K_0402_5% 470P_0402_50V8J
AT28 X D P _ P R DY# 2 2009/07/21 HP SI-2
2
PRDY# X D P _PREQ#
AP27
PREQ#
AN28 X D P_TCK
TCK
H _ C P U R ST# 1 R20 2 H _ C P U R S T#_R AP26 AP28 X DP_TMS
RESET_OBS# TMS
PWR MANAGEMENT
0_0402_5% AT27 X D P_TRST#
TRST#
JTAG & BPM
14 H _ P M _ S Y NC 1 R21 2 H _ P M _ S Y N C_R AL15 AT29 X D P_TDI
0_0402_5% PM_SYNC TDI X D P_TDO
AR27
TDO X D P_TDI_M
AR29
H_CPUPWRGD 1 R22 2 V C C P W R G O OD_1 AN14
0_0402_5% VCCPWRGOOD_1
TDI_M
TDO_M
AP29 X D P_TDO_M CPU XDP Connector
AN25 X D P _ D BRESET# JP1
DBR#
15 H _ C P U P W R G D 1 R24 2 V C C P W R G O OD_0 AN27 1 2
0_0402_5% VCCPWRGOOD_0 X D P _PREQ# GND0 GND1
3 4 C FG 8 5
X DP_BPM#0 X DP_BPM#0 R 1016 0_0402_5% X D P _ P R DY# OBSFN_A0 OBSFN_C0
AJ22 1 2 5 6 C FG 9 5
BPM#[0] OBSFN_A1 OBSFN_C1
14 P M _ D R A M _ P WRGD 1 R26 2 V D D P W R G O O D _R AK13 AK22 X DP_BPM#1
5 C F G 12
R 1017 1 @ 2 0_0402_5% 7 8
0_0402_5% SM_DRAMPWROK BPM#[1] X DP_BPM#2 X DP_BPM#1 R 1018 0_0402_5% X D P_BPM#0_R GND2 GND3
AK24 1 2 9 10 C FG 0 5
from power BPM#[2] X DP_BPM#3 R 1019 @ 0_0402_5% X D P_BPM#1_R OBSDATA_A0 OBSDATA_C0
AJ24 5 C F G 13 1 2 11 12 C FG 1 5
BPM#[3] X DP_BPM#4 X DP_BPM#2 R 1020 0_0402_5% OBSDATA_A1 OBSDATA_C1
37 V T T P W R GOOD AM15 AJ25 1 2 13 14
B VTTPWRGOOD BPM#[4] AH22 X DP_BPM#5 R 1021 1 @ 2 0_0402_5% X D P_BPM#2_R 15 GND4 GND5 16
B
BPM#[5] 5 C F G 14 OBSDATA_A2 OBSDATA_C2 C FG 2 5
AK23 X DP_BPM#6 X DP_BPM#3 R 1022 1 2 0_0402_5% X D P_BPM#3_R 17 18
BPM#[6] OBSDATA_A3 OBSDATA_C3 C FG 3 5
H _ P W R G D _XDP 1 R 3 0 2 H _ P W R G D _XDP_R AM26 AH23 X DP_BPM#7 R 1023 1 @ 2 0_0402_5% 19 20
TAPPWRGOOD BPM#[7] 5 C F G 15 GND6 GND7 + 3VS
0_0402_5% 21 22
5 C F G 17 OBSFN_B0 OBSFN_D0 C F G 10 5 2009/02/25 HP DB-2
5 C F G 16 23 24 C F G 11 5
OBSFN_B1 OBSFN_D1
15 B U F _ P LT_RST# 1 R31 2 P L T_RST#_R AL14 25 26
1.5K_0402_1% RSTIN# X DP_BPM#4 GND8 GND9
27 28 C FG 4 5
1
X DP_BPM#5 OBSDATA_B0 OBSDATA_D0