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Keysight Technologies
Solutions for RF Power Amplifier Test
Application Note
02 | Keysight | Solutions for RF Power Amplifier Test - Application Note
Making Faster, Repeatable RF Power Amplifier Tests with Envelope Tracking
and Digital Pre-Distortion Using a Range of Test System Techniques, and
Modular Signal Generation and Analysis.
Overview
As wireless mobile devices grow in capability and complexity, the associated growth in power demand
is driving new approaches to battery utilization and power efficiency. One of the single largest power
consumers in a wireless handset is the RF Power Amplifier (PA) and as such, improved efficiency tech-
niques like Envelope Tracking (ET) and Digital Pre-Distortion (DPD) are being increasingly utilized. The
key implication for test engineers--whether in design, characterization or manufacturing test--is that
testing these devices with this additional capability can potentially drive up both test cost and overall
test time. This application note will discuss various approaches to maximizing test equipment utiliza-
tion and reducing test times for such component RF PA's and front-end modules.
Problem
The demand for higher test speed spans from design validation to production test. As RF PAs sup-
port multiple modes, frequency ranges, and modulation formats there is more to test during the
validation phase. Thousands of tests are not uncommon. During RF PA production test, manufac-
turers have to deal with a number of critical issues; namely, speed, repeatability, cost, maintain-
ability, and upgradability. Their biggest stress, however, comes from trying to balance speed and
repeatability.
Typically as test speed increases, repeatability decreases. Manufacturers must constantly struggle
to balance these issues, while also keeping an eye on cost and maintainability. Addressing the speed
challenge is further complicated by the fact that PAs are being manufactured in increasingly higher
volumes to meet the demand for more and more wireless mobile devices, and have grown even more
complex. Techniques like DPD and envelope tracking are often employed to help linearize the PA and
increase its power efficiency, but these techniques only add to the testing that's necessary during
production, further slowing down the process. With PA manufacturers looking to reduce overall test
times from 1.5 seconds, to 500 ms or less, these slow-downs are simply no longer acceptable.
Solution
The key to addressing the challenges now facing PA validation and manufacturing teams lies in
finding a way to increase test speed, while maintaining repeatability. Luckily, a number of test sys-
tem techniques are now available to manufacturers for just such a task.
The first technique involves speeding up the PA power servo loop (Figure 1). A power servo loop is
essentially a "test and adjust" process. The engineer sets the RF input power level to the Device-
Under-Test (DUT), then checks the RF output of the DUT. If the RF output level is not within the
required specification, the engineer changes the RF input level and checks again. This loop is
continued until the correct output power level is achieved. Then and only then can the engineer
start making measurements on the DUT. Getting this process done fast and allowing the engineer
to quickly move on to making measurements is a key way to speed the overall RF PA test time.
Figure 1. System-level block diagram for a
multi-DUT test. The RF PA power servo loop
is a key requirement in PA testing and must be
performed at each test condition.
03 | Keysight | Solutions for RF Power Amplifier Test - Application Note
One solution able to perform the power servo loop quickly is the M9381A PXIe vector signal
generator (VSG) from Keysight Technologies, Inc. The PXI VSG, which operates from 1 MHz to
6 GHz, features a 10-