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Chief River Block Diagram 01
EXT_eDP EXT_eDP
A
DDRIII-SODIMM1 A
LCD/CCD Con.
DDRIII-SODIMM2 INT_eDP
P13,15 Mux
EXT_LVDS INT_LVDS
CHANNEL A
EXT_LVDS
DDRIII-SODIMM1 Ivy Bridge(UMA+VGA) dGPU EXT_CRT
PCI-E x 8 GB2-64
DDRIII-SODIMM2
DDR SYSTEM MEMORY
PCI-E
P14,16
P26
P17,18,19,20,21,22,23 EXT_HDMI
CHANNEL B USB-11
rPGA 989
P3,4, 5, 6,
VRAM DDR3-2Gb*8
SATA - HDD1 VRAM DDR3-4Gb*8
P30 INT_eDP
FDI EXT_CRT
DMI
CRT Con. P26
Dual Rank INT_CRT
DMI(x4) P21,22
SATA - HDD2
P30 SATA 0
FDI
DMI INT_LVDS
SATA 2 PCI-E
B B
SATA
Graphics Interfaces
SATA - ODD
HDMI Con.
P29 SATA 1 INT_CRT
EXT_HDMI
SATA 3 HDMI Level Shift
INT_HDMI P25
INT_HDMI
USB 3.0 X 2 USB-3
P25
Right Conn. P28 PantherPoint
USB-8
Card Reader Con. USB
P32 PCH
PCIE-1
P7,8, 9, 10, 11,12
USB 2.0 Left Con. USB-9
USB-10 WLAN
P29
P27
RTC
USB-2
TV / MSATA
BATTERY
C C
Daughter IO
P8
PCI-E
PCIE-4
SATA 1 Azalia IHDA
NVRAM
LPC
P27
P29
LPC
Audio Codec EC
P31 P33
POWER SYSTEM
Charger (ISL88731C) P40
System 5V/3V (TPS51123A) P41
FAN K/B Con. HALL Sensor SPI Flash Touch Pad /B Power /B P42
Con. Con. DDR1.5V (TPS51216)
EXT AMP HP MIC JACK SPK Con. P43
P31 P31 P31 P31 P3 P34 P26 P8 P34 P34
VTT (RT8240BGQW)
+VCCSA (TI51461) P44
D D
+VCORE+VGFX (ISL95836) P45
+1.8V (G966A) P46
AMD_GPU (ISL95870A) P47
SPK Con.
P31
Quanta Computer Inc.
PROJECT : BDAD
Size Document Number Rev
A1A
Block Diagram
Date: Monday, February 04, 2013 Sheet 1 of 45
1 2 3 4 5 6 7 8
5 4 3 2 1
02
AON7406
low switch +5V MAIND enable
+5V_S5 (Peak 6.5A, AVG 4.5A)
D S5_ON enable D
AC (Peak 15.07A ,AVG 10.6A) TPS51461 +VCCSA HWPG_VCCIO enable
SYSTEM POWER
OCP:18A PWM (Peak 6A ,AVG 4.2A)
System OCP:8.12A
Charger RT8223
ISL88731C PWM
DC
AON7406 +3V MAIND enable
PWM +3V_S5 low switch
S5_ON enable (Peak 3.9A, AVG 2.7A)
(Peak 11.26A ,AVG 7.88A) G9661-25AD
OCP:13.5A
LDO +1.8V MAINON enable
+SMDDR_VTERM (Peak 1.242A, AVG 0.869A)
SUSON enable
(Peak 1A, AVG 0.7A) AON6402A +3V_GPU GFX_MAINON
TPS51216 +SMDDR_VREF low switch
(Peak 0.88A ,AVG 0.616A)
C PWM SUSON enable C
(Peak 0.5A, AVG 0.35A)
+1.5VSUS AO6402A
SUSON enable low switch +1.5V MAIND enable
(Peak 17.39A ,AVG 12.17A)
OCP:21A (Peak 1.242A, AVG 0.887A)
CONTROL Power States
POWER PLANE VOLTAGE SIGNAL ACTIVE IN
VIN 10V~+19V S0~S5
+VCCRTC +3.0V~+3.3V S0~S5
RT8240 +VTT +1.05V AON7406 +1.05V_GPU GFXPG_1.5V_PGD
PWM MAINON enable +3V +3.3V MAIN_ON S0
low switch (Peak 3A ,AVG 2.1A)
(Peak 18.25A ,AVG 12.78A)
OCP:22A +3V_S5 +3.3V S5_ON S0~S5
+3V_HDP +3.3V MAIN_ON S0
+3VPCU +3.3V AC/DC Insert enable S0
B B
+VCC_CORE +5V +5V MAIN_ON S0
VRON enable
(Peak 56A ,AVG 94A) +5V_S5 +5V S5_ON S0~S5
OCP:112A
ISL95836HRZ-T +5VPCU +5V AC/DC Insert enable S0~S5
PWM WIMAX_P +3.3V WMAX_P for WLAN
+VAXG
VRON enable +1.8V +1.8V MAIN_ON S0
(Peak 46A ,AVG 38A)
OCP:55A
+1.5V +1.5V MAIN_ON S0
+1.5V_SUS +1.5V SUSON S0~S3
+VCC_CORE VRON S0
+VGPU_CORE +1.5V_GPU +VTT +1.05V MAIN_ON S0
RT8812A TPS51367RVER
PWM GFX_MAINON PWM GFX_+1.5VGFX_ON +1.05V +1.05V MAIN_ON S0
(Peak 29.4A ,AVG 42A) (Peak 10A ,AVG 7A)
A OCP:60A OCP:12A +VAXG MPWROK S0 A
Quanta Computer Inc.
PROJECT : BDAD
Size Document Number Rev
A1A
POWER TREE TABLE
Date: Monday, February 04, 2013 Sheet 2 of 45
5 4 3 2 1
5 4 3 2 1
Ivy Bridge Processor (DMI,PEG,FDI) CPU/VGA Ivy Bridge Processor (CLK,MISC,JTAG)CPU
7
7
DMI_TXN0
DMI_TXN1
B27
B25
A25
U21A
DMI_RX#[0]
DMI_RX#[1]
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
J22
J21
H22
PEG_COMP
PEG_RXN[0..7] 17 U21B
03
7 DMI_TXN2 B24 DMI_RX#[2] K33 PEG_RXN0
7 DMI_TXN3 DMI_RX#[3] PEG_RX#[0] M35 PEG_RXN1
B28 PEG_RX#[1] L34 PEG_RXN2 A28
CLK_CPU_BCLKP 9
MISC
CLOCKS
7 DMI_TXP0 B26 DMI_RX[0] PEG_RX#[2] J35 PEG_RXN3 C26 BCLK A27
7 DMI_TXP1 DMI_RX[1] PEG_RX#[3] 8 H_SNB_IVB# PROC_SELECT# BCLK# CLK_CPU_BCLKN 9
DMI
A24 J32 PEG_RXN4
7 DMI_TXP2 B23 DMI_RX[2] PEG_RX#[4] H34 PEG_RXN5
7 DMI_TXP3 DMI_RX[3] PEG_RX#[5] H31 PEG_RXN6 SKTOCC# AN34
G21 PEG_RX#[6] G33 PEG_RXN7 TP48 SKTOCC# A16 CLK_DPLL_SSCLKP_R R496 PILV@1K_4
D 7 DMI_RXN0 E22 DMI_TX#[0] PEG_RX#[7] G30 DPLL_REF_CLK A15 CLK_DPLL_SSCLKN_R D
R497 PILV@1K_4 +VTT
7 DMI_RXN1 F21 DMI_TX#[1] PEG_RX#[8] F35 DPLL_REF_CLK#
7 DMI_RXN2 D21 DMI_TX#[2] PEG_RX#[9] E34 C501 R194 IEDP@0_4 CLK_EDP_CLKP 9
7 DMI_RXN3 DMI_TX#[3] PEG_RX#[10] E32 TP_CATERR# AL33
*10P/50V_4C R195 IEDP@0_4 CLK_EDP_CLKN 9
G22 PEG_RX#[11] D33 TP50 CATERR#
7 DMI_RXP0 D22 DMI_TX[0] PEG_RX#[12] D31
THERMAL
7 DMI_RXP1 DMI_TX[1] PEG_RX#[13]
PCI EXPRESS* - GRAPHICS
F20 B33
7 DMI_RXP2 C21 DMI_TX[2] PEG_RX#[14] C32 AN33 R8
7 DMI_RXP3 DMI_TX[3] PEG_RX#[15] PEG_RXP[0..7] 17 33 EC_PECI PECI SM_DRAMRST# CPU_DRAMRST# 24
DDR3
MISC
J33 PEG_RXP0
PEG_RX[0] L35 PEG_RXP1
PEG_RX[1] K34 PEG_RXP2 H_PROCHOT# R460 56_4 H_PROCHOT#_R AL32 AK1 SM_RCOMP_0 R43 140/F_4 C84 C83
PEG_RX[2] 41 H_PROCHOT# PROCHOT# SM_RCOMP[0]
A21 H35 PEG_RXP3 A5 SM_RCOMP_1 R493 25.5/F_4 39P/50V_4N 0.1U/10V_4X
7 FDI_TXN0 H19 FDI0_TX#[0] PEG_RX[3] H32 PEG_RXP4 SM_RCOMP[1] A4 SM_RCOMP_2 R494 200/F_4
7 FDI_TXN1 E19 FDI0_TX#[1] PEG_RX[4] G34 PEG_RXP5 SM_RCOMP[2]
7 FDI_TXN2 FDI0_TX#[2] PEG_RX[5]
Intel(R) FDI
F18 G31 PEG_RXP6 PM_THRMTRIP#_R AN32
7 FDI_TXN3 B21 FDI0_TX#[3] PEG_RX[6] F33 PEG_RXP7 THERMTRIP#
7 FDI_TXN4 C20 FDI1_TX#[0] PEG_RX[7] F30 C760 *0.1U/10V_4X
7 FDI_TXN5 D18 FDI1_TX#[1] PEG_RX[8] E35
7 FDI_TXN6 E17 FDI1_TX#[2] PEG_RX[9] E33
For EMI
7 FDI_TXN7 FDI1_TX#[3] PEG_RX[10] F32 AP29 XDP_PRDY#_R TP35
PEG_RX[11] D34 PRDY# AP27 XDP_PREQ# TP46
A22 PEG_RX[12] E31 PREQ#
7 FDI_TXP0 G19 FDI0_TX[0] PEG_RX[13] C33 AR26 XDP_TCLK
For EMI
C500 *0.1U/10V_4X
PEG_TXN[0..7] 17 B2A
PWR MANAGEMENT
7 FDI_TXP1 FDI0_TX[1] PEG_RX[14] TCK
JTAG & BPM
E20 B32 AR27 XDP_TMS
7 FDI_TXP2 G18 FDI0_TX[2] PEG_RX[15] AM34 TMS AP30 XDP_TRST#
7 FDI_TXP3 FDI0_TX[3] 7 PM_SYNC PM_SYNC TRST#
B20 M29 PEG_TXN0_C C645 [email protected]/10V_4X PEG_TXN0
7 FDI_TXP4 C19 FDI1_TX[0] PEG_TX#[0] M32 PEG_TXN1_C PEG_TXN1 AR28 XDP_TDI_R
C664 [email protected]/10V_4X C497 39P/50V_4N TP40
7 FDI_TXP5 D19 FDI1_TX[1] PEG_TX#[1] M31 PEG_TXN2_C PEG_TXN2 TDI AP26 XDP_TDO_R
C635 [email protected]/10V_4X TP43
7 FDI_TXP6 F17 FDI1_TX[2] PEG_TX#[2] L32 PEG_TXN3_C PEG_TXN3 AP33 TDO
C649 [email protected]/10V_4X 10 H_PWRGOOD
7 FDI_TXP7 FDI1_TX[3] PEG_TX#[3] L29 PEG_TXN4_C PEG_TXN4 UNCOREPWRGOOD
C626 [email protected]/10V_4X
J18 PEG_TX#[4] K31 PEG_TXN5_C C636 [email protected]/10V_4X PEG_TXN5 R450 10K_4
7 FDI_FSYNC0 J17 FDI0_FSYNC PEG_TX#[5] K28 PEG_TXN6_C PEG_TXN6 AL35 XDP_DBR#_R
C613 [email protected]/10V_4X R462 0_4 XDP_DBRST# 7
7 FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] J30 PEG_TXN7_C PEG_TXN7 V8 DBR#
C627 [email protected]/10V_4X 24 PM_DRAM_PWRGD_R For EMI
H20 PEG_TX#[7] J28 SM_DRAMPWROK C512 *0.1U/10V_4X
7 FDI_INT FDI_INT PEG_TX#[8] H29 AT28 XDP_OBS0
C For EMI C88 0.1U/10V_4X TP44 C
J19 PEG_TX#[9] G27 R44 *75/F_4 BPM#[0] AR29 XDP_OBS1 TP45
7 FDI_LSYNC0 FDI0_LSYNC PEG_TX#[10] +VTT BPM#[1]
H17 E29 AR30 XDP_OBS2 TP36
7 FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] F27 CPU_PLTRST# CPU_PLTRST#_R AR33 BPM#[2] AT30 XDP_OBS3
R448 *43_4 TP37
PEG_TX#[12] D28 RESET# BPM#[3] AP32 XDP_OBS4 TP41
PEG_TX#[13] F26 BPM#[4] AR31 XDP_OBS5 TP42
PEG_TX#[14] E25 +VTT BPM#[5] AT31 XDP_OBS6 TP38
A18 PEG_TX#[15] PEG_TXP[0..7] 17 A1A C491 C490 BPM#[6] AR32 XDP_OBS7 TP39
eDP_COMP A17 eDP_COMPIO M28 PEG_TXP0_C C651 [email protected]/10V_4X PEG_TXP0 BPM#[7]
eDP_ICOMPO PEG_TX[0] 39P/50V_4N 0.1U/10V_4X
EDP_HPD# B16 M33 PEG_TXP1_C C668 [email protected]/10V_4X PEG_TXP1