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MODEL ET2S MB (LAN)
MODEL: REV
CHANGE LIST
FROM TO
PAGE

ET2S MB (LAN) 3A FIRST RELEASE 1 3C
E
3B Reference ECN :E200206-0630 3C
E

2 3D
3C Reference ECN :E200206-0675
Reference ECN :E200207-1262 3 3C
3D
4 3C

5 3C

6 3C

7 3C
D D




8 3C

9 3C

10 3C

11 3C

12 3C

C
13 3C C




14 3C

15 3C

16 3C

17 3C

3C
18
B B
19 3C

20 3C

21 3C

22 3C

23 3C

24 3C
A A

25 3C

Project : ET2S MB(LAN) MB Assy' P/N: 21ET2MB00C1 Document No.: 204
REV 3D
Quanta Computer Inc. Approved by : Jacky Lee Drawing by : CHIN HAO KUO
DATE: 2002/5/28 Cover Sheet: 1 of 1
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ET2S SYSTEM BLOCK
DIAGRAM
PCI ..CLOCK

CK-GEN
Processor ( Socket A ) ICS9248-168-TSSOP DC/DC
P3,4 P2 Max1632,Max1717 19V IN
D D
P23,P24




ADDR



CTRL



DATA
5V,3V,CPUCORE VCC etc.




POWER IN Battery




ADDR



CTRL



DATA
Charger
P22

INTA#(VGA)

SO- DIMM
Twister-K H/W
CRT NB VT8362 MONITOR
P21
P15 THERMAL DIODE IN

SAVAGE4 SO- DIMM
LCD/INV LVDS P6,7 P7 2'nd FAN
C P21 C
CONN
P11
PCI BUS
Secondary

HDD UltraDMA/33/66/100 REQ/GNT4
AC'97 Link
P16
Super South Floppy
CD-ROM P8
P16 VIA REQ/GNT1 INTA,(D)# REQ/GNT2 INTC,(A)# REQ/GNT0 INTA,B#
Parallel
VT8231 P14 PCMCIA 1394 Mini RJ11
USB OZ6912 TSB43AB21 AD22 PCI
USB USBP0+,USBP0-,USBP1+,USBP1-
P9,10 P17
P21 AD21 P12 AD23 P19 Reserve
P17
ISA BUS

OPTIONAL CARD
B
1394 B

Wireless USB Slot0 CONN
P12 P19
USBP+2,USBP-2




AMC97 PCB Stacker:
AC'97 Link
Audio Primary
SmartAMC EC/KBC BIOS TOP 0.5 oz
Amplifier (20468-21) PC87570 P20
TPA0212 GND 1 oz
P13 P20
P14
IN1 1 oz
IN2 1 oz
VCC 1 oz
MODEM DAA Touch
RJ11 Keyboard FAN BOT 0.5 oz
Pad P15 P20 P21
A
SMARTDAA A


P18
(20463-11)
P25
PROJECT : ET2S
LSI Quanta Computer Inc.
RJ45
80227 Size Document Number Rev
P18 P18 Custom Block Diagram 3C

Date: Thursday, August 29, 2002 Sheet 1 of 25
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U7B

37 SDCLK1_R R54 1 2 22 SDCLK1
SDRAM0 SDCLK1 7
MEMCLKOUT 18 36
5 MEMCLKOUT BUFFER IN SDRAM1 SDCLK3_R R63
SDRAM2 33 1 2 22 SDCLK3
SDCLK3 7
32 SDCLK2_R R65 1 2 22 SDCLK2
SDRAM3 SDCLK2 7
CLKSMCLK 26 29 SDCLK4_R R67 1 2 22 SDCLK4
7 CLKSMCLK SCLK SDRAM4 SDCLK4 7




2




2
C130 C129 CLKSMDATA 25 28
15P
Y1
15P CLOCK GENERATOR 7 CLKSMDATA SDATA SDRAM5

MEMCLKIN_R MEMCLKIN
1




1
SDRAM_F 27 1 2 MEMCLKIN 5
U7A R291 10K R69 22
D D
14.318MHZ 1 2 16
CKGEN14M_I +3V SDRAMSTP#
2
C627 CKGEN14M_O X1 8362CLK_R R51
3 42 1 2 10 8362CLK
X2 CPUCS




2
8362CLK 5
1 2
41 CPUCLK_R R52 1 2 10 CPUCLK C628 R62
CPUT0 -CPUCLK_R R55 -CPUCLK CPUCLK 3
40 1 2 10 -CPUCLK 3 7 31
.1U CPUC0 .1U *68/F GNDPCI GNDSD




1
13 GNDPCI GNDSD 34
R57 1 2 10K 39 4 FS2 R283 1 2 22 SB_PCICLK 20 44 SDCLK1 C629 1 2 10P
+3V CPUSTP# FS2/PCI_F SB_PCICLK 8 AGND GNDL
17 5 FS1 21 45
10 -PCISTP R59 PCISTP# FS1/PCI0 GND48 GNDREF
1 2 10K 38 8 8362PCICLK_R R53 1 2 22 8362PCICLK C498 SDCLK2 C630 1 2 10P
PD# PCI1 PCLKMPCI_R R56 22 PCLKMPCI 8362PCICLK 6 ICS9248-168-TSSOP
9 1 2
33 PCI2 PCLK_PCM_R R58 22 PCLK_PCM PCLKMPCI 17 *10P CKGND CKGND SDCLK3 C631 1
10 1 2 2 10P
OSCVGA R49 PCI3 PCLK_PCM 12
6 OSCVGA 1 2 OSCVGA_R 48 11 PCLK_1394_R R288 1 2 22 PCLK_1394
SB_14M R50 REF0(2X) PCI4 PCLK_1394 19
9 SB_14M 1 2 SB_14M_R 47 12 SDCLK4 C632 1 2 10P
REF1 PCI5
15
L29 33 PCI6 MEMCLKIN C633 1 2 10P
CLKVCC 1
+3V PBY201209T-600 VDDREF FS0 R64
6 VDDPCI 22 1 2 10 USB48M
USB48M 8
48M/FS0
1




14 23 T14
C141 CLKAVDD VDDPCI 24M/48M/SEL24_48# FS3 +3V CPUCLK C615 1
19 46 2 10P
.1U AVDD FS3/REF2
24
VDD48
20MIL -CPUCLK C616 1 2 10P
2




30
VDDSD
35
VDDSD 8362CLK C491 1
43 W/O LAN W/LAN W/LAN&1394 2 10P
VDDL




2




2




2




2
ICS9248-168-TSSOP C634 C635 C636 C637 PCLK_1394 C497 1 2 *22P
R288 NC NC Mount .1U
CLKVCC C125 .1U .1U .1U SB_PCICLK C493 1 2 22P




1




1




1




1
2 1 1000P

C CLKVCC C127 2 1 1000P 8362PCICLK C128 1 2 22P C


CLKVCC C134 2 1 1000P +3V PCLKMPCI C131 1 2 22P
R293 1 2 0
R48 1 2 0 PCLK_PCM C132 1 2 *22P
CLKVCC C138 2 1 .1U R294 1 2 0 0429 CPU CLOCK SET




2
R47 1 2 0 USB48M C500 1 2 22P
CLKVCC C126 2 1 .1U +3V *10K
R401 FS2 FS1 FS0 CPU SS OSCVGA C490 1 2 22P
CLKVCC C133 2 1 .1U CKGND
SB_14M C492 1 2 22P




1
CLKVCC C136 2 1 .1U 8 FS0 1 1 1 133 +/-0.25%
6
4
2
CLKVCC C140 1 2 10U RP56 1 1 0 100 +/-0.25%
R280
10KX4 1 0 1 133 +/-0.6%
*1K
7
5
3
1


1 0 0 100 +/-0.6%
L60 FS1 R281
CLKVCC CLKAVDD C135 2 1 1000P FS2 R282 1K 0 1 1 133 -0.5%
0 FS3
0 1 0 100 -0.5%
C504 2 1 .1U
0 0 1 133 +/-0.35%
0 0 0 100 +/-0.35% DEFAULT SETTING


B B
CLKVCC trace width: 30mil
+3V

CPUCLK = Lnb-1" +3V
(0"~8" )
-CPUCLK = Lnb-1" R384
2




NEAR CLK GEN
8362CLK = Lnb ( 1"~9" ) 10K 4.7K
R390 R385 10K
1 2 FS0
MEMCLKOUT =As short as possible ( 1"~9" )
1




MEMCLKIN = Lsd+4.5" ( 5.5"~8.5 )
3




2 Q56 +3V
4 FSB_SENSE MMBT3904
DIMCLK[1..4] = Lsd ( 1"~4" )
1




DIMCLK0 = Lsd+2.5" (3.5"~6.5" )
R386
4.7K
8362PCICLK = Lpci +3"
(4"~15" ) R387 10K
SB_PCICLK = Lpci +3" 1 2 MA14 5,7
ET2S MUST ADD

PCMCICLK = Lpci FSB_SENSE Bus Frequency
3




( 1"~12" )
A MINIPCICLK = Lpci 2 Q57 A
1 100MHz MMBT3904
1




0 133MHz
PROJECT : ET2S
Quanta Computer Inc.
FSB_SENSE
Size Document Number Rev
0312 Custom 3D
CLOCK GENERATOR
Date: Thursday, August 29, 2002 Sheet 2 of 25

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5 4 3 2 1


VTT VTT VTT VTT
VTT
U3A
-HD0 AA35 AJ29 -HAIN0 R217 R212 R208 R210
5 -HD0 -HD1 SDATA0# SADDIN0#
W37 AL29 -HAIN1
5 -HD1 -HD2 SDATA1# SADDIN1#
W35 AG33 -HAIN2 100/F 100/F 100/F 100/F R15 R18
5 -HD2 -HD3 SDATA2# SADDIN2# -HAIN2 5
Y35 AJ37 -HAIN3
5 -HD3 -HD4 SDATA3# SADDIN3# -HAIN3 5 60.4/F
U35 AL35 -HAIN4 BYPSCLK -BYPSCLK 60.4/F
5 -HD4 -HD5 SDATA4# SADDIN4# -HAIN4 5
U33 AE33 -HAIN5 CLKOUT -CLKOUT R17
5 -HD5 -HD6 SDATA5# SADDIN5# -HAIN5 5
S37 AJ35 -HAIN6
5 -HD6 -HD7 SDATA6# SADDIN6# -HAIN6 5
S33 AG37 -HAIN7
5 -HD7 -HD8 SDATA7# SADDIN7# -HAIN7 5
AA33 AL33 -HAIN8 R219 R211 R207 R209 C67 680P 301/F
5 -HD8 -HD9 SDATA8# SADDIN8# -HAIN8 5
AE37 AN37 -HAIN9 CLKIN
5 -HD9 -HD10 SDATA9# SADDIN9# -HAIN9 5 CPUCLK 2
D AC33 AL37 -HAIN10 100/F 100/F 100/F 100/F D
5 -HD10 -HD11 SDATA10# SADDIN10# -HAIN10 5
AC37 AG35 -HAIN11
5 -HD11 -HD12 SDATA11# SADDIN11# -HAIN11 5
Y37 AN29 -HAIN12 -CLKIN
5 -HD12 -HD13 SDATA12# SADDIN12# -HAIN12 5 -CPUCLK 2
AA37 AN35 -HAIN13
5 -HD13 -HD14 SDATA13# SADDIN13# -HAIN13 5
AC35 AN31 -HAIN14 C70 680P
5 -HD14 -HD15 SDATA14# SADDIN14# -HAIN14 5
5 -HD15