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5 4 3 2 1
Title Page
MS-6590 ATX Cover S heet 1
Block Diagram 2
*AMD PGA 462 Processor
GPIO SPEC 3
D D
*VIA KT400 / VT8235 Chipset
(DDR 400 / AGP 8X / VLink 8X) AMD 462 PGA Socket 4,5 MS-6590 ver:10
*Winbond 83697HF-VF LPC I/O Clock Synthesizer 6
Standard Audio component 94
*VT6306 1394a OHCI Link Layer Controller KT400 7,8,9 ,10
*BroadCom Gigabit LAN System M emory 11,12,13 LAN component 72
*PDC20375 Serial ATA Controller DDR Termi nations 14,15 OPTA SATA component 76
*CMI8738MX 6 channel H/W Audio A GP SLOT 16 OPTB 1394 component 76
*USB 2.0 support (integrated into VT8235) VT8235 17,18,19
OPTC (ALL) Standard BOM (without SATA /
*Jump Less support PCI C onnectors 20,21,22 1394 HC)
DLED 23 SMT 800
C
CMI8738 24 DIP 76 C
Total 876
Audio SPDIF / 6 Channel connector 25,26
Serial ATA Controller / Connectors 27,28 Option A BOM (with SATA /
without 1394 HC,LAN)
A T A 6 6 /100 Connectors 29
1394 Controller 30 SMT 871
DIP 81
Ethernet LAN 31
Total 952
Front USB Port 32
Option B BOM (without SATA /
Rear USB Port 33
with 1394 HC,4410LAN)
LP C I/O 34
Hardware monitor 35
SMT 940
DIP 84
B System ROM 36 Total 1024 B
Keyboard/Mouse Connectors 37
LPT/COM Port 38 Option C BOM (for ALL)
HIP 6302 39
CPU Ratio / Vcore / LED Setting 40 SMT 1000
DIP 91
AMD CPU Thermal Protection 41
Total 1091
MS-5 ACPI POWER 42
PowerOK C ircuit 43
Front Panel 44
Pull-up R esistors 45
BULK / Decoupling 46
A A
PCI & MS-1 schematic 47
HISTORY 48
Micro Star Restricted Se cret
Title
Cover Sheet
Document Number MS-6590
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5 4 3 2 1
Block Diagram
AMD Socket 462
D D
FSB
A DDR 400
AGP 8X /Fast Write
G
C
P
KT400 C
6 PCI Slots
VLINK 8X
Rear x1 1394
Front x2 Controller Dual ATA
PCI-33 100/133
H/W
Audio
B B
6 ch share
by MIC Controller VT8235
LPC BUS
SATA Con x2 SATA/IDE
Controller
IDE Con x1
MII 1 0/100M
Rear 10/100
Port x1 VT6103 PHY
SUPER I/O ROM
USB 2.0
C
N
AC-LINK
R
X BUS
A A
Dual USB 1.1 O HCI
/2.0 EHCI 6 Ports
Micro Star Restricted Se cret
Title
Rear x4 Front x1 Block Diagram
Document Number MS-6590
5 4 3 2 1
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GPIO FUNCTION
VT8233 GPIO Function Define
PIN NAME Function define PIN NAME Function define
D D
GPO0 (VSUS33) GPO0 GPI0 GPI0
GPO1/SUSA#(VSUS33) SUSA# GPI1 ATADET0=>Detect IDE1 ATA100/66
GPO2/SUSB#(VSUS33) SUSB# GPI2/EXTSMI# EXTSMI#
GPO3/SUSST1#(VSUS33) SUSST1# GPI3/RING# RING#
GPO4/SUSCLK(VSUS33) SUSCLK GPI4/LID# ATADET1=>Detect IDE2 ATA100/66
GPO5/CPUSTP# CPUSTP# GPI5/BATLOW# Exteranl Pull up to 3VDUAL
GPO6/PCISTP# PCISTP# GPI6/PME# PME#
GPO7/SLP# SLP# GPI7/SMBALRT# Exteranl Pull up to 3VDUAL PCI
GPO8/GPI8/IPBIN0 Exteranl Pull up to VCC3 GPI16/INTRUDER# Exteranl Pull down DEVICES INT# IDSEL REQ#/GNT# CLOCK
GPO9/GPI9/IPBIN1 Exteranl Pull up to VCC3 GPI17/CPUMISS Exteranl Pull up to 3VDUAL INT#A PREQ#0
C PCI SLOT 1 INT#B AD16 PCICLK1 C
INT#C PGNT#0
GPO10/GPI10/IPBRDFR GPI10(PRI_DOWN) GPI18/AOLGP1/THRM# THRM# INT#D
GPO11/GPI11/IPBRDCK GPI19/IORDY Exteranl Pull up to VCC3 INT#B PREQ#1
PCI SLOT 2 INT#C AD17 PCICLK2
INT#D PGNT#1
GPO12/GPI12/IPBOUT0 GPO12 INT#A
DDR Voltage SET1 SET2
GPO13/GPI13/IPBOUT1 GPO13 INT#C PREQ#2
PCI SLOT 3 INT#D AD18 PCICLK3
2.5V 1 1 INT#A PGNT#2
GPO14/GPI14/IPBTDFR GPO14 INT#B
2.6V 0 1
GPO15/GPI15/IPBTDCK GPO15 2.7V 1 0 INT#D PCIREQ#3
PCI SLOT 4 INT#A AD19 PCICLK4
2.8V 0 0 INT#B PCIGNT#3
GPO16/SA16/STRAP CPU FID0 Strapping INT#C
GPO17/SA17/STRAP CPU FID1 Strapping INT#B PCIREQ#4
PCI SLOT 5 INT#C AD21 PCICLK5
INT#D PCIGNT#4
GPO18/SA18/STRAP CPU FID2 Strapping INT#A
B GPO19/SA19/STRAP CPU FID3 Strapping INT#C PCIREQ#6 B
PCI SLOT 6 INT#D PCICLK6
GPO20/GPI20 INT#A AD22 PCIGNT#6
/ACSDIN2/PCS0#/EI GPO20 INT#B
GPO21/GPI21/ACSDIN3
/PCS1#/SLPBTN# GPO21 PCIGNT#5
CM8738 INT#A AD23 AUDCLK
PCIREQ#5
GPO22/GPI22/IOR# GPO22
SETIAL ATA INT#D AD24 PCIGNT#6 ATAPCLK
GPO23/GPI23/IOW# GPO23 PCIREQ#6
GPO24/GPI24/GPIOA 1394 INT#B AD25 PCIGNT#7 1394_PCLK
PCIREQ#7
GPO25/GPI25/GPIOC
GPO26/GPI26/SMBDT2
(VSUS33) SMBDATA2/Slave SMBUS
GPO27/GPI27/SMBCK2
(VSUS33) SMBCLK2/Slave SMBUS
GPO28/GPI28/
APICD0/APICCS#
GPO29/GPI29/
A APICD1/APICACK# A
GPO30/GPI30/GPIOD
Micro Star Restricted Secret
GPO31/GPI31/GPIOE Title Rev
GPIO Spec. 100
Document Number MS-6590
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Wednesday, August 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 3 of 49
5 4 3 2 1
5 4 3 2 1
SOCKET 462 Part 1 VCORE
VCC3
CPU1A
SDATA#[0..63] SDATA#0 AA35 AE1 A20M# CPURST# VCORE DBREQ# R49 510
7 SDATA#[0..63] SDATA0 A20M A20M# 17
SDATA#1 W37 AG1 FERR
SDATA#2 W35 SDATA1 FERR AJ3 CPUINIT# R78
SDATA#3 Y35 SDATA2 INIT AL1 INTR CPUINIT# 17
SDATA3 INTR INTR 17 C28 510
SDATA#4 U35 AJ1 IGNNE# X_100P PLLTEST# R54 510
SDATA4 IGNNE IGNNE# 17 R80
SDATA#5 U33 AN3 NMI
SDATA5 NMI NMI 17 680
SDATA#6 S37 AG3 CPURST# RN2
SDATA#7 S33 SDATA6 RESET AN5 SMI# CPURST# 42 FERR# CPU_TCK 1 2
D SDATA#8 SDATA7 SMI SMI# 17 FERR# 17 D
AA33 AC1 STPCLK# CPU_TMS 3 4
SDATA#9 AE37 SDATA8 STPCLK STPCLK# 17 Q15 CPU_TRST# 5 6
SDATA#10 AC33 SDATA9 AE3 FERR CPU_TDI 7 8
SDATA#11 SDATA10 PWROK K7PWRGD 42
AC37 2N3904S
SDATA#12 Y37 SDATA11 8P4R-510
SDATA#13 AA37 SDATA12 N1 APICCLK_CPU
SDATA#14 SDATA13 PICCLK APICCLK_CPU 6 VCORE
AC35 N3 APICD0#
SDATA#15 SDATA14 PICD0/BYPASSCLK APICD1# APICD0# 17
S35 N5
SDATA#16 SDATA15 PICD1/BYPASSCLK APICD1# 17
Q37
SDATA#17 Q35 SDATA16 AG13 COREFB#
SDATA#18 SDATA17 COREFB- COREFB# 39
N37 AG11 COREFB R85
SDATA#19 SDATA18 COREFB+ COREFB 39
J33 60.4RST
SDATA#20 G33 SDATA19 AN17 CPUCLK_R VCC2_5 0.6 * VCORE
SDATA#21 G37 SDATA20 CLKIN AL17 CPUCLK#_R
SDATA#22 E37 SDATA21 CLKIN Pull to 2.5V
VREF_SYS
SDATA#23 G35 SDATA22 AN19
SDATA#24 Q33 SDATA23 RSTCLK AL19 APICD0# R64 330
SDATA#25 N33 SDATA24 RSTCLK APICD1# R55 330
SDATA25 C41 C40 R84
SDATA#26 L33 AL21 CLKOUT 473P 473P
SDATA26 K7CLKOUT 60.4RST
SDATA#27 N35 AN21 CLKOUT#
SDATA#28 L37 SDATA27 K7CLKOUT
SDATA28 C21
SDATA#29 J37 VCORE X_39P
SDATA#30 A37 SDATA29 AJ13
SDATA#31 E35 SDATA30 ANALOG
SDATA#32 E31 SDATA31 AA5 VREFMODE
SDATA#33 E29 SDATA32 SYSVREFMODE W5 VREF_SYS
SDATA#34 A27 SDATA33 VREF_SYS VCORE VCORE
SDATA34 R89 R93 6 CPUCLK
SDATA#35 A25 AC5 ZN 100 100
SDATA#36 E21 SDATA35 ZN AE5 ZP C59
C SDATA#37 C23 SDATA36 ZP VCORE CPUCLK_R R95 60.4RST C
SDATA37 C34
SDATA#38 C27 AJ25 PLLBP#
SDATA#39 A23 SDATA38 PLLBYPASS AN15 X_225P/0805 680P
SDATA#40 A35 SDATA39 PLLBYPASSCLK AL15 COREFB R74 10K
SDATA#41 C35 SDATA40 PLLBYPASSCLK
SDATA41 R96
SDATA#42 C33 AN13 PLLMON1
SDATA42 PLLMON1 C35 301RST
SDATA#43 C31 AL13 PLLMON2
SDATA#44 A29 SDATA43 PLLMON2 AC3 PLLTEST# X_106P/0805
SDATA44 PLLTEST R88 R92
SDATA#45 C29 COREFB# R81 10K C61
SDATA45 100 100
SDATA#46 E23 CPUCLK#_R R98 60.4RST
SDATA#47 C25 SDATA46 S1 SCANCLK1
SDATA47 SCANCLK1 C37
SDATA#48 E17 S5 SCANCLK2 680P
SDATA#49 E13 SDATA48 SCANCLK2 S3 SINTVAL X_105P close Socket 462
SDATA#50 SDATA49 SCANINTEVAL 6 CPUCLK#
E11 Q5 SSHIFTEN
SDATA#51 C15 SDATA50 SCANSHIFTEN
SDATA#52 E9 SDATA51 AA1
SDATA#53 A13 SDATA52 DBRDY AA3 DBREQ# VCORE
SDATA#54 C9 SDATA53 DBREQ AL3 FLUSH# VCORE
SDATA#55 A9 SDATA54 FLUSH RN14
SDATA#56 C21 SDATA55 Q1 CPU_TCK CPUINIT# 1 2
SDATA#57 A21 SDATA56 TCK U1 CPU_TDI IGNNE# 3 4
SDATA57 TDI R45
SDATA#58 E19 U5 CPURST# 5 6 for internal
SDATA#59 C19 SDATA58 TDO Q3 CPU_TMS A20M# 7 8 X_1K
SDATA#60 C17 SDATA59 TMS U3 CPU_TRST#
VREFSYS
SDATA#61 A11 SDATA60 TRST 8P4R-680 VREFMODE
SDATA#62 A17 SDATA61
SDATA#63 A15 SDATA62 L1 VID0 RN15
SDATA63 VID0 VID0 40
L3 VID1 STPCLK# 1 2 R40
VID1 VID1 40
L5 VID2 NMI 3 4 270
VID2 VID2 40
DICLK#[0..3] DICLK#0 W33 L7 VID3 SMI# 5 6
B 7 DICLK#[0..3] DICLK#1 SDATAINCLK0 VID3 VID3 40 B
J35 J7 VID4 INTR 7 8
DICLK#2 SDATAINCLK1 VID4 VID4 40
E27
DICLK#3 E15 SDATAINCLK2 8P4R-680
SDATAINCLK3 W1 FID0
DIVAL# AN33 FID0 W3 FID1 FID0 40 FLUSH# R67 680
VREFMODE=Low=No voltage scaling
7 DIVAL# SDATAINVAL FID1 FID1 40
Y1 FID2
DOCLK#0 FID2 FID2 40
7 DOCLK#[0..3] DOCLK#[0..3] AE35 Y3 FID3
DOCLK#1 SDATAOUTCLK0 FID3 FID3 40 PLLMON1 VCORE
C37 R87 56
DOCLK#2 A33 SDATAOUTCLK1 PLLMON2 R86 56
DOCLK#3 C11 SDATAOUTCLK2 U37 ZN R50 40.2RST
SDATAOUTCLK3 SCHECK0 Y33 RN28
DOVAL# AL31 SCHECK1 L35 AIN#0 1 2 ZP R53 40.2RST
SDTATOUTVAL SCHECK2 E33 AIN#1 3 4
AIN#0 AJ29 SCHECK3 E25 PLLBP# 5 6
AIN#1 AL29 SADDIN0 SCHECK4 A31 7 8
SADDIN1 SCHECK5
m atch the transmission line
7 AIN#[2..14] AIN#[2..14] AIN#2 AG33 C13 Push-pull compensation circuit
AIN#3 AJ37 SADDIN2 SCHECK6 A19 8P4R-680
AIN#4 AL35 SADDIN3 SCHECK7
AIN#5 AE33 SADDIN4 J1 RN1
AIN#6 AJ35 SADDIN5 SADDOUT0 J3 SSHIFTEN 1 2 VCORE
AIN#7 AG37 SADDIN6 SADDOUT1 C7 AOUT#2 AOUT#[2..14] SCANCLK1 3 4 RN24
SADDIN7 SADDOUT2 AOUT#[2..14] 7
AIN#8 AL33 A7 AOUT#3 SINTVAL 5 6 1 2
AIN#9 AN37 SADDIN8 SADDOUT3 E5 AOUT#4 SCANCLK2 7 8 CLKOUT 3 4
AIN#10 AL37 SADDIN9 SADDOUT4 A5 AOUT#5 CLKOUT# 5 6
AIN#11 AG35 SADDIN10 SADDOUT5 E7 AOUT#6 8P4R-270 7 8
AIN#12 AN29 SADDIN11 SADDOUT6 C1 AOUT#7
AIN#13 AN35 SADDIN12 SADDOUT7 C5 AOUT#8 8P4R-100
AIN#14 AN31 SADDIN13 SADDOUT8 C3 AOUT#9
SADDIN14 SADDOUT9 G1 AOUT#10
* Trace lengths of CLKOUT
A 7 AICLK# AJ33 SADDOUT10 E1 AOUT#11 and -CLKOUT are between A
SADDINCLK SADDOUT11
SADDOUT12
A3 AOUT#12 DOVAL# R569 270 2" and 3"
CFWDRST AJ21 G5 AOUT#13
7 CFWDRST CONNECT CLKFWDRST SADDOUT13
AL23 G3 AOUT#14 FILVAL# R570 270
7 CONNECT CONNECT SADDOUT14
PROCDRY AN23
7 PROCDRY
FILVAL# AJ31 PROCRDY E3
Micro Star Restricted Secret
SFILLVAL SADDOUTCLK AOCLK# 7
Title Rev
N12-4620011-F02
SOCKET 462 Part 1 100
Document Number MS-6590
MICRO-STAR INT'L Last Revision Date:
CO.,LTD.
No. 69, Li-De St, Jung-He City, Wednesday, August 21, 2002
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 4 of 49
5 4 3 2 1
A
B
C
D
5
5
AK8
Y7
K8
N7
H8
H6
H32
H30
H28
H10
G9
G17
G25
AH30
AD30
AN7
AJ7
F30
AJ9
AH8
AD8
AG29
AG15
F8
AG7
AL7
K30
AL9
AF32
AF30
AF28
AF10
AM8
AF8
AF6
H14 H12
H18 VSS1 VCC_CORE1 H16
KEY8
KEY6