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KN3 BLOCK DIAGRAM 01
PCB STACK UP NORTHWOOD-PRESCOTT/RC300ML/IXP150 POWER-SOURCE CONTROL
LAYER 1 : TOP AC-IN_BATT CHARGER
HCLK_CPU/HCLK_CPU#
A LAYER 2 : VCC CLOCK GENERATOR MAX1772 PAGE A
HCLK_NB/HCLK_NB# 34
LAYER 3 : IN1 INTEL CPU ICS 951402
CPU CORE POWER
NORTHWOOD/ PRESCOTT PAGE
LAYER 4 : IN2 13 ISL6248 PAGE
CPU THERMAL IIC BUS 35,36
NB_DDRCLK
AGPCLK
CLK_ALINK_SB
REFCLK1_NB
CLK_SB_14M
14.318MHz
LAYER 5 : GND SENSOR SYSTEM POWER(3/5V)
GMT781
478 Pins (micro FC-PGA)
LAYER 6 : BOT PAGE MAX1999 PAGE
3 37
PAGE 3, SYSTEM POWER(1.5V/2.5V)
4
PSB MAX1845 PAGE
38
4X133MHZ
SYSTEM POWER
R.G,B
CRT port DDR_VTERM 1.25V/1.8V
PAGE
14 PAGE
GMT-LP2996,SC1565
NORTH BRIDGE 38
To P/R
B
RC300ML B
LVDS
LCD CONN PAGE
718 BGA
INTEGRADED VGA FUNCTION
DDR I/F 2.5V, 333/400MHz DDR-SODIMM1
14
PAGE
PAGE 5, 6, 7, 8, 9, 11,12 PCI BUS ROUTING TABLE
PAGE
TV-OUT 10 ====================================
VGA -- INTA#
S-VIDO
14
DDR-SODIMM2 PCMCIA -- AD17, INTB#, INTC#, REQ0#, GNT0#
ALINK PAGE MINIPCI -- AD18, INTC#, INTD#, REQ1#, GNT1#
66MHZ 11,12
LAN -- AD16, INTD#, REQ2#, GNT2#
USB PORT 0
USB 2.0 * 4 33MHZ, 3.3V PCI
USB PORT 2,3
PAGE
25 SOUTH BRIDGE
AC-LINK
1st IDE - HDD ATA 66/100 IXP150
PAGE 457 BGA
24
C C
2nd IDE - CDROM INTEGRADED PCI-CLK FUNCTION AMCODEC MODEM DAA LAN MINI-PCI CARDBUS CONTROLLER
ATA 66/100 CONEXANT CONEXANT ( EMBEDDED CARDER I/F )
PAGE PAGE
Realtek WIRELESS
24 15,16,17,18 20468-31 20463-31 8110S/8100C LAN TI 7411/TI6411
PAGE PAGE PAGE PAGE PAGE
USB 2.0 * 2 26 27 21 23 19
PORT-REPLICATOR
RTC WIRE
DC Jack 3.3V LPC, 33MHz Power
CRT port
H/P jacks FIR PAGE
Ethernet port 28
PS/2 port PAGE 32 CARDBUS CAREADER 1394
USBx2(4,5) MIC IN AMP
Parallel port SLOT CONN.(3*1) CONN
Serial port PAGE 33 To P/R SIO PC87383 JACK TPA0212
MTDPA-64P PAGE 28 PAGE PAGE PAGE PAGE
COM*1 PAGE 32 28 20 20 19
PC97551VPC
PRT*1 To P/R To P/R
PS/2 Interface TQFP 176S
PAGE 29 H/P JACK RJ45 RJ11
D D
PAGE
JACK JACK
28
PROJECT : KN3
FAN Touchpad Keyboard FLASH SWITCH & LED
PAGE 31 PAGE 31 PAGE 30 PAGE 29 PAGE 30 Quanta Computer Inc.
Size Document Number Rev
Custom BLOCK DIAGRAM 2A
Date: Friday, May 21, 2004 Sheet 1 of 39
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
SYSTEM INFORMATION 02
A A
POWER SEQUENCE
VIN
Voltage Rails Core voltage for Processor ON S0~S1 ON S3 ON S4 ON S5 Control signal 3V
VCC_CORE Core voltage for Processor X VR_ON 5V SUSB#
3VPCU RSMRST#
SUSC#
SMDDR_VREF
SMDDR_VTERM
1.25V for DDR Reference voltage
1.25V for DDR Termination voltage
X
X
X SUSON
MAINON 5VPCU
10V
1.5V X MAINON 5VPCU
PWSW
1.8V X MAINON
NBSWON#
B
2.5VSUS
2.5V
X
X
X SUSON
MAINON S5_ON B
2.5VPCU X X X X VL
SUSON
3VPCU
3VSUS
X
X
X
X
X X VL
SUSON SUS-POWER (2.5VSUS.....etc)
3V X MAINON
MAINON
5VPCU
5VSUS
X
X
X
X
X X VL
SUSON S0-POWER (3V,5V.....etc)
5V X MAINON
CPU_VIDPGD
*** VCORE_PGD_CPU
*** HWPG
NB_PWRGD
PCI DEVICE IDSEL# REQ/GNT# Interrupts
PWROK
LAN(10/100) AD16 3/3 INTD# NB_RST#
CPUPWRGD
CARDBUS AD17 1/1 INTB#, INTC#
NB_RST#
MINI-PCI AD18 INTC#, INTD# CPURST#
C C
D D
PROJECT : KN3
Quanta Computer Inc.
Size Document Number Rev
Custom SYSTEM INFORMATION 2A
Date: Friday, May 21, 2004 Sheet 2 of 39
1 2 3 4 5 6 7 8
A B C D E
NORTHWOOD/Mobile-PRESCOTT CPU - HOST BUS 03
CPU Thermal Sensor.
HD#[0..63]
U35A HD#[0..63] (5)
HA#[3..31] C190 .1U 6657VCC R114 100/F
3V
(5) HA#[3..31] HA#3 K2
HA#4 A3# HD#0
K4 B21
HA#5 L6
A4#
A5#
D0#
D1# B22 HD#1 U10
HA#6 K1 A23 HD#2 1 8 CLK_SMB
HA#7
HA#8
L3
A6#
A7#
PRESCOTT D2#
D3# A25 HD#3
HD#4 THERMDA
VCC SMBC
DAT_SMB
M6 A8# D4# C21 2 DXP SMBD 7
4 5V 3V HA#9 L2 D22 HD#5 C180 4
HA#10 M3
A9#
A10#
1 OF 3 D5#
D6# B24 HD#6 2200P THERMDC 3 DXN ALERT# 6 TEMP_ALARM# (16)
HA#11 M4 C23 HD#7
HA#12 A11# D7# HD#8
N1 A12# D8# C24 4 OVERT# GND 5
HA#13 M1 B25 HD#9
R395 R260 HA#14 A13# D9# HD#10
HA#15
N2 A14# D10# G22
HD#11
(37) 1999RESET# GMT_G781/MAX6657
2 N4 A15# D11# H21
10K 10K HA#16 N5 C26 HD#12 SOIC8
HA#17 A16# D12# HD#13
T1 A17# D13# D23 Route both signals on the same layer Address : 4C
MBCLK 3 1 CLK_SMB HA#18 R2 J21 HD#14
(29,34) MBCLK A18# D14#
Q37 HA#19 P3 D25 HD#15
2N7002E HA#20 A19# D15# HD#16
P4 A20# D16# H22
HA#21 R3 E24 HD#17
5V HA#22 A21# D17# HD#18
T2 A22# D18# G23
HA#23 U1 F23 HD#19
HA#24 A23# D19# HD#20
P6 A24# D20# F24
2
HA#25 U3 E25 HD#21 VCC_CORE VCC_CORE 3VSUS
HA#26 A25# REQUEST DATA D21# HD#22
T4 A26# D22# F26
MBDATA 3 1 DAT_SMB HA#27 V2 PHASE PHASE D26 HD#23 VCC_CORE
(29,34) MBDATA A27# D23#
Q38 HA#28 R6 SIGNALS SIGNALS L21 HD#24 B: Change R89 from 51 to 10K. B: Change R87 from 1K to 10K.
2N7002E HA#29 A28# D24# HD#25
W1 A29# D25# G26
HA#30 T5 H24 HD#26 R89 R87
HA#31 A30# D26# HD#27 10K 10K ITP_TDI R110 150/F
U4 A31# D27# M21
2
V3 L22 HD#28
A32# D28# HD#29
W2 A33# D29# J24
Y1 K23 HD#30
A34# D30# HD#31 ITP_TMS R119 39/F
AB1 A35# D31# H25
M23 HD#32 CPUPROCHOT# 1 3
D32# PROCHOT# (16,29)
L5 N22 HD#33
(5) HADSTB0# ADSTB0# D33#
R5 P21 HD#34 Q14 ITP_TDO R118 75/F
3 (5) HADSTB1# ADSTB1# D34# 3
M24 HD#35 DTC144EUA
D35# HD#36 3V
(5) HREQ#0 J1 REQ0# D36# N23
K5 M26 HD#37 B: Change Q14 from BT3904 to
(5) HREQ#1 REQ1# D37#
J4 ERROR N26 HD#38
(5) HREQ#2 REQ2# D38# HD#39
DTC144 & Delete R88.
(5) HREQ#3 J3 REQ3# SIGNALS D39# N25
H3 R21 HD#40 ITP_DBR# R45 150/F
(5) HREQ#4 REQ4# D40#
P24 HD#41
D41# HD#42
(5) ADS# G1 ADS# D42# R25
VCC_CORE R24 HD#43 VCC_CORE VCC_CORE 3VSUS
D43# HD#44 ITP_TCK R258 27.4/F
AC1 AP0# D44# T26
V5 T25 HD#45
AP1# D45# HD#46
AA3 BINIT# D46# T22
H_IERR# R48 51 H_IERR# AC3 T23 HD#47 R90 R94 R95
IERR# D47# HD#48 10K 10K
D48# U26 56
HBREQ0# HBREQ# H6 U24 HD#49
(5) HBREQ0# BR0# D49#
ITP_CLK R391 62/F R742 *0 ARBITRATION U23 HD#50
D50# HD#51
PHASE D51# V25
2
SIGNALS U21 HD#52
ITP_CLK# R393 62/F D52# HD#53
D53# V22
D2 V24 HD#54 THERMTRIP# 1 3
(5) BPRI# BPRI# D54# THERMTRIP_SIO# (16)
G2 W26 HD#55 Q16
(5) BNR# BNR# D55#
HBREQ# R96 51 G4 Y26 HD#56 MMBT3904 ITP_TRST# R99 680
(5) HLOCK# LOCK# D56#
W25 HD#57
D57# HD#58
D58# Y23
CPUPWRGD R387 300/F F3 Y24 HD#59 VCC_CORE VCC_CORE 3VSUS
(5) HIT# HIT# D59#
E3 SNOOP PHASE Y21 HD#60
(5) HITM# HITM# D60#
E2 SIGNALS AA25 HD#61 VCC_CORE
(5) DEFER# DEFER# D61#
AA22 HD#62
D62# HD#63 R92 R91 R93
(5) HTRDY# J6 TRDY# D63# AA24
F1 RESPONSE 51 10K 10K BPM0# R50 51
2 (5) RS#0 RS0# 2
(5) RS#1 G5 RS1# PHASE DBI0# E21 HDBI0# (5)
(5) RS#2 F4 RS2# SIGNALS DBI1# G25 HDBI1# (5)
AB2 P26 BPM1# R59 51
RSP# DBI2# HDBI2# (5)
2
VCC_CORE V21
DBI3# HDBI3# (5)
BPM0# AC6
BPM1# BPM0# FERR#_R BPM4# R60 51
AB5 BPM1# DSTBN0# E22 HDSTBN0# (5) 1 3 FERR# (15)
A20M# R100 200 AC4 F21 Q15
BPM2# DSTBP0# HDSTBP0# (5)
Y6 K22 MMBT3904
BPM3# DSTBN1# HDSTBN1# (5)
BPM4# AA5 J23 BPM5# R49 51
BPM4#/ITP_PRDY# DSTBP1# HDSTBP1# (5)
IGNNE# R105 200 BPM5# AB4 R22
BPM5#/ITP_PREQ# DSTBN2# HDSTBN2# (5)
ITP_TDO D5 P23
TDO DSTBP2# HDSTBP2# (5)
ITP_TDI C1 W22
TDI DSTBN3# HDSTBN3# (5)
SMI# R101 200 ITP_TMS F7 W23