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5 4 3 2 1
Tonga-e (ZN5) 01
D
01--SCHMETICS INDEX D
02--BLOCK DIAGRAM
03--CLK. GEN./CK505
04--CPU(1/2) Host Bus
05--CPU(2/2) Power
06--NB(1/5) Host
07--NB(2/5) VGA,DMI,PCIE
08--NB(3/5) DDR III
09--NB(4/5) Power
10--NB(5/5) VSS
11--SB(1/4) HOST
12--SB(2/4) PCIE, PCI, USB, DMI
13--SB(3/4) SATA, GPIO
14--SB(4/4) Power, VSS
15--DDR III SO-DIMM
C
16--MXM3.0 C
17--LVDS TRANSMITTER
18--SATA HDD/ODD
19--MINI PCIE (WLAN/TV), IR
20--LCD PANEL, INVERTER
21--LAN PHY BOAZMAN
22--TPM, RJ45
23--JMB380 (Card Reader, 1394)
24--ON Board USB
25--FAN, CCD, PS2
26--SUPER IO SCH5327
27--AUDIO CODEC ALC272
28--LINE OUT, CRT
29--LED/SERIAL PORT/XDP
30--CIR
B
31--DC-IN,+12V B
32--VRD1.1 NCP5392
33--V_1P1_CORE
34--5VSB,3VSB,VCC3,VCC
35--V_3P3_CL/V_1V_1P1
36--DDR3_V-SM_V-SM-VTT
37--SCREW HOLE
38--SCHEMATICS CHANGE LIST(EVT1 to EVT2)
39--SCHEMATICS CHANGE LIST(EVT2 to DVT)
BOM Option Note
IV@ INSTALL FOR UMA SKU
EV@ INSTALL FOR DISCRETE GRAPHIC SKU
PROTO INSTALL FOR PROTO ONLY
NI UNINSTALL
A
I INSTALL FOR ALL SKU A
Quanta Computer Inc.
PROJECT : ZN5
Size Document Number Rev
X4
Schematics Index
Date: Friday, March 05, 2010 Sheet 1 of 40
5 4 3 2 1
1 2 3 4 5 6 7 8
VCCP Tonga-E _ZN5 System Block Diagram 02
V_1P1_CORE Intel
V_1P1_PCIEXPRESS
V_1P1_ICH Yorkfield LP CLOCK GENERATOR
A
V_FSB_VTT Wolfdale/Conroe CK505 A
CV193
E7XX0/E8XX0 Page 2
V_1P1_CL_MCH LGA775 Page 3,4
V_3P3_CL
FSB(800/1067/1333HZ)
LCD PANEL
800/1067 MHZ DDR III CH A/B: DDRIII-SO-DIMM
VCC3 21.5" Full HD
Page 14
3VSB NB
PCI-E 2.0 16X
Eaglelake SDVO LVDS Transmitter
VCC MUX
5VSB
Q43 CH7308B
LVDS
PI3PCIE2612-A LVDS_CONNECT 1
+12V Page 16
1254 pin
SATA 1
SATA - HDD(3.5) Page 5,6,7,8,9
Page 17
V_SM
V_1P5_ICH SATA 2 PCI-E(0-3)
SATA - ODD
Page 17
DMI MXM CONNECTOR LVDS
System Power PCI-E(7-15)
VER:3.0
PCI-E(4-6)
B
MUX Page 15 LVDS_CONNECT 2
B
PI3PCIE2612-A
USB 2.0 DP DP connect
Camera USB-1 PCI-Express 1X
Page 24
PCIE-2 PCIE-3 PCIE-1 PCIE-4
USB/wirless KB USB-4 MINI CARD-1 MINI CARD-2 LAN Card Reader
Dongle USB-10
WLAN Page 18 TV card 82567QM /JMB380 /JMB385
SB Page 18 Page 20 Page 20
Bluetooth
ICH10D
676 pin
Azalia
WLAN antenna TV antenna or RJ45 Media Slot
USB*4(Rear) 1394a
USB-0,7,8,9 (F connect)
USB-0 for DEBUG
Page 23 USB-11
USB-3,5
C USB*2(Side) C
Page 23 SPI
Page 10,11,12,13
LPC_BUS 32.768KHz
TPM EC ITE8512 FLASH
ROM
Page 22
SUPER IO Page 30
SMSC SCH5327
H.P Page 25
Page 26
AUDIO CODEC
ALC272
A_MIC IN Page 26
Page 26 IR
CIR
Blaster
D Page 30 Page 30 D
INT SPK
2WX2 Page 26 PS2 PS2
FAN
Keyboard Mouse
Page 25 Page 24 Page 25
DMIC IN
Page 26
Quanta Computer Inc.
LINE OUT PROJECT : ZN5
Page 27 Size Document Number Rev
X4
System Block Diagram
Date: Friday, March 05, 2010 Sheet 2 of 40
1 2 3 4 5 6 7 8
5 4 3 2 1
Clock Generator
03
CKVDD_IO
CKVDD C116 C133 C114 C128 C113 C126 C115 C125
10U 10U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
0805 0805 0402 0402 0402 0402 0402 0402
2.2K R501 PM_STPPCI# 10V 6.3V 10V 10V 10V 10V 10V 10V
I 5% 0402 X7R X5R X7R X7R X7R X7R X7R X7R
2.2K R502 PM_STPCPU# NI I I I I I I I
I 5% 0402
U6
D PCLK_TPM R136 5% I 33 0402 PCLK_TPM_R 1 54 CLK_CPU_BCLK_R RP2 1 2 33X2 D
22 PCLK_TPM PCI0/CR#_A CPUT0 CLK_CPU_BCLK 4
PCLK_EC R149 5% I 33 0402 PCLK_EC_R 3 53 CLK_CPU_BCLK#_R I 5% 3 4 4P2R To CPU
29,30 PCLK_EC PCI1/CR#_B CPUC0 CLK_CPU_BCLK# 4
PCLK_DEBUG R527 5% I 33 0402 PCLK_DEBUG_R 4
CKVDD_IO 19 PCLK_DEBUG *PCI2/SR_ENABLE
PCLK_SIO R528 5% I 33 0402 PCLK_SIO_R 5 51 CLK_MCH_BCLK_R RP3 1 2 33X2
3VSB 26 PCLK_SIO **PCI3/SATA_SEL CPUT1 CLK_MCH_BCLK 6
PCICLK_PCI4 R170 5% I 33 0402 PCICLK_PCI4_R 6 50 CLK_MCH_BCLK#_R I 5% 3 4 4P2R To NB
PCI4/SRC5_EN CPUC1 CLK_MCH_BCLK# 6
PCLK_ICH R522 5% I 33 0402 PCLK_ICH_R 7
12 PCLK_ICH PCI_F5/ITP_EN
47 XDP_DCLKOUT_DP_R RP4 1 2 33X2
SRCT8/CPU_ITPT XDP_DCLKOUT_DP 4,29
1 3Q47_D L5 PBY160808T-601Y-N 46 XDP_DCLKOUT_DN_R I 5% 3 4 4P2R XDP_DCLKOUT_DN 4,29 To CPU
Q47 I 600 ohm 1A 0603 SEL_SRC1 SRCC8/CPU_ITPC
48
AO3413 CKVDD SEL_SRC1_25_24.576**
SOT23-3 11 PM_STPCPU# PM_STPCPU# 37 13 DREFCLK_R RP8 3 4 IV@22X2
2
CPU_STOP#/SRCC5 DOT96T/SRCT0 DREFCLK 7
20V L4 PBY160808T-601Y-N 11 PM_STPPCI# PM_STPPCI# 38 14 DREFCLK#_R I 5% 1 2 4P2R To NB
PCI_STOP#/SRCT5 DOT96C/SRCC0 DREFCLK# 7
3A I 600 ohm 1A 0603 11 CK_PWRGD R508 0 CK_PWRGD_R 56
R493 47K Q47_G I I 5% 0402 CKPWRGD/PD# DREFSSCLK_R RP9
35,36 SLP_M 17 3 4 IV@33X2 DREFSSCLK 7
I 5% 0402 SRCT1/25MHz0 DREFSSCLK#_R I 5%
18 1 2 4P2R DREFSSCLK# 7 To NB
SMBCLK_MAIN SRCC1/25MHz1/24.576MHz
16,20,26,29 SMBCLK_MAIN 64
C499 SMBDATA_MAIN SCL CLK_PCIE_SATA_R RP10
16,20,26,29 SMBDATA_MAIN 63 21 3 4 33X2 CLK_PCIE_SATA 13
1U SDA SRCT2/SATAT CLK_PCIE_SATA#_R I 5%
22 1 2 4P2R CLK_PCIE_SATA# 13 To SB
0603 CG_XIN SRCC2/SATAC
60
10V CKVDD CG_XOUT XTAL_IN MXM_PEGCLK_R RP11
59 24 3 4 EV@33X2 MXM_PEGCLK 16
X7R XTAL_OUT SRCT3/CR#_C MXM_PEGCLK#_R I 5%
CK505 25 1 2 4P2R MXM_PEGCLK# 16 To MXM
I CKVDD_IO SRCC3/CR#_D
C102 10U R146 0 C127 0.1U 10V 27 CLK_PCIE_EXP_R RP12 3 4 33X2
SRCT4 CLK_PCIE_EXP 7
I 5% 0805 I 0402 X7R 12 28 CLK_PCIE_EXP#_R I 5% 1 2 4P2R To NB
VDDIO SRCC4 CLK_PCIE_EXP# 7
0805 20
VDDPLL3IO CLK_PCIE_ICH_R RP5
I
26 41 1 2 33X2 CLK_PCIE_ICH 12
R148 0 C131 0.1U 10V VDDSRCIO SRCT6 CLK_PCIE_ICH#_R I 5%
36 40 3 4 4P2R CLK_PCIE_ICH# 12 To SB
CKVDD X5R I 5% 0805 I 0402 X7R VDDSRCIO SRCC6
45
C122 10U 6.3V VDDSRCIO U6_44
6.3V 49 44 T173
R107 I 0603 X5R VDDCPUIO SRCT7/CR#_F U6_43
43 T174
1K SRCC7/CR#_E
0402 VDD_CK_VDD_PLL3 16 30 CLK_PCIE_MINI_R RP13 3 4 33X2
VDDPLL3 SRCT9 CLK_PCIE_MINI 19
5% R147 0 C130 0.1U 10V VDD_CK_VDD_PCI 2 31 CLK_PCIE_MINI#_R I 5% 1 2 4P2R To WLAN
VDDPCI SRCC9 CLK_PCIE_MINI# 19
I I 5% 0805 I 0402 X7R VDD_CK_VDD_48 9
C129 0.1U 10V VDD_CK_VDD_REF VDD48 CLK_PCIE_MINI2_R RP6
61 34 3 4 33X2 CLK_PCIE_MINI2 19
SEL_SRC1 I 0402 X7R VDD_CK_VDD_CPU VDDREF SRCT10 CLK_PCIE_MINI2#_R I 5%
55 35 1 2 4P2R CLK_PCIE_MINI2# 19 To TV
C VDD_CK_VDD_SRC VDDCPU SRCC10 C
39
R101 0 C112 0.1U 10V VDDSRC CLK_PCIE_JMB385_R RP7
33 1 2 33X2 CLK_PCIE_JMB385 23
R115 I 5% 0805 I 0402 X7R SRCT11/CR#_H CLK_PCIE_JMB385#_R I 5%
32 3 4 4P2R CLK_PCIE_JMB385# 23 To Card Reader
R100 0 C111 0.1U 10V SRCC11/CR#_G
1K
0402 I 5% 0805 I 0402 X7R 42
R109 0 C105 0.1U 10V GNDSRC R167 47K
I
52 CKVDD
I 5% 0805 I 0402 X7R GNDCPU FSA R524 33 I 5% 0402
23 10 CLKUSB_48 12
5% GNDSRC USB48/FS_A I 5% 0402 R166 33K
19
GND FSB R507 I 1K 0402 BSEL1 I 5% 0402
15 57
GND FS_B/TESTMODE R114 I 5% 33 0402
Pin17-18. SRC1 enabled 11
8
GND48
62 FSC R503 NI 5% IV@22 0402
CLK14SMC 26
GNDPCI REF/FS_C/TESTSEL 14M_CH7308B 17
29 R102 I 5% 33 0402
GNDSRC 14M_ICH 11
58 5%
GNDREF R104 47K CKVDD
I 5% 0402
CV193 *Internal 100K Pull High R103 33K
Strap Configuration TSSOP64
Critical
**Internal 100K Pull Low I 5% 0402
I
R518 10K PCLK_DEBUG_R CKVDD
CKVDD
NI 5% 0402
Internal 33 ohm resistor enabled
R517 10K CKVDD CKVDD
I 5% 0402
R489 R486 0402 NI
R520 10K PCLK_SIO_R R532 1K R487
CKVDD
NI 5% 0402
SATA output from PLL2 C528 27P NPO CG_XIN 1K 0402 10K 10K 5%
I 0402 50V 0402 Q55_C1K R523 FSA 5% Q49_C 1K R499 FSC 0402
2
R519 10K 5% I 5% 0402 I I 5% 0402 5% CK_PWRGD_R
3
3
I 5% 0402 Y1 Critical I Q49 NI
14.318MHZ 30PPM Q54_C 2 Q55 Q48_C 2 MMBT3904-7-F
3
R521 10K PCICLK_PCI4 I Q54 Q48 SOT23-3
CKVDD CPUSTP#/PCISTP enabled MMBT3904-7-F
1
3
3
NI 5% 0402 C530 27P NPO CG_XOUT