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BUSINESS SYSTEMS
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To: Metcalfe, Belleville, Gamer Datc: September 25, 1978

From: W. C. Lynch' Location: Palo Alto

Subjcct: Addresses in IOCSs Organization: SDD/SD/SSW IPilot




Archive document #: Binkley archive number
Keywords: OIS PrinceOps, IOCB, Wildflower
Filed on: [Iris] IOCBPrincOps.Memo
Copies: Archives Irby Kennedy Lampson Liddle Lynch
Thacker Townsend Wick

As a resull of a recent conversation with Butler Lampson on the topic of 110 on Wildflower, a
number of issues concerning the extent to which Wildflower meets the current OIS PrinceOps arose.
The tone of the issues is that the current PrinceOps may not be suitable for the more modest
processors in the OIS line. These issues all have to do with the question of whether or not the
buffer addresses in CSBs and IOCBs should be virtual or real.

As I see it the issues are:

1) If the buffer addresses are virtual, when are they bound to real addresses? The current
PrinceOps is silent on this point and might lead one to believe that it is possible to race map
changes against the I/O itself. The current implementation of the DO supports this to a large extent
by means of its mapping hardware. I believe that this is excessive al\d useless generality and that
virtual addresses should be considered bound to real address no later than the fetch of the IOCB
for processing. Any map changes between that point in time and the completion of the IOCB
would lead to undefined operation. I could easily be persuaded that the map should not be
changed under an 10CB while it was chained on the CSB for processing.

2) If the buffer addresses are virtual and are bound (translated) at the felch of the IOCB, what
happens when the buffer crosses a page boundry?

There seem to be three possibilities:

a) The processor is fast enough or powerful enough to rebind the incremented virtual
address at each page crossing. (The DO uses a more extreme measure in that the memory
control is powerful to rebind at each (I/O) memory reference.) This may be too severe a
constraint fbr small OIS processors.

b) Buffers are not permitted to cross page boundries. (We are now coming to Ihe view that
burters should not cross megabit bOlilldries on the DO). On the Wildflower this seems
acceptable for all but the display bitmap, which would have to be handled by one of the
other techniques. On the DO, the display bitmap and perh;lps lIT and lOT arc exceptions.
In any case Pilot must be modified so that its space allocation interf;lce supports tl1C
allocation of spaces having suitable properties.
[Iris] IOCBPrincOps.Memo September 25, 1978 2


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