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A B C D E
1 1
2
Compal confidential 2
Schematics Document
Mobile Penryn uFCPGA with Intel
3
Cantiga_PM+ICH9-M core logic 3
LA-4082P Vader Discrete (NB9P-GS,NB9M-GE)
2007-12-26 Rev 0.4
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/02/13 Deciphered Date 2006/03/10 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4082P Vader Discrete 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, December 26, 2007 Sheet 1 of 58
A B C D E
A B C D E
Compal confidential
Montevina Consumer Discrete
Dual-Core Thermal Sensor CK505 72QFN
EMC1402
Mobile Penryn Clock Generator
VRAM DDR2 Quad-Core Thermal Sensor
1
256/512MB SLG8SP553V 1
EMC1403
P4 P15
P22,23,24,25 uFCPGA-478 CPU
128 bits
P4, 5, 6
Fan conn P4
H_A#(3..35)
Discrete FSB
H_D#(0..63) 667/800/1066 MHz 1.05V
Nvidia NB9P-GE
Nvidia NB9M-GE DDR2 SO-DIMM X2
P18,19,20,21 DDR2 667MHz 1.8V BANK 0, 1, 2, 3 P13, 14
Intel Cantiga MCH Dual Channel
LVDS Panel
Interface P17 FCBGA 1329
USB conn x3
P7, 8, 9, 10, 11, 12 P38
CRT
2
P16 2
USB2.0*7
Support V1.3
DMI X4 C-Link BT Conn Touch Screen Conn
P38
HDMI P44 P38
USB Camera
P17
PCI-E BUS*5 & USB2.0 *3 Azalia
FPR Conn
Intel ICH9-M SATA Master-1
SATA Master-2
P42
SATA Slave
Realtek 8111C Mini-Card*3 New Card Discrete mBGA-676 Audio CKT AMP & Audio Jack
SATA Slave Codec_IDT9271B7 MIC & SPKR
(GLAN) WLAN & Robson &TV USB2.0*1 Flash Memory Card / P26,27,28,29 P34 P36
USB2.0*2 PCIE*1 TPA6020
PCIE*3 1394 Controller
P31 P32,35 P32
JM380 USB2.0 X1
CardReader/1394 M DC Sub-woofer & EQ
P35
P33
P37
RJ45/11 CONN
3 P31 LPC BUS SATA HDD Connector 3
P30
1394 port
Discrete only P33
SATA 2nd HDD Dock
ACCELEROMETER-1 Option Connector P30
USB2.0*1
P39
5 in1 Slot ENE RGB
P33
KB926 SATA ODD Connector RJ45
P30
ACCELEROMETER-2 P40 SPDIF
P39 CIR
e-SATA Combo Connector
Touch Pad CONN. Int.KBD USB2.0*1 & SATA*1 P38
MIC*1
LED RTC CKT.
P41 P40 LINE-OUT*1
P41 P27
SPI SPDIF
SPI ROM P42
Capsense switch Conn
P41
25LF080A P39
4 4
K/B backlight Conn
P41
Security Classification Compal Secret Data Compal Electronics, Inc.
2006/02/13 2006/03/10 Title
DC/DC Interface CKT. Issued Date Deciphered Date
Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P43 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4082P Vader Discrete 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, December 26, 2007 Sheet 2 of 58
A B C D E
A
O MEANS ON X MEANS OFF
Voltage Rails
SMBus Control Table
+5VS
+3VS SERIAL Thermal MINI
SOURCE INVERTER BATT EEPROM Sensor SODIMM CLK CHIP CARD LCD Sensor
+1.5VS
power board
+0.9V SMB_EC_CK1
plane
+VCCP SMB_EC_DA1
KB926 X V V X X X X X V
+5VALW +1.8V +CPU_CORE SMB_EC_CK2
+B SMB_EC_DA2
KB926 X X X V X X X X X
+3VALW +VGA_CORE SMB_CK_CLK1
+2.5VS SMB_CK_DAT1
ICH9 X X X X V V V X X
State +1.8VS DDC2_CLK
+1.2VS DDC2_DATA
NB9M X X X X X X X V X
+0.9VGA
USB PCIe Symbol Note :
S0
O O O O assignment: assignment:
USB-0 Right side PCIe-1 TV tuner/WWAN/Robeson
S1 USB-1 Right side PCIe-2 X
: means Digital Ground
O O O O
USB-2 Left side(with ESATA) PCIe-3 WLAN
S3 USB-3 Dock PCIe-4 New Card
O O O X : means Analog Ground
USB-4 Camera PCIe-5 Card
S5 S4/AC USB-5 WLAN reader GLAN (Marvell)
PCIe-6
O O X X @ : means just reserve , no build
USB-6 Bluetooth
S5 S4/ Battery only
DEBUG@ : means just reserve
O USB-7 Finger Printer
X X X for debug.
USB-8 MiniCard(WWAN/TV)
S5 S4/AC & Battery USB-9 Express
don't exist X X X X card
1
USB-10 X 1
USB-11 X
EC SM Bus1 address EC SM Bus2 address
Device HEX Address Device HEX Address
Smart Battery 16H 0001 011X CPU EMC1402 4CH 1001 1000b
24C16 A0H 1010 000X VGA 4DH 1001 1010b
CAP BOARD -- Cypress 38H
CAP BOARD -- ST b0H
I2C / SMBUS ADDRESSING
DEVICE HEX ADDRESS
DDR SO-DIMM 0 A0 10100000
DDR SO-DIMM 1 A4 10100100
CLOCK GENERATOR (EXT.) D2 11010010
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/02/13 Deciphered Date 2006/03/10 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4082P Vader Discrete 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, December 26, 2007 Sheet 3 of 58
A
5 4 3 2 1
+3VS
@ R730
ITP-XDP Connector XDP_DBRESET#_R 1 2 1K_0402_5%
Change value in 5/02 +VCCP
CONN@
JP42 XDP_TDI R731 1 2 54.9_0402_1%
1 GND0 GND1 2
XDP_BPM#5 3 4 XDP_TMS R732 1 2 54.9_0402_1%
D XDP_BPM#4 OBSFN_A0 OBSFN_C0 D
5 OBSFN_A1 OBSFN_C1 6
7 8 XDP_TDO R733 1 2 54.9_0402_1%
XDP_BPM#3 GND2 GND3
9 OBSDATA_A0 OBSDATA_C0 10
XDP_BPM#2 11 12 XDP_BPM#5 R734 1 2 54.9_0402_1%
OBSDATA_A1 OBSDATA_C1
13 GND4 GND5 14
XDP_BPM#1 15 16 XDP_HOOK1 @ R735 1 2 54.9_0402_1%
XDP_BPM#0 OBSDATA_A2 OBSDATA_C2
17 OBSDATA_A3 OBSDATA_C3 18
19 20 XDP_TRST# R792 1 2 54.9_0402_1%
7 H_A#[3..16] GND6 GND7
JCPUA 1025 For Support Dual core and Quad core 21 22
H_A#3 H_ADS# OBSFN_B0 OBSFN_D0 XDP_TCK R737 54.9_0402_1%
J4 A[3]# ADS# H1 H_ADS# 7 23 OBSFN_B1 OBSFN_D1 24 1 2
ADDR GROUP_0
H_A#4 L5 E2 H_BNR# 25 26
A[4]# BNR# H_BNR# 7 GND8 GND9
H_A#5 L4 G5 H_BPRI# XDP_BPM2#0 27 28
A[5]# BPRI# H_BPRI# 7 OBSDATA_B0 OBSDATA_D0
H_A#6 K5 XDP_BPM2#1 29 30 This shall place near CPU
H_A#7 A[6]# H_DEFER# OBSDATA_B1 OBSDATA_D1
M3 A[7]# DEFER# H5 H_DEFER# 7 31 GND10 GND11 32
H_A#8 N2 F21 H_DRD Y# XDP_BPM2#2 33 34
A[8]# DRDY# H_DRDY# 7 OBSDATA_B2 OBSDATA_D2
H_A#9 J1 E1 H_DBSY# 6 XDP_BPM2#3 XDP_BPM2#3 35 36
A[9]# DBSY# H_DBSY# 7 OBSDATA_B3 OBSDATA_D3
H_A#10 N3 1K_0402_5% 37 38
H_A#11 A[10]# H_BR0# GND12 GND13
P5 A[11]# BR0# F1 H_BR0# 7 5,27 H_PWRGOOD R738 1 2 H_PWRGOOD_R 39 PWRGOOD/HOOK0 ITPCLK/HOOK4 40 CLK_CPU_XDP CLK_CPU_XDP 15
H_A#12 P2 XDP_HOOK1 41 42 CLK_CPU_XDP# CLK_CPU_XDP# 15
H_A#13 A[12]# H_IERR# T1 HOOK1 ITPCLK#/HOOK5
L2 D20 43 44
CONTROL
A[13]# IERR# +VCCP VCC_OBS_AB VCC_OBS_CD +VCCP
H_A#14 P4 B3 H_INIT# 2 1 45 46 H_RESET#_R R739 1 2 1K_0402_1% H_RESET#
A[14]# INIT# H_INIT# 27 HOOK2 RESET#/HOOK6
H_A#15 P1 Place TP with a C851 0.1U_0402_16V4Z 47 48 XDP_DBRESET#_R R740 1 2 0_0402_1% XDP_DBRESET#
H_A#16 A[15]# H_LOCK# HOOK3 DBR#/HOOK7
R1 A[16]# LOCK# H4 H_LOCK# 7 GND 0.1" away 49 GND14 GND15 50
H_ADSTB#0 M1 51 52 XDP_TDO
7 H_ADSTB#0 ADSTB[0]# SDA TD0
C1 H_RESET# Removed at 53 54 XDP_TRST#
RESET# H_RESET# 7 SCL TRST#
H_REQ#0 K3 F3 H_RS#0 55 56 XDP_TDI
7 H_REQ#0
H_REQ#1 H2
REQ[0]# RS[0]#
F4 H_RS#1
H_RS#0 7 5/30.(Follow XDP_TCK 57
TCK1 TDI
58 XDP_TMS 0_0402_5%
7 H_REQ#1 REQ[1]# RS[1]# H_RS#1 7 TCK0 TMS
7 H_REQ#2
H_REQ#2 K2 REQ[2]# RS[2]# G3 H_RS#2
H_RS#2 7 Chimay) 59 GND16 GND17 60 XDP_PRE R741 1 2
H_REQ#3 J3 G2 H_TRDY#
7 H_REQ#3 REQ[3]# TRDY# H_TRDY# 7
H_REQ#4 L1 SAMTE_BSH-030-01-L-D-A Place R191 within 200ps (~1")
7 H_REQ#4 REQ[4]#
G6 H_HIT#
7 H_A#[17..35] HIT# H_HIT# 7 to CPU
H_A#17 Y2 E4 H_HITM#
C A[17]# HITM# H_HITM# 7 C
H_A#18 U5
H_A#19 A[18]# XDP_BPM#0
R3 A[19]# BPM[0]# AD4
ADDR GROUP_1
H_A#20 W6 AD3 XDP_BPM#1 QC@
H_A#21 A[20]# BPM[1]# XDP_BPM#2 U78
U4 A[21]# BPM[2]# AD1
H_A#22 Y5 AC4 XDP_BPM#3 +3VS
H_A#23 A[22]# BPM[3]# XDP_BPM#4
U1 A[23]# PRDY# AC2
XDP/ITP SIGNALS
H_A#24 R4 AC1 XDP_BPM#5 1 10 SMB_EC_CK2
A[24]# PREQ# VDD SMCLK
0.1U_0402_16V4Z
H_A#25 T5 AC5 XDP_TCK Delete H_PROCHOT# off-page due to 1
H_A#26 A[25]# TCK XDP_TDI QC@ H_THERMDA SMB_EC_DA2
T3 AA6 2 9
H_A#27 W2
A[26]# TDI
AB3 XDP_TDO VR doesn't have it's input pin @08/31 C2113 QC@ C2114 DP1 SMDATA
H_A#28 A[27]# TDO XDP_TMS H_THERMDC
W5 A[28]# TMS AB5 1 2 3 DN1 ALERT# 8
H_A#29 XDP_TRST# 2 +3VS 2200P_0402_50V7K
Y4 A[29]# TRST# AB6
H_A#30 U2 C20 XDP_DBRESET# H_THERMDA2 4 7 THERM#
A[30]# DBR# XDP_DBRESET# 28 DP2 THERM#
H_A#31 V4 QC@ C2115
H_A#32 A[31]#
W3 A[32]#
10/08 follow Intel suggestion to change value 1 2 H_THERMDC2 5 DN2 GND 6
0.1U_0402_16V4Z
H_A#33 AA4 THERMAL 1 2200P_0402_50V7K
H_A#34 A[33]# H_PROCHOT# R7
AB2 A[34]# 1 2 49.9_0402_1% +VCCP
H_A#35 AA3 D21 C1 EMC1403-1-AIZL-TR_MSOP10
H_ADSTB#1 A[35]# PROCHOT# H_THERMDA_R R8 H_THERMDA
7 H_ADSTB#1 V1 ADSTB[1]# THERMDA A24 1 2 0_0402_5%