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System Block Diagram Date: 2009.12.21 20:31:16
+07'00'
D/D BOARD
1.CHARGER,DC JACK
CLEVO M540G/M550G System Block Diagram 1.+3V,+5V,+12V
2.+1.5VS,+3VS,+5VS,+12VS
2.CRT,S-VIDEO,RI-11 CLOCK GEN. MEMORY TERMINATIONS 3.+3VH8,+5VH8
3.+VDD3,+VDD5,+VDD12 ICS954226
PROCESSOR
AUDIO BOARD DDR2 SDRAM SOCKET DDR VR 1.+1.8V,+1.5V,+0.9V
SOCKET
1.AUDIO PHONE JACK
2.USB CONNECTOR
479 uFCPGA 1.+VCORE
SO-DIMM2 SO-DIMM1
B.Schematic Diagrams
HOT KEY BOARD 1.+1.05VS,+2.5VS
D/D BOARD
1.POWER BOTTON FSB
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S-VIDEO
2.INDICATOR LED MINI DIN 7
Sheet 1 of 40 3.LID SWITCH NORTH BRIDGE
MAIN BOARD AUDIO BOARD
System Block CRT
DDRII
400/533 MHz RJ-11 LINE
IN
SPDIF
OUT
MIC
IN
HP
OUT
Diagram 915GM
LCD CONN(LVDS) 1257 PCBGA AZALIA
7.1 CHANNEL OUT
MBC
MODULE
AZALIA AUDIO
DMI CODEC AMP. INT.
SPK
MBC CONN. ALC880 APA2020A
USB2.0 SM BUS
AUDIO BOARD
SOUTH BRIDGE AZALIA LINK
1394
CCD MBC USB2 USB0 ICH6-M PCI BUS 33MHz ENE
VT6307S
609 BGA SATA-150
PATA-100 Mini PCI LAN PCMCIA
IEEE
USB3 USB1 LPC FWH SOCKET RTL8100CL/ ENE 1394
RTL8100SBL CB714B
KBC BIOS MASTER SATA CONN.
H8/2111 FWH 2.5" HDD 2.5" HDD
MINI PCI LAN BOARD
PCMCIA 3 IN 1
H8 SM BUS Wireless LAN SOCKET CARD
RJ-45 READER
802.11 a/b/g
TOUCH INT. K/B CONN.
PAD THERMAL SMART SMART SLAVE
SENSOR FAN BATTERY
F75383M
CD-ROM/CD-RW/DVD-COMBO/
DVD-ROM/DVD+-RW
B-2
Schematic Diagrams
DOTHAN 1/2
JSKT1B
[4] H_D#[63:0] H_D#[63:0] [4]
H_D#0 A19 Y26 H_D#32
H_D#1 A25 D0# D32# AA24 H_D#33
JSKT1A H_D#2 A22 D1# D33# T25 H_D#34
[4] H_A#[31:3] D2# D34#
H_A#3 P4 N2 H_D#3 B21 U23 H_D#35
DATA GROUP 0
DATA GROUP 2
A3# ADS# H_ADS# [4] D3# D35#
H_A#4 U4 L1 H_D#4 A24 V23 H_D#36
A4# BNR# H_BNR# [4] D4# D36#
H_A#5 V3 J3 H_D#5 B26 R24 H_D#37
A5# BPRI# H_BPRI# [4] D5# D37#
H_A#6 R3 H_D#6 A21 R26 H_D#38
H_A#7 V2 A6# L4 H_D#7 B20 D6# D38# R23 H_D#39
H_DEFER# [4]
ADDR GROUP0
H_A#8 W1 A7# DEFER# H2 H_D#8 C20 D7# D39# AA23 H_D#40
A8# DRDY# H_DRDY# [4] D8# D40#
H_A#9 T4 M2 H_D#9 B24 U26 H_D#41
A9# DBSY# H_DBSY# [4] D9# D41#
H_A#10 W2 H_D#10 D24 V24 H_D#42
H_A#11 Y4 A10# N4 H_D#11 E24 D10# D42# U25 H_D#43
H_BR0# [4]
Sheet 2 of 40
H_A#12 Y1 A11# BR0# H_D#12 C26 D11# D43# V26 H_D#44
H_A#13 U1 A12# A4 H_IERR# H_D#13 B23 D12# D44# Y23 H_D#45
H_A#14 AA3 A13# IERR# B5 H_D#14 E23 D13# D45# AA26 H_D#46
H_INIT# [13]
CONTROL
H_A#15 Y3 A14# INIT# H_D#15 C25 D14# D46# Y25 H_D#47
DOTHAN 1/2
H_A#16 AA2 A15# J2 C23 D15# D47# W25
A16# LOCK# H_LOCK# [4] [4] H_DSTBN#0 DSTBN0# DSTBN2# H_DSTBN#2 [4]
U3 C22 W24
[4] H_ADSTB#0 ADSTB#0 [4] H_DSTBP#0 DSTBP0# DSTBP2# H_DSTBP#2 [4]
B11 H_CPURST# D25 T24
[4] H_REQ#[4:0] RESET# H_CPURST# [4] [4] H_DINV#0 DINV0# DINV2# H_DINV#2 [4]
H_REQ#0 R2 H1
REQ0# RS0# H_RS#0 [4]
H_REQ#1 P3 K1
REQ1# RS1# H_RS#1 [4] [4] H_D#[63:0] H_D#[63:0] [4]
H_REQ#2 T2 L2 H_D#16 H23 AB25 H_D#48
REQ2# RS2# H_RS#2 [4] D16# D48#
H_REQ#3 P1 M3 H_D#17 G25 AC23 H_D#49
REQ3# TRDY# H_TRDY# [4] D17# D49#
H_REQ#4 T1 H_D#18 L23 AB24 H_D#50
REQ4# K3 H_D#19 M26 D18# D50# AC20 H_D#51
DATA GROUP 1
DATA GROUP 3
[4] H_A#[31:3] H_HIT# [4]
B.Schematic Diagrams
H_A#17 AF4 HIT# K4 H_D#20 H24 D19# D51# AC22 H_D#52
A17# HITM# H_HITM# [4] D20# D52#
H_A#18 AC4 H_D#21 F25 AC25 H_D#53
H_A#19 AC7 A18# C8 H_BPM0# H_D#22 G24 D21# D53# AD23 H_D#54
ADDR GROUP1
H_A#20 AC3 A19# BPM#0 B8 H_BPM1# H_D#23 J23 D22# D54# AE22 H_D#55
H_A#21 AD3 A20# BPM#1 A9 H_BPM2# H_D#24 M23 D23# D55# AF23 H_D#56
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XTP/ITP
H_A#22 AE4 A21# BPM#2 C9 H_BPM3# H_D#25 J25 D24# D56# AD24 H_D#57
H_A#23 AD2 A22# BPM#3 A10 H_PRDY# H_D#26 L26 D25# D57# AF20 H_D#58
H_A#24 AB4 A23# PRDY# B10 H_PREQ# H_D#27 N24 D26# D58# AE21 H_D#59
H_A#25 AC6 A24# PREQ# A13 H_TCK H_D#28 M25 D27# D59# AD21 H_D#60
H_A#26 AD5 A25# TCK C12 H_TDI H_D#29 H26 D28# D60# AF25 H_D#61
H_A#27 AE2 A26# TDI A12 H_TDO H_D#30 N25 D29# D61# AF22 H_D#62
H_A#28 AD6 A27# TDO C11 H_TMS H_D#31 K25 D30# D62# AF26 H_D#63
H_A#29 AF3 A28# TMS B13 H_TRST# D31# D63#
H_A#30 AE1 A29# TRST# A7 ITP_DBRST# K24 AE24
A30# DBR# [4] H_DSTBN#1 DSTBN1# DSTBN3# H_DSTBN#3 [4]
H_A#31 AF1 L24 AE25
A31# [4] H_DSTBP#1 DSTBP1# DSTBP3# H_DSTBP#3 [4]
AE5 B17 H_PROCHOT# J26 AD20
THERM
[4] H_ADSTB#1 ADSTB#1 PROCHOT# [4] H_DINV#1 DINV1# DINV3# H_DINV#3 [4]
B18 H_THERMDA
C2 THERMDA A18 H_THERMDC Z0201 E1 P25 COMP0
[13] H_A20M# A20M# THERMDC PSI# COMP0
D3 P26 COMP1
[13] H_FERR# FERR# COMP1
A3 C17 PM_THRMTRIP# C16 AB2 COMP2
[13] H_IGNNE# IGNNE# THERMTRIP# PM_THRMTRIP# [5,13] [3,4] CPU_BSEL0 BSEL0 COMP2
C14 AB1 COMP3
[4] CPU_BSEL1 BSEL1 COMP3
C6 A15 CLK_CPU_ITP#
[13] H_STPCLK# STPCLK# ITPCLK1 CLK_CPU_ITP# [11] Z0202
D1 A16 CLK_CPU_ITP B2 G1
[13] H_INTR CLK_CPU_ITP [11] MISC H_DPRSTP# [13]
CLK
D4 LINT0 ITPCLK0 B14 CLK_CPU_FSB# NC1 DPRSTP# B7
[13] H_NMI LINT1 BCLK1 CLK_CPU_FSB# [11] Z0203 DPSLP# H_DPSLP# [13]
B4 B15 CLK_CPU_FSB C3 C19
[13] H_SMI# SMI# BCLK0 CLK_CPU_FSB [11] Z0204 RSVD2 DPWR# H_DPWR# [4]
AF7 E4 H_PWRGD
Z0205 RSVD3 PWRGOOD H_PWRGD [13]
PZ47903-2741-13 AC1 A6
Z0206 RSVD4 SLP# H_CPUSLP# [4,13]
E26
RSVD5 C5 Z0207
AD26 TEST1 F23 Z0208
GTLREF0 TEST2
+VCCP PZ47903-2741-13
R211 56_04 H_IERR# Layout Note: R226 R212
R217 56_04 H_PREQ# R231 1K_1%
R224 56_04 H_PROCHOT#
0.5" max, Zo= 55 Ohms CPU_GTLREF *1K_04 *1K_04
H_CPURST# +VCCP
R219 54.9_1%
R208 200_1% H_PWRGD
R218 39.2_1% H_TMS C452 C451 C450 R232
R222 150_1% H_TDI
R221 54.9_1% H_TDO 1u_X7R 0.1u_X7R_04 0.01u_04 2K_1%
R220 27.4_1% H_TCK Layout Note:
R223 680_1% H_TRST#
COMP0, COMP2: 0.5" Max, Zo=27.4 Ohms
R214 150_1% ITP_DBRST#
COMP1, COMP3: 0.5" Max, Zo=55 Ohms
+3VS
Best estimate is 18 mils wide trace for outer
layers and 14 mils wide trace if on internal
+VCC_THRM +3VH8
layers.
Q65
AO3409 R236 200_1% COMP0
S D Z0209 COMP1
+3VH8
COMP2
G COMP3
R243 100K_04 R235 C456
Z0210 R242 R241 R445
100K_04 1u
4.7K_04 4.7K_04 10K_04 D37 SCS551V R207 R210 R234 R233
C A
PM_THRM# [14]
U19 54.9_1% 27.4_1% 54.9_1% 27.4_1%
D
1 4
H_THERMDA 2 VDD THERM 6
D+ ALERT H8_THRM# [21]
G
[21] THERMAL_ON#
Q16 C448
2N7002
S
2200p 3 7
D- SDATA H8_SDAT1 [21]
H_THERMDC 5 8
GND SCLK H8_SCLK1 [21]
F75383M
+3VS [7,9,10,11,12,13,14,15,16,17,18,19,20,22,23,25,26,27,29,30]
+3VH8 [12,21,22,27]
+VCCP [3,4,5,6,7,8,13,15,29,30]
Layout Note: Layout Note:
Route H_THERMDA and H_THERMDC Near to ADM1032
on the same layer.
10 mil trace on 10 mil spacing.
DOTHAN 1/2 B - 3
Schematic Diagrams
DOTHAN 2/2
JSKT1D
A2 D13
A5 VSS0 VSS97 D15
+VCORE +VCORE A8 VSS1 VSS98 D17
JSKT1C +VCCA_CPU +3V A11 VSS2 VSS99 D19
AA11 G5 U18 A14 VSS3 VSS100 D21
AA13 VCC0 VCC59 H22
200mA 6 1 A17 VSS4 VSS101 D23
AA15 VCC1 VCC60 H6 VOUT VIN A20 VSS5 VSS102 D26
AA17 VCC2 VCC61 J21 Z0304 4 3 A23 VSS6 VSS103 E3
AA19 VCC3 VCC62 J5
R1 PG EN C466 A26 VSS7 VSS104 E6
AA21 VCC4 VCC63 K22 C454 C455 R238
RA 5 2 AA1 VSS8 VSS105 E8
AA5 VCC5 VCC64 U5 R229 ADJ GND 0.1u_X7R_04 AA4 VSS9 VSS106 E10
AA7 VCC6 VCC65 V22 1u_X7R 1000p 499_1% AME8804AEEY AA6 VSS10 VSS107 E12
AA9 VCC7 VCC66 V6 *0_04 AA8 VSS11 VSS108 E14
AB10 VCC8 VCC67 W21 AA10 VSS12 VSS109 E16
AB12 VCC9 VCC68 W5 Z0305 AA12 VSS13 VSS110 E18
AB14 VCC10 VCC69 Y22 AA14 VSS14 VSS111 E20
AB16 VCC11 VCC70 Y6 +VCCA_CPU Ra SUSB# [14,18,21,22,27,28,29]
AA16 VSS15 VSS112 E22
AB18 VCC12 VCC71 R237 R488 100K_04 AA18 VSS16 VSS113 E25
AB20
AB22
VCC13
VCC14
POWER VCCA0
F26
B1 Z0301 1K_1% Q92
Z0307
Q93
+3V AA20
AA22
VSS17
VSS18
VSS114
VSS115
F1