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5 4 3 2 1
D D
LAGUNA
REV : X00
C @ : Depop Component C
PRELIMINARY
B B
Dothan Schematic with Capture CIS and Function field
uFCPGA Dothan
02-07-2004
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A REV: 0.3 A
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DELL CONFIDENTIAL/PROPRIETARY
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Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
Cover Sheet
in
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Size Document Number Rev
xa
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
Board Number LA2111 0.3
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
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Date: Monday, February 09, 2004 Sheet 1 of 61
5 4 3 2 1
5 4 3 2 1
Compal confidential
Block Diagram
D GUARDIAN Dothan D
EMC6N300 page 39
uFCPGA CPU
page 7,8,9
Fan Control
page 15
HA#(3..31) HD#(0..63)
System Bus Memory
CRT CONN. 400 / 533MHz
BUS(DDR2)
& TV-OUT
VGA page 19
Alviso SO-DIMM X2
1.8V 400 / 533MHz
Board BANK 0, 1, 2, 3page16,17
GMCH-M Clock Generator
PCI-E 16X
page
1257 FC-BGA 10,11,12 CK410M
VGA CONN. 13,14
C page 6 C
page 18
DMI
DOCKING DOCKING MINI PCI 1.5V DC IN page
100MHz 44
PORT BUFFER
PAGE 35 PAGE 34 page 33
BATT page
USB
PCI BUS 3.3V 24.576MHz AC-LINK IN 45
ICH6 MDC
page 28
609 BGA SATA Marvell 1.8V / 0.9V page
IDSEL:AD20 3.3V 33MHz PCI-E BUS AC97 44
(PIRQA/B#,GNT#2,REQ#2) LAN SATA to PATA
BCM5751M page ATA100 and SATA Codec
B
CardBus Controller 20,21,22,23 page 52
STAC9751 1.5V/1.05V(+VCCP) B
PCI6515 page 29
PATA page 25 page 47
CDROM
page 31,32
Analog Switch USB HDD VCORE
page 30 FDD AMP& Phone
page 52 page 49
Smart card Slot 0 LPC BUS SATA HDD Jack
USB page 26
3.3V 33MHz
page32 page 24
Transformer 5V/3.3V/15V
page 30
page31 USBPORT 0 page 46
FDD
Macallen III USBPORT 1
DOCK
RJ45 LPC to X-BUS USB2.0 CHARGER page
page 30 & Super I/O USBPORT 2
48MHz / 480Mb BT 50,51
X BUS page USBPORT 3
36,37 Card BUS
USBPORT 4
JUSB1 U
COM Int.KBD
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USBPORT 5
A
SST39VF080 page 28 page 38 JUSB1 D
A
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page 27
USBPORT 6
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page 38 JUSB2 U
FIR (LED/B)40
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Touch Pad page USBPORT 7
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page 38 JUSB2 D DELL CONFIDENTIAL/PROPRIETARY
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Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
Block Diagram
in
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
xa
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Board Number LA2111 0.3
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
he
Date: Monday, February 09, 2004 Sheet 2 of 61
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5 4 3 2 1
D D
PM TABLE
C
+5VRUN +RTC_CELL USB TABLE C
+3VRUN +0.9V_DDR_VTT PCI TABLE
power +3VALW +3VSUS +2.5VRUN
plane
USB PORT# DESTINATION
+5VALW +5VSUS +1.8VRUN
PCI DEVICE IDSEL REQ#/GNT# PIRQ
+1.8VSUS +1.5VRUN
+1.5VSUS +VCC_CORE 0 FDD (module bay)
State
+VCCP
CARD BUS AD17 1 D,C 1 DOCK
+15V
2 MPCI (BlueTooth)
S0 ON ON ON
DOCK AD24 0 A 3 NEW Connector
S1 ON ON ON
MINI PCI AD19 3 D,B 4 USB Port 1(Top)
S3 ON ON OFF 5 USB Port 1(Bottom)
6 USB Port 2(Top)
S5 S4/AC ON OFF OFF
7 USB Port 2(Bottom)
B B
S5 S4/AC don't exist OFF OFF OFF
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A A
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DELL CONFIDENTIAL/PROPRIETARY
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Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
Index and Config.
in
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
xa
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Board Number LA2111 0.3
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
he
Date: Monday, February 09, 2004 Sheet 3 of 61
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5 4 3 2 1
+5VALW
D D
ADAPTER
PWR_SRC +3VALW
BATTERY G_PWR_SRC
C C
SUSPWROK_5V
SUSPWROK_5V
RUNPWROK
RUNPWROK
SUS_ON
SUS_ON
+5RUN
+5VSUS +3VSRC +VCC_CORE +1.5VSUS +VCCP +1.8VSUSP +0.9V_DDR_VTT
AUDIO_AVDD_ON
SUSPWROK_5V
PJP11,PJP12
RUN_ON
B B
(Option)
RUN_ON
RUN_ON RUN_ON
PL9
+5VHDD +5VMOD +5VRUN +15V VDDA +3VRUN V3P3LAN +3VSUS +2.5VRUN +1.5VRUN +1.8VSUS
RUN_ON
L10
+1.8VRUN
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A A
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DELL CONFIDENTIAL/PROPRIETARY
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Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
Power Rail
in
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
xa
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Board Number LA2111 0.3
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
he
Date: Monday, February 09, 2004 Sheet 4 of 61
5 4 3 2 1
5 4 3 2 1
+3VRUN
ICH_SMBCLK CK_SCLK
7002
D
+3VSUS CLK GEN. D
ICH6 ICH_SMBDATA CK_SDATA
7002
DIMM0 DIMM1 LAN_SMBCLK
7002 7002
Address 00 Address 10 LOM
LAN_SMBDATA
7002 7002
CLK_SMB V_3P3_LAN
DAT_SMB +3VALW GUARDIAN
C C
24C04
DOCK_SMB_CLK
SIO DOCK_SMB_DAT +5VALW DOCKING
Macallen III
SBAT_SMBCLK
SBAT_SMBDAT +5VALW 2'nd
BATTERY
B B
VGA
PBAT_SMBCLK
1'st
PBAT_SMBDAT +5VALW BATTERY
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A A
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CHARGER
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DELL CONFIDENTIAL/PROPRIETARY
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Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
SMBUS TOPOLOGY
in
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
xa
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Board Number LA2111 0.3
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
he
Date: Monday, February 09, 2004 Sheet 5 of 61
5 4 3 2 1
5 4 3 2 1
+3VRUN CK_VDD_MAIN
+3VRUN
0.1U_0402_16V4Z~D
1 2 CK_VDD_MAIN
100K_0402_5%~D
100K_0402_5%~D
L33 2 1 1 1 1 CLK_MCH_BCLK 2 R92 1
1
1
1 BLM21PG600SN1D_0805~D C89 49.9_0402_1%~D
C94 C91 C87 C85 CLK_MCH_BCLK# 2 R86 1
R57
R61
C992
10U_0805_6.3V6M~D 0.047U_0402_16V7K~D 0.047U_0402_16V7K~D 0.047U_0402_16V7K~D 0.047U_0402_16V7K~D 49.9_0402_1%~D
1 2 2 2 2 CK_BCLK 2 R84 1
2 CK_VDD_MAIN2 49.9_0402_1%~D
2
2
CK_BCLK# 2 R80 1
ICH_SMBDATA CK_SDATA 49.9_0402_1%~D
D
S
<<22,33>> ICH_SMBDATA 1 3 CK_SDATA <<16,17>> 1 2
Q6 L130 2 1 1 CK_ITP 2 R77 1
2N7002_SOT23~D BLM21PG600SN1D_0805~D C993 49.9_0402_1%~D
C994 C995 Place near each pin CK_ITP# 2 R70 1
G
2
10U_0805_6.3V6M~D 0.047U_0402_16V7K~D 0.047U_0402_16V7K~D 49.9_0402_1%~D
D
+3VRUN
1 2 2
W>40 mil CLK_PCIE_SATA 1 R146 2
49.9_0402_1%~D
D
CLK_PCIE_SATA# 1 R140 2
2
49.9_0402_1%~D
G
Q8 Place near CK410 CLK_PCIE_VGA 1 R153 2
ICH_SMBCLK 1 3 2N7002_SOT23~D CK_SCLK 49.9_0402_1%~D
<<22,33>> ICH_SMBCLK CK_SCLK <<16,17>>
CLK_PCIE_VGA# 1 R154 2
D
S
R1106 49.9_0402_1%~D
2.2_0402_5%~D CLK_PCIE_ICH 1 R156 2
0.047U_0402_16V7K~D
D 1 2 CK_VDD_A 49.9_0402_1%~D
CK_VDD_A CK_VDD_48 CK_VDD_REF CLK_PCIE_ICH# 1 R159 2
0.047U_0402_16V7K~D
1 1 1 1 1 1 49.9_0402_1%~D
0.047U_0402_16V7K~D