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1 1




JSKAA
Irving 10/10G
2 2




LA4161P REV 1.0 Schematic
3 3




Intel Penryn/ Cantiga (GL45/GM45/PM45)/ ICH9M
2008-10-01 Rev. 1.0


4 4




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/10/1 Deciphered Date 2009/10/1 Title
SCHEMATICS,M/B A4161
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401562 G
Date: Monday, February 23, 2009 Sheet 1 of 48
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Compal Confidential XDP Debug Fan Control Intel Penryn Processor Thermal Sensor Clock Generator
page 4 page 4 Seligo--SLG8SP553VTR
SMSC--EMC1402-1-ACZL
Model Name : JSKAA uPGA-478 Package page 4
ICS--ICS9LPRS387AKLFT
page 16
File Name : (Socket P) page 4,5,6
1 1

FSB
H_A#(3..35) 667/800/1066MHz H_D#(0..63)
CRT
page 18
Memory BUS(DDRII) 200pin DDRII-SO-DIMM X2
Intel Cantiga
LCD Conn. Dual Channel BANK 0, 1, 2, 3 page 14,15
VGA Conn.
NB9M-GS
page 17
PM/GM/GL
HD Audio
NB9P-GE/GS PCI-Express 16x 1.8V DDRII 533/667/800
3.3V 24.576MHz/48Mhz
NB9E-GS page 17
uFCBGA-1329 HD Audio
HDMI CEC 3.3V 24.576MHz/48Mhz
EC Controller
HDMI Conn. Level Shifter page 7,8,9,10,11,12,13
page 19
SMBUS R5F211A4SP page 19
page 19 PCIe 1x LOM(1G) PCIe port 3 RJ45




C-Link
DMI
RTL8111C page 28 page 28

Mini Slot 1 Mini Slot 2 Mini Slot 3 PCIe 1x PCIe port 5
2
TMA page 27
2
PCIeMini Card -- PCIeMini Card -- USB
WiMAX UWB/ TV tuner/ GPS 5V 48MHz
USB port 7 page 26 USB port 6 page 26 USB conn x2 FingerPrinter Int. Camera
BT2.1 Flica
USB USB port0--Rare USB port 5 USB port 4 USB port 11
PCIeMini Card -- PCIeMini Card -- USB port1--Right USB port 9
WLAN PCIe port 4 Robson/ HDDVD PCIe 1x [4..5] Intel ICH9-M 5V 48MHz page 25 page 25 page 25 page 25 page 25
page 26 PCIe port 2 page 27

BGA-676 SATA [0..1] SATA HDD0 SATA HDD1
Express Card Slot USB 5V 1.5GHz(150MB/s) page 24 page 24
5V 48MHz page 20,21,22,23
Express Card Express Card
USB port 8 page 26 PCIe port 1 page 26 PCIe 1x SATA SATA ODD
5V 1.5GHz(150MB/s) page 24
USB
FM Tuner I2C from SB 5V 48MHz
eSTAT/USB Conn
NXP--TEA5763HN eSATA port5 USB port 3
page 25 SATA page 24 page 24
3
5V 1.5GHz(150MB/s) 3


PCI BUS HD Audio MDC 1.5 Conn
3.3V 33 MHz 3.3V 24.576MHz/48Mhz page29
Int. MIC CONN
LPC BUS AOCR/B page29
3.3V 33 MHz LS4164P Conn.
LPC Debug HDA- SPK-L/R CONN
Mini PCI ENE KB926 C0 ALC272
Port. page35 page34
SPK-L/R LED CONN
page29
ISDB-T TV Tuner CardReader/ 1394-
page32 JMB380 PCIe 1x
PCIe port 6
LED/B FUN/B
B-CAS Conn. Conn. Int.KBD IR/B USB- Left Port
page32 page36 page36 page35 page33
USB
DC I/F to HW USB Port2 5V 48MHz
page37 PWR/B page29
Conn. SPI ROM EC Debug
4 VR/B page36 page35 page35 4

Power Circuit DC/DC Conn. T/P
page36 page35
page38~45
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/10/1 Deciphered Date 2009/10/1 Title
SCHEMATICS,M/B A4161
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401562 G
Date: Monday, February 23, 2009 Sheet 2 of 48
A B C D E
A B C D E


SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5#

Voltage Rails Full ON HIGH HIGH HIGH HIGH

S1(Power On Suspend) LOW HIGH HIGH HIGH
Power Plane Description S1 S3 S5 G3
S3 (Suspend to RAM) LOW LOW HIGH HIGH
VIN Adapter power supply (19V) ON ON ON OFF
B+ AC or battery power rail for power circuit. ON ON ON ON S4 (Suspend to Disk) LOW LOW LOW HIGH
1 1
+CPU_CORE Core voltage for CPU ON OFF OFF OFF
S5 (Soft OFF) LOW LOW LOW LOW
+0.9V 0.9V switched power rail for DDR terminator ON OFF OFF OFF
+1.05VS 1.05V switched power rail ON OFF OFF OFF G3 LOW LOW LOW LOW
+1.5VS 1.5V switched power rail ON OFF OFF OFF
+1.8V 1.8V power rail for DDR ON ON OFF OFF
Reserve for AD channel define.
+3VALW 3.3V always on power rail ON ON ON OFF
Vcc 3.3V +/- 5%
+3VL 3.3V always on power rail ON ON ON ON
Ra/Rc/Re 100K +/- 5%
Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+3V_SB 3.3V power rail for LAN ON ON OFF OFF
+3V_LAN 3.3V power rail for LAN ON ON OFF OFF
0 0 0 V 0 V 0 V
+3V_WLAN 3.3V power rail for LAN ON ON OFF OFF
1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+3VS 3.3V switched power rail ON OFF OFF OFF
2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+5VALW 5V always on power rail ON ON ON OFF
3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+5VL 5V always on power rail ON ON ON ON
4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+5V_SB 5V power rail for SB ON ON OFF OFF
5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+5VS 5V switched power rail ON OFF OFF OFF
6 200K +/- 5% 1.935 V 2.200 V 2.341 V
2
+VSB VSB always on power rail ON ON ON OFF
7 NC 2.500 V 3.300 V 3.300 V 2


+RTCVCC RTC power ON ON ON ON
BTO Option Table
External PCI Devices BTO Item BOM Structure
Device IDSEL# REQ#/GNT# Interrupts

AD18 (Master) 1/1 (Master) PIRQG (Master)
PCI TV Tuner AD19 (Slave) 2/2 (Slave) PIRQH (Slave)




EC SM Bus1 address EC SM Bus2 address
Power Device Address Power Device Address
+5VL EC KB926 C0 +3VS EC KB926 C0
+5VL Smart Battery 0001 011X b CPU THM Sen .SMSC
3 3
+3VS EMC1402-1-ACZL-TR 1001 100x b
+5VL HDMI-CEC 0011 010x b
+5VL FUN/B (CAP Sensor) +3VS VGA THM Sen. nVedia 1001 1110 b




ICH9M SM Bus address
Power Device Address
+3V_SB ICH9M

Clock Generator 1101 001Xb
+3VS (SLG8SP556V)
+3VS DDR DIMM0 1001 000Xb
+3VS DDR DIMM1 1001 010Xb
+3VS Express

4 FM Module 4
+3VS Vertial I2C




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/10/1 Deciphered Date 2009/10/1 Title
SCHEMATICS,M/B A4161
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401562 G
Date: Monday, February 23, 2009 Sheet 3 of 48
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5 4 3 2 1



@ +1.05VS
<7> H_A#[3..16]
JP1A
H_A#3 J4 H1 QC: XDP_BPM2#0
A[3]# ADS# H_ADS# <7>




ADDR GROUP_0
ADDR GROUP_0
H_A#4 L5 E2 R977 @ 51_0402_1%
H_A#5 A[4]# BNR# H_BNR# <7> ES1: DePOP ALL XDP_BPM2#1
L4 A[5]# BPRI# G5 H_BPRI# <7> DVT- Change CPU Debug port.
H_A#6 K5 ES2: POP ALL R979 @ 51_0402_1%
H_A#7 A[6]# XDP_BPM2#2
M3 A[7]# DEFER# H5 H_DEFER# <7> DC: DEPOP ALL
H_A#8 N2 F21 R981 @ 51_0402_1%
H_A#9
H_A#10
J1
N3
A[8]#
A[9]#
DRDY#
DBSY# E1
H_DRDY# <7>
H_DBSY# <7> <5> XDP_BPM2#3
XDP_BPM2#3
R983 @ 51_0402_1%
XDP Connector
H_A#11 A[10]#
P5 A[11]# BR0# F1 H_BR0# <7>
H_A#12 P2 JP3 @
A[12]#




CONTROL
D H_A#13 L2 D20 H_IERR# R1 1 2 49.9_0402_1% +1.05VS XDP_BPM#5 1 2 XDP_BPM#4 D
H_A#14 A[13]# IERR# H_INIT# +1.05VS 1 2 XDP_BPM#3
P4 A[14]# INIT# B3 H_INIT# <21> 3 3 4 4
H_A#15 P1 XDP_BPM#2 5 6
H_A#16 A[15]# XDP_TMS XDP_BPM#1 5 6 XDP_BPM#0
R1 A[16]# LOCK# H4 H_LOCK# <7> 2 1 7 7 8 8
M1 R137 51_0402_1% 9 10 XDP_BPM2#3
<7> H_ADSTB#0 ADSTB[0]# 9 10
C1 H_RESET# XDP_BPM#5 XDP_BPM2#2 11 12
RESET# H_RESET# <7> 11 12
K3 F3 R985 @ 51_0402_1% XDP_BPM2#1 13 14 XDP_BPM2#0
<7> H_REQ#0 REQ[0]# RS[0]# H_RS#0 <7> 13 14
H2 F4 XDP_TDI 1 2 15 16 H_PWRGOOD_R 1 R147 2 H_PWRGOOD <5,21>
<7> H_REQ#1 REQ[1]# RS[1]# H_RS#1 <7> 15 16
K2 G3 R4 51_0402_1% +1.05VS 17 18 XDP_TCK 1K_0402_5%
<7> H_REQ#2 REQ[2]# RS[2]# H_RS#2 <7> 17 18
J3 G2 XDP_TRST# 1 2 <16> CLK_XDP 19 20 CLK_XDP# <16>
<7> H_REQ#3 REQ[3]# TRDY# H_TRDY# <7> 19 20
L1 R6 51_0402_1% 2 1 21 22 H_RESET#_R 1 2 H_RESET#
<7> H_REQ#4 REQ[4]# 21 22
G6 XDP_TCK 1 2 C155 0.1U_0402_16V4Z XDP_DBRESET# 23 24 XDP_TDO R78 1K_0402_5%
<7> H_A#[17..35] HIT# H_HIT# <7> 23 24
H_A#17 Y2 E4 R136 51_0402_1% XDP_TRST# 25 26 XDP_TDI
A[17]# HITM# H_HITM# <7> 25 26
H_A#18 U5 XDP_TMS 27 28 XDP_PRE#
H_A#19 R3 A[18]# XDP_BPM#0 27 28
A[19]# BPM[0]# AD4 Place close to CPU within 200ps = 1000 mil 29 29 30 30
ADDR GROUP_1

H_A#20 W6 AD3 XDP_BPM#1
H_A#21 U4 A[20]# BPM[1]# XDP_BPM#2
A[21]# BPM[2]# AD1 31 GND GND 32
H_A#22 Y5 AC4 XDP_BPM#3 33 34
A[22]# BPM[3]# GND GND
XDP/ITP SIGNALS

H_A#23 U1 AC2 XDP_BPM#4
H_A#24 R4 A[23]# PRDY# XDP_BPM#5 P-TWO_196027-30041
A[24]# PREQ# AC1
H_A#25 T5 AC5 XDP_TCK
H_A#26 T3 A[25]# TCK XDP_TDI +1.05VS
A[26]# TDI AA6 Pull-High for ITP.
H_A#27 W2 AB3 XDP_TDO
H_A#28 W5 A[27]# TDO XDP_TMS H_RESET#
A[28]# TMS AB5 1 2
H_A#29 Y4 AB6 XDP_TRST# R5 @ 49.9_0402_1%
H_A#30 U2 A[29]# TRST# XDP_DBRESET#
A[30]# DBR# C20 XDP_DBRESET# <22>
H_A#31 V4 PROCHOT# PU: 68Ohm near CPU and MVP6.
H_A#32 W3 A[31]#
H_A#33 AA4 A[32]# 56Ohm near CPU
A[33]# THERMAL
C H_A#34 AB2 +1.05VS 1 2 C
H_A#35 AA3 A[34]# H_PROCHOT# R7 @ 56_0402_5%
A[35]# PROCHOT# D21
V1 A24 H_THERMDA 1 2 +1.05VS
<7> H_ADSTB#1 ADSTB[1]# THERMDA
B25 H_THERMDC R8 68_0402_5%
THERMDC




2
B
H_A20M# A6 Q1 @ 1 2 XDP_TDO
<21> H_A20M# A20M#
ICH
ICH




H_FERR# A5 C7 MMBT3904_NL_SOT23-3 R138 51_0402_1%
<21> H_FERR# FERR# THERMTRIP# H_THERMTRIP# <8,21>




E
H_IGNNE# C4 H_PROCHOT# 3 1 2 1 XDP_PRE#
<21> H_IGNNE# IGNNE# OCP# <22>




C
R18 10K_0402_5%
H_STPCLK# D5 H_THERMDA, H_THERMDC routing together, Place close to JITP within 200ps = 1000 mil
<21> H_STPCLK# STPCLK#
H_INTR C6 H CLK
<21> H_INTR LINT0 Trace width / Spacing = 10 / 10 mil
H_NMI B4 A22
<21> H_NMI LINT1 BCLK[0] CLK_CPU_BCLK <16>
H_SMI# A3 A21
<21> H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# <16>
XDP_BPM2#1 M4 +1.05VS +3VS
XDP_BPM2#0 N5
RSVD[01]
RSVD[02]
Quad Core support circuit
THRMDA_2 T2 EVT2- Change U1, thermal sensor source from ADI to SMSC
RSVD[03]




1
THRMDC_2 V3 1
RSVD[04]
RESERVED




XDP_BPM2#2 B2 +3VALW
RSVD[05] R942 @ C1 U1
D2 RSVD[06]
+CPU_GTLREF2 D22 1K_0402_1% 0.1U_0402_16V4Z
RSVD[07]




1
TDO_M +3VALW 2
D3 RSVD[08] 2
TDI_M F6 +CPU_GTLREF2 R943 @ 1 8
RSVD[09] VDD SMCLK EC_SMB_CK2 <17,32>
100K_0402_5%
1




1
QC: POP H_THERMDA 2 7
1
D