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A B C D E
1
F80Q SCHEMATIC Revision 2.00 1
PAGE Content PAGE Content
SYSTEM PAGE REF.
47 DC & BAT IN
4 CPU-Penryn(1) 48 History(1)
5 CPU-Penryn(2) 49 History(2)
6 CPU CAP, Thermal Senor
7 CLOCK GEN._ICS9LPR363CGLF
8 NB_-960GL (1)--CPU
9 NB_-960GL (2)--DDR2/PEG POWER PAGE REF.
10 NB_-960GL (3)--DDR2 bus
2 11 NB_-960GL (4)--POWER 80_POWER_VCORE 2
12 NB_-960GL (5)--POWER 81_POWER_SYSTEM
13 NB_-960GL (6)--GND/Strapping 82_POWER_I/O_1.5VS & 1.05VS
14 DDR2 SO-DIMM_0 83_POWER_I/O_DDR & VTT
15 DDR2 SO-DIMM_1 84_POWER_I/O_ +2.5VS
16 DDR2 ADDRESS TERMINATION 85_POWER_VGA_CORE & +1.25VO
17 LVDS & INVERTER CONN 86_POWER_+VCCFGX
18 CRT conn. 87_POWER_SHUTDOWN#
19 MDC,HDMI conn. 88_POWER_CHARGER
20 PCI-E--MINI CARD--(1)_WLAN 89_POWER_PIC(Empty)
21 B/T,F/P,T/P& TPM 90_POWER_PROTECT
22 B TO B CONN(M) 91_POWER_LOAD SWITCH
3 23 HDD & CD-ROM CONN 92_POWER_PROTECT 3
24 USB PORT 93_POWER_SIGNAL
25 SB_-ICH8M--(1)-CPU,IDE,AUDIO 94_POWER_FLOWCHART
26 SB_-ICH8M--(2)-PCI,PCI-E,USB
27 SB_-ICH8M--(3)-GPIO
28 SB_-ICH8M--(4)-PWR/GND
29 PCI-E--LAN_RTL8101E
30 TRANSFORMER
31 ROBSON
32 EMPTY
33 NEWCARD
34 EC-IT8752
4
35 ISA ROM & KB 4
36 CARD READER_AU6371
37 DISCHARGE
38 Instant Key
39 LEDs
40 AZALIA-ALC662
41 AUDIO-AMPLIFIER
42 MICROPHONE
43 EMPTY
44 EMPTY
45 EMPTY
46 SREW HOLE
5 5
Title : PAGE REF.
ASUSTeK COMPUTER INC Engineer: CH Lin
Size Project Name Rev
Custom F80L 2.00
Date: Friday, May 23, 2008 Sheet 1 of 59
A B C D E
A B C D E
F80Q BLOCK DIAGRAM
BATTERY Internal IO CON with Cable for MB
1 TYPE 1
TP CON MDC CON BT CON INVERTER LVDS
3S1P
CON CON
3S2P
SPEAKER INT. MIC CON
Penryn CPU
2
P.04~P.05 .... CAP P.06
POWER
SEQENCE
RESET SM_BUS
2
HOST BUS
LVDS & INV
FSB 667 MHz
CON
P.17 DDR2 667/800 SODIMM X2 DCIN
DDR2 SDRAM 667/800MHz DDR RTC
CRT CON NOTHBRIDGE
P.18 CANTIGA +1.8V
+0.9VS
.... CAP/RES
P.16
FAN
CON.
P.14~P.15
P.08~P.13 Part Number: 02G010022500
Part Name & Spec:C.S 88CTPM (B2) INTEL PM45 QT78 897258 QS THERMAL
SENSOR
3 DMI Interface (MAX6657) P.06
3
USB x4
P.24 PCI EXPRESS X1
USB2.0
SATA BUS ICH9-M Part Number: 02G010015340
B/T SATA BUS Part Name & Spec:C.S ICH9M (A3) INTEL QT09 895652
P.21 ACZ
P.25~P.28 MDC
ODD CON LAN 10/100 MINI CARD NEWCARD MINI CARD
Camera Slave SATA HDD RTL8101E WLAN Robson
P.23 P.31
P.17 P.23 P.29 P.20 P.33
4
LPC, 33MHz 4
TPM
F/P Connector RJ11,RJ45
P.21 CON P.30
P.21 AC & BAT CON
EC MIC_IN
ITE8512
4 IN 1 CON AU6371 P.47
P.34
P.36 P.36
HP
Azalia
ALC660
P.40
SPI INTERNAL
ROM KEYBOARD CLOCK GEN.
5 8M P.34 P.35 ICS9LPR363DGLF-T 5
Title : BLOCK DIAGRAM
AUDIO AMP ASUSTeK COMPUTER INC Engineer: Xinghua_Chen
P.07
TPA6017 Size Project Name Rev
P.41 Custom F80Q 2.00
Date: Friday, May 23, 2008 Sheet 2 of 59
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A B C D E
EC-IT8752 GPIO SETTING
Pin Pin Name Signal Name Type Pin Pin Name Signal Name Type
28 PWM0/GPA0 PWR_LED_UP# O
29 PWM1/GPA1 CHG_LED_UP#
1 32 PWM2/GPA2 BATSEL_3S# 1
34 PWM4/GPA4 LCD_BL_PWM O
35 PWM5/GPA5 FAN_PWM O
75 GPI1 VSUS_GD I
76 GPI2 ALL_SYS_PWRGD SM_BUS ADDRESS :
77 GPI3 CPUPWR_GD O SM-Bus Device SM-Bus Address
122 RXD/GPB0 CHG_EN# O Clock Generator 1101001x ( D2 )
123 TXD/GPB1 PRECHG O SO-DIMM 0 1010000x ( A0 )
126 GPB7 PM_RSMRST# O SO-DIMM 1 1010001x ( A2 )
64 GPC3 PM_PWRBTN# O Thermal Sensor( MAX6657) 1001100x ( 98 )
136 TMRI0/WUI2/GPC4 AC_IN_OC# I
65 GPC5 OP_SD# O
2 140 TMRI1/WUI3/GPC6 BAT1_IN_OC# I 2
20 CK32KOUT/GPC7 RF_ON_SW# I
22 RI1#/WUI0/GPD0 PWRLIMIT#
25 RI2#/WUI1/GPD1 PM_SUSC# O ICH8M_GPIO
37 GINT/GPD5 LCD_BACKOFF# O
53 TACH0/GPD6 FAN0_TACH O
Pin. Default _ RST# Use As Signal Name Power Mux Pin Default _ RST#
Use As Signal Name Power Mux
GPIO 00 i GPI PM_BMBUSY# +3VS BM_BUSY# GPIO 39 i GPI PCB_ID2 +3VS SDATAOUT0
23 ADC4/GPE0 VSUS_ON O
GPIO 01 i 0 GPI BT_DET# +3VS TACH1 GPIO [40:43]Nat. Native USB_OC[4:1]# +3VSUS OC[4:1]#
94 ADC5/GPE1 SUSC_EC# O
95 ADC6/GPE2 SUSB_EC1# I
GPIO [5:2] i H-Z GPI PCI_INT[H:E]# +3VS PIRQ[H:E]# GPIO [47:44]n/a N/A N/A N/A No implement
GPIO 06 i 0 GPO BIOS_REC_?_(TP) +3VS TACH2 GPIO 48 i 1 Native +3VS SDATAOUT1
96 ADC7/GPE3 CPU_VRON O
GPIO 07 i 0 GPO 802_LED_EN +3VS TACH3 GPIO 49 Nat. Native H_PWRGD +VCORE CPUPWRGD
141 PWRSW/GPE4 PWR_SW# I
GPIO 08 i GPI EXTSMI# +3VSUS N/A GPIO 50 Nat. Native PCI_REQ1# +5VS REQ1#
39 WUI5/GPE5 BAT2_IN_OC# I
21 LPCPD#/WUI6/GPE6 LID_EC# I
GPIO 09 i H-Z GPO LAN_WOL_EN_?_(TP) +3VSUS WOL_EN GPIO 51 Nat.1 Native PCI_GNT1# +3VS GNT1#
i H-Z GPO ALERT# REQ2#
3 3
121 GPG1 PM_SUSB# I
GPIO 10 RST#_NEWCARD +3VSUS GPIO 52 Nat. Native PCI_REQ2# +5VS
105 GPH0 PM_CLKRUN#
GPIO 11 Nat.H-Z Native SMB_ALERT# +3VSUS SMBALERT# GPIO 53 Nat.1 Native PCI_GNT2# +3VS GNT2#
GPIO 12 i GPI KBC_SCI# +3VSUS GLAN_DOCK# GPIO 54 Nat. Native PCI_REQ3# +5VS REQ3#
108 GPH3 BAT_LEARN O
GPIO 13 Nat. GPI N/A +3VSUS ENERGY_DETECT GPIO 55 Nat.1 Native PCI_GNT3# +3VS GNT3#
110 GPH5 NUM_LED# O
111 GPH6 CAP_LED# O
GPIO 14 i H-Z GPI N/A +3VSUS NETDETECT
GPIO 15 Nat.1 Native STP_PCI# +3VSUS STP_PCI# , No-GPIO, in Mobile
99 PS2CLK1/GPF2 MARATHON# I
GPIO 16 Nat.0 Native PM_DPRSLPVR +3VS DPRSLPVR
101 PS2CLK2/GPF4 TP_CLK O
GPIO 17 i 1 GPO WLAN_ON# +3VS TACH0
102 PS2DAT2/GPF5 TP_DAT I/0
124 SMCLK0/GPB3 SMB0_CLK O
GPIO 18 O freq GPO N/A +3VS N/A
1K
GPIO 19 i GPO CPU_SELECT +3VS SATA1GP
125 SMDAT0GPB4 SMB0_DAT I/O
GPIO 20 O 1 GPO BT_LED_EN +3VS N/A
129 SMCLK1/GPC1 SMB1_CLK I
GPIO 21 i GPI CPPE#_DET +3VS SATA0GP
130 SMDAT1/GPC2 SMB1_DAT I/O
4
GPIO 22 i GPI N/A +3VS SCLOCK 4
131 GPF6 THRO_CPU O
GPIO 23 Nat. Native N/A +3VS LDRQ1#
84 GPJ0 EC_CLK_EN O
85 GPJ1 ICH8_PWROK O
GPIO 24 O H-Z GPO MSK_PCIRST +3VSUS CLGPIO0(MEM_LED), Not Cleared by CF9h RST event.
GPIO 25 Nat.1 Native STP_CPU# +3VS STP_CPU# , No-GPIO, in Mobile
87 GPJ3 BATSEL_2P# O
GPIO 26 Nat. GPO CPPE_EN +3VSUS S4_STATE#
26 GPD2 PLT_RST_BUF# I
GPIO 27 O 0 GPO BT_ON# +3VSUS QRT_STATE0
27 GPD3 EXT_SCI# O
GPIO 28 O 0 GPO CB_SD#_?_(TP) +3VSUS QRT_STATE1
19 GPD4 EXTSMI# O
GPIO 29 Nat. Native USB_OC#5 +3VSUS OC5#
142 GPB5 A20GATE O
GPIO 30 Nat. Native USB_OC#6 +3VSUS OC6#
4 GPB6 RCIN# O
GPIO 31 Nat. Native USB_OC#7 +3VSUS OC7#
GPIO 32 O 0 Native PM_CLKRUN# +3VS CLKRUN# , No-GPIO, in Mobile
GPIO 33 O 1 GPO N/A +3VS HDA_DOCK_EN#
5 GPIO 34 O 0 GPO N/A +3VS HDA_DOCK_RST# 5
GPIO 35 O 0 GPO SATACLKREQ#_?_(TP) +3VS SATACLKREQ#
GPIO 36 i GPO EMAIL_LED#_?_(TP) +3VS SATA2GP Title : Schematic Info.
GPIO 37 i 0 GPI PCB_ID0 +3VS SATA3GP ASUSTeK COMPUTER INC Engineer: CH Lin
GPIO 38 i GPI PCB_ID1 +3VS SLOAD Size Project Name Rev
Custom F80L 2.00
Date: Friday, May 23, 2008 Sheet 3 of 59
A B C D E
5 4 3 2 1
+VCCP
1
R0402
68Ohm
VRTT [58]
11
act as input
2
G
PWRLMT# 3 2
3
S 2
D
H_D#[63:0]
[8] H_D#[63:0]
@
D T0419 Q402 D
3
T0420 3 2N7002
D
GND
1
Q0401
1
11
2N7002 THRO_CPU [34]
G
S 2
2
[8] H_A#[16:3]
U0401A U0401B
H_A#3 J4 H1 H_D#0 E22 Y22 H_D#32
A[3]# ADS# H_ADS# [8] D[0]# D[32]#
ADDR GROUP 0
ADDR GROUP 0
H_A#4 L5 E2 H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# [8] D[1]# D[33]#
H_A#5 L4 G5 GND H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# [8] D[2]# D[34]#
H_A#6 K5 H_D#3 G22 V26 H_D#35
A[6]# D[3]# D[35]#
DATA GRP 0
H_A#7 M3 H5 H_D#4 F23 V23 H_D#36
A[7]# DEFER# H_DEFER# [8] D[4]# D[36]#
H_A#8 N2 F21 H_D#5 G25 T22 H_D#37
A[8]# DRDY# H_DRDY# [8] D[5]# D[37]#
H_A#9 J1 E1 H_D#6 E25 U25 H_D#38
A[9]# DBSY# H_DBSY# [8] D[6]# D[38]#
H_A#10 N3 H_D#7 E23 U23 H_D#39
H_A#11 A[10]# H_D#8 D[7]# D[39]# H_D#40
P5 A[11]# BR0# F1 H_BREQ#0 [8] K24 D[8]# D[40]# Y25
DATA GRP 2
H_A#12 P2 +VCCP H_D#9 G24 W22 H_D#41
A[12]# D[9]# D[41]#
CONTROL
H_A#13 L2 D20 H_IERR# R0401 56Ohm H_D#10 J24 Y23 H_D#42
H_A#14 A[13]# IERR# H_D#11 D[10]# D[42]# H_D#43
P4 A[14]# INIT# B3 H_INIT# [25] J23 D[11]# D[43]# W24
H_A#15 P1 H_D#12 H22 W25 H_D#44
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
R1 A[16]# LOCK# H4 H_LOCK# [8] F26 D[13]# D[45]# AA23
M1 H_D#14 K22 AA24 H_D#46
[8] H_ADSTB#0 ADSTB[0]# D[14]# D[46]#
[8] H_REQ#[4:0] C1 H_D#15 H23 AB25 H_D#47
RESET# H_CPURST# [8] D[15]# D[47]#
H_REQ#0 K3 F3 H_RS#0 J26 Y26
REQ[0]# RS[0]# H_RS#0 [8] [8] H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 [8]
H_REQ#1 H2 F4 H_RS#1 H26 AA26
REQ[1]# RS[1]# H_RS#1 [8] [8] H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 [8]
H_REQ#2 K2 G3 H_RS#2 H25 U22
REQ[2]# RS[2]# H_RS#2 [8] [8] H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 [8]
H_REQ#3 J3 G2
REQ[3]# TRDY# H_TRDY# [8]
C H_REQ#4 L1 C
REQ[4]# H_D#16 H_D#48
[8] H_A#[35:17] HIT# G6 H_HIT# [8] N22 D[16]# D[48]# AE24
H_A#17 Y2 E4 H_D#17 K25 AD24 H_D#49
A[17]# HITM# H_HITM# [8] D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AA21 H_D#50
H_A#19 A[18]# XDP_BPM#0 T0424 H_D#19 D[18]# D[50]# H_D#51
R3 A[19]# BPM[0]# AD4 1 R23 D[19]# D[51]# AB22
ADDR GROUP 1
ADDR GROUP 1
H_A#20 W6 AD3 XDP_BPM#1 H_D#20 L23 AB21 H_D#52
A[20]# BPM[1]# D[20]# D[52]#
DATA GRP 1
H_A#21 U4 AD1 XDP_BPM#2 1 T0425 H_D#21 M24 AC26 H_D#53
A[21]# BPM[2]# D[21]# D[53]#
XDP/ITP SIGNALS
H_A#22 Y5 AC4 XDP_BPM#3 1 T0426 H_D#22 L22 AD20 H_D#54
H_A#23 A[22]# BPM[3]# H_PRDY# T0427 H_D#23 D[22]# D[54]# H_D#55
U1 A[23]# PRDY# AC2 1 M23 D[23]# D[55]# AE22
H_A#24 R4 AC1 H_PREQ# H_D#24 P25 AF23 H_D#56
H_A#25 A[24]# PREQ# H_TCK H_D#25 D[24]# D[56]# H_D#57
T5 A[25]# TCK AC5 P23 D[25]# D[57]# AC25
H_A#26 T3 AA6 H_TDI H_D#26 P22 AE21 H_D#58
DATA GRP 3
H_A#27 A[26]# TDI H_TDO +VCCP H_D#27 D[26]# D[58]# H_D#59
W2 A[27]# TDO AB3 1 T24 D[27]# D[59]# AD21
H_A#28 W5 AB5 H_TMS T0429 H_D#28 R24 AC22 H_D#60
H_A#29 A[28]# TMS H_TRST# H_D#29 D[28]# D[60]# H_D#61
Y4 A[29]# TRST# AB6 L25 D[29]# D[61]# AD23
2
H_A#30 U2 C20 H_DBR# 1 H_D#30 T25 AF22 H_D#62 Comp0,2 connect with Zo=27.4 ohm,
H_A#31 A[30]# DBR# T0428 R0407 H_D#31 D[30]# D[62]# H_D#63 make trace length shorter than 0.5".
V4 A[31]# N25 D[31]# D[63]# AC23
H_A#32 W3 1KOhm L26 AE25 Comp 1,3 connect with Z0=55 ohm,
A[32]# [8] H_DSTBN#1 DSTBN[1]# DSTBN[3]# H_DSTBN#3 [8]
H_A#33 AA4 THERMAL 1% M26 AF24 make trace length shorter than 0.5".
A[33]# [8] H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 [8]
H_A#34 AB2 N24 AC20
[8] H_DINV#1 H_DINV#3 [8]
1
H_A#35 A[34]# DINV[1]# DINV[3]#
AA3 A[35]# PROCHOT# D21 PWRLMT#
V1 A24 GTL_REF AD26 R26 H_COMP0 R0403 1 2 27.4Ohm 1%
[8] H_ADSTB#1 ADSTB[1]# THRMDA CPU_THERM_DA [6] GTLREF COMP[0]
T0421 1 B25 R0415 2 @ 1% 1 1KOhm C23 MISC U26 H_COMP1 R0404 1 2 54.9Ohm 1%
THRMDC CPU_THERM_DC [6] TEST1 COMP[1]
2
A6 R0416 2 @ 1% 1 1KOhm D25 AA1 H_COMP2 R0405 1 2 27.4Ohm 1%
[25] H_A20M# A20M# TEST2 COMP[2]
1
ICH
A5 C7 R0408 T0406 1 C24 Y1 H_COMP3 R0406 1