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1
MS-6394 100
Single Intel PGA 370 Processor (Cu , Cu-T & Tualatin)
ServerWorks LC-T + CSB5 Chipset
National Semiconductor PC97417 LPC IO Chip
Cover Sheet 1 DOM Connector 33
Block Diagram 2 NS PC87417 34,35
Clock Map 3 COM2 / KB /MS 36
370PGA Socket 4,5 WINBOND 82W782 37
AGTL Termination 6 Interrupt Mapping Ckt 39
Level Shift Ckt. 7 VRM 8.5 40
A
Ratio Setup 8 Regulators 41,42 A
LC -- HOST/Memory/PCI 9,10,11 VRM Decoupling 43
DIMM 1/2 12,13 Reset Control 44
Clock Gen. 1/2 14,15 Debug LED 45
CSB5 -- PCI/Other 16,17 Front Panel 46
PCI32 Slot 1/2 18 GPIO SPEC 47,48,49
PCI64 Slot 19
USB Connector 20
Flash ROM /XAD Bus 21
IDE Connector 22
VGA --ATI Rage XL 23,24,25,26
LAN 1 --82550 / RJ45 27,28
LAN 2 --82550 / RJ45 29,30
Promise IDE 31,32
Micro Star Restricted Secret
Title Rev
Cover Sheet
Document Number 100
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
Tuesday, September 10, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 1 of 50
1
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BLOCK DIAGRAM
MS6394 Block Diagram
VRM1 Scoket 370 CPU1
ADDR
CTRL
DATA
GTL BUS Term. GTL+ Bus Termination (Option)
ADDR
CTRL
DATA
P64 PCI CONN 1
PCI 66MHz/64Bit Bus
2 DIMM
DRAM Interface Support 100/133MHz
Modules Up to 2GB SDRAM Support
LC-T
SM BUS
Primary PCI Bus
Up to 6 PCI Master Support
33MHz/32Bit Support
DOM
Primary PCI Bus (Alwasy set to 33MHz/32Bit)
IDE Primary
Ultra DMA66
P32 PCI CONN 2
P32 PCI CONN 1
IDE Secondary Promise IDE Intel 82550 Intel 82550 ATI
VGA Conn.
OSB5
PCI LAN Chip PCI LAN Chip RageXL
USB Port 1/2
USB 1.1
A USB Port 3/4 A
W83782D HWM SM BUS
IDE Primary
LPC
IDE Secondary
XAD Bus FLASH ROM
LPC
LPC
NS
PC97417
Floopy Keyboard Serial 1 Parallel
Mouse Serial 2
Micro Star Restricted Secret
Title Rev
Block Diagram
Document Number 100
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
Tuesday, September 10, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 2 of 50
1
1
MS6394 Clock Map
CNBCLK 100/[email protected]
CNBPCI66 [email protected]
CPU1HCLK 100/[email protected]
To CPU1 Clock
CNBPCI33 [email protected]
LC-T
CNBCLK 100/[email protected]
To LC-T
S_SDRAMCLK 100/[email protected] RDCLK 100/[email protected] SDFBCLK
To IDT2510C
CNBPCI33 [email protected] SDFBIN
To LC-T
P64CLKFB 66/[email protected]
OSBPCLK [email protected]
To CSB5
LAN1PCLK [email protected]
To LAN1
LAN2PCLK [email protected]
To LAN2
ICS PCLK_BUF [email protected]
To ICS9112BM-17
932S200 CNBPCI66 [email protected]
To LC-T OSBPCLK [email protected]
14.318MHz 14.318MHz
X'TAL
OSC [email protected]
Clock Generator
OSC [email protected]
CSB5
To CSB5 APICCLK [email protected]
HWM_14.318M [email protected]
W83782D HWM USBCLK [email protected]
C1APICCLK [email protected]
To CPU1
APICCLK [email protected]
To CSB5
USBCLK [email protected]
To CSB5
LAN1PCLK [email protected]
Intel
SIOCLK48M [email protected]
To PC97417
25MHz X'TAL
14.318MHz
82550
A A
SDRAMCLK0 100/[email protected]
To DIMM 1
IDT
From Clock Generator SDRAMCLK1 100/[email protected] LAN2PCLK [email protected]
Intel
ICS932S200 To DIMM 2
2510C
S_SDRAMCLK 100/[email protected] FB
82550
FBB
Zero-Delay Buffer 14.318MHz
25MHz X'TAL
RDCLK 100/[email protected]
Feedback to LC-T
P64CLK1 66/[email protected]
To P64 PCI Slot 1
From LC-T
P64Clk 66/[email protected]
W163
Zero-Delay Buffer
P64CLKFB 66/[email protected]
Feedback to LC-T
PCICLK_IRQ1 [email protected]
To Interrupt Mapping Ckt
PCICLK_IRQ2 [email protected]
To Interrupt Mapping Ckt
ICS 9112
From ICS932S200 LPC_CLK_SIO [email protected]
To PC97417
PCLK_BUF [email protected]
PCICLK1 [email protected]
To P32 PCI Slot 1
Zero-Delay Buffer PCICLK2 [email protected]
To P32 PCI Slot 2
VGAPCLK [email protected]
To ATI Rage/XL PCI VGA
ATAPCLK [email protected]
To Promise IDE Micro Star Restricted Secret
Title Rev
Block Diagram
Document Number 100
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
Tuesday, September 10, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 3 of 50
1
8 7 6 5 4 3 2 1
370PGA Socket Part 1 VCOREA
HD#[63..0]
6,9 HD#[63..0]
AM12
AM16
AM20
AM24
AM28
AM32
D D
AH32
AK34
CPU1A
AJ13
AJ17
AJ21
AJ25
AJ29
AM4
AM8
AK2
AB2
AE5
AA5
AF2
D20
D24
D28
R32
B26
B10
E13
B14
E17
B18
B30
V32
AJ5
AJ9
F22
F26
F30
Z32
W5
C3
N5
D6
PGA-D370-B
P2
K2
E5
S5
B6
E9
T2
F4
F2
J5
HA#[31..3]
HA#[31..3] 6,9
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
AK8 HA#3
HD#0 HA#3 HA#4
W1 HD#0 HA#4 AH12
HD#1 T4 AH8 HA#5
HD#2 HD#1 HA#5 HA#6
N1 HD#2 HA#6 AN9
HD#3 M6 AL15 HA#7
HD#4 HD#3 HA#7 HA#8
U1 HD#4 HA#8 AH10
HD#5 S3 AL9 HA#9
HD#6 HD#5 HA#9 HA#10
T6 HD#6 HA#10 AH6
HD#7 J1 AK10 HA#11
HD#8 HD#7 HA#11 HA#12
S1 HD#8 HA#12 AN5
HD#9 P6 AL7 HA#13
HD#10 HD#9 HA#13 HA#14
Q3 HD#10 HA#14 AK14
HD#11 M4 AL5 HA#15
HD#12 HD#11 HA#15 HA#16
Q1 HD#12 HA#16 AN7
HD#13 L1 AE1 HA#17
HD#14 HD#13 HA#17 HA#18
N3 HD#14 HA#18 Z6
HD#15 U3 AG3 HA#19
HD#16 HD#15 HA#19 HA#20
H4 HD#16 HA#20 AC3
HD#17 R4 AJ1 HA#21
HD#18 HD#17 HA#21 HA#22
C P4 HD#18 HA#22 AE3 C
HD#19 H6 AB6 HA#23
HD#20 HD#19 HA#23 HA#24
L3 HD#20 HA#24 AB4
HD#21 G1 AF6 HA#25
HD#22 HD#21 HA#25 HA#26
F8 HD#22 HA#26 Y3
HD#23 G3 AA1 HA#27
HD#24 HD#23 HA#27 HA#28
K6 HD#24 HA#28 AK6
HD#25 E3 Z4 HA#29
HD#26 HD#25 HA#29 HA#30
E1 HD#26 HA#30 AA3
370-Pin Socket
HD#27 F12 AD4 HA#31
HD#28 HD#27 HA#31
A5 HD#28 HA#32/RESVD X6
HD#29 A3 AC1
HD#30 HD#29 HA#33/RESVD
J3 HD#30 HA#34/RESVD W3
HD#31 C5 AF4 C1_VID[4..0]
HD#31 HA#35/RESVD C1_VID[4..0] 5,38,40
Part 1
HD#32 F6
HD#33 HD#32 C1_VID0
C1 HD#33 VID0 AL35
HD#34 C7 AM36 C1_VID1
HD#35 HD#34 VID1 C1_VID2 RS#[2..0]
B2 HD#35 VID2 AL37 RS#[2..0] 6,9
HD#36 C9 AJ37 C1_VID3
HD#37 HD#36 VID3 RS#0
A9 AH26
HD#38
HD#39
HD#40
D8
D10
HD#37
HD#38
HD#39
Cuppermine-T & Tualatin CPU RS#0
RS#1
RS#2
AH22
AK28
RS#1
RS#2
HREQ#0
HREQ#[4..0]
HREQ#[4..0] 6,9
C15 HD#40 REQ#0 AK18
HD#41 D14 AH16 HREQ#1
HD#42 HD#41 REQ#1 HREQ#2
B D12 HD#42 REQ#2 AH18 B
HD#43 A7 AL19 HREQ#3
HD#44 HD#43 REQ#3 HREQ#4
A11 HD#44 REQ#4 AL17
HD#45 C11
HD#46 HD#45
A21 HD#46
HD#47 A15 AL11
HD#48 HD#47 AP0#RESVD
A17 HD#48 AP1#RESVD AN13
HD#49 C13 AN23
HD#50 HD#49 RP#/RESVD
C25 HD#50 RSP#/RESVD AC37
AM2 pin should be GND in Tualatin CPU HD#51 A13 C33
HD#52 HD#51 DEP0#/RESVD
D16 HD#52 DEP1#/RESVD C31
HD#53 A23 A33
HD#54 HD#53 DEP2#/RESVD
C21 HD#54 DEP3#/RESVD A31
HD#55 C19 E31
HD#56 HD#55 DEP4#/RESVD
C27 HD#56 DEP5#/RESVD C29
VTT HD#57 A19 E29
HD#58 HD#57 DEP6#/RESVD
C23 HD#58 DEP7#/RESVD A29
HD#59 C17 B36
HD#60 HD#59 BINIT#/RESVD
A25 HD#60 AERR#/RESVD AK24
HD#61 A27 V4
HD#62 HD#61 BERR#/RESVD
E25 HD#62
R440 HD#63 F16
D2 GND10
AL3 GND11
AK4 GND12
AG5 GND13
AC5 GND14
Y5 GND15
U5 GND16
Q5 GND17
L5 GND18
G5 GND19
D4 GND20
B4 GND21
AM6 GND22
AJ7 GND23
E7 GND24
B8 GND25
AM10GND26
AJ11 GND27
E11 GND28
B12 GND29
AM14GND30
AJ15 GND31
E15 GND32
B16 GND33
AM18GND34
AJ19 GND35
E19 GND36
F20 GND37
B20 GND38
AM22GND39
AJ23 GND40
D22 GND41
F24 GND42
B24 GND43
AM26GND44
AJ27 GND45
D26 GND46
F28 GND47
B28 GND48
AM30GND49
D30 GND50
HD#63
AM2 GND1
AM34GND2
AH2 GND3
AD2 GND4
Z2 GND5
V2 GND6
M2 GND7
D18 GND8
H2 GND9
56
A A
AM2
Micro Star Restricted Secret
D
Q59 Title Rev
NDS7002A-S-SOT23 370-pin Socket : Part 1
G Document Number 100
5,14 TUAL55
R58 X_0
41 VTTPWRGD
MICRO-STAR INT'L CO.,LTD.
S
Last Revision Date:
Tuesday, September 10, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 4 of 50
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
VCOREA
370PGA Socket Part 2
VTT
Intel Tualatin 1.33GHz (133MhzFSB) :
D
D
Q58 Q57
NDS7002A-S-SOT23 NDS7002A-S-SOT23
VTT TUAL55 G TUAL5# G
VCMOS [email protected]
[email protected]
S
S
RN8
2 1 C1TDO
C1TDI
Vcccmos15=1.5V@250mA
4 3
CMOSREF1
6 5 C1TMS Place 0603 package near CONNECT Vcccmos18=1.8V@1mA
D 8 7 C1TCK VCMOS processor pin. C76
Vcore(state)=-0.080 to +0.040 D
0.1u
330 Isgnt=TBD
VTT GTLREF1 VCOREA
R125 CONNECT
C1PREQ#
330
AD36
AD32
AH24
AH36
AB36
AK12
AK22
AA37
AB34
AF34
CPU1B R470
AD6