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1




Cover Sheet 1
Block Diagram 2
Intel Dothan CPU - Host 3 MS-9623(ROHS) Version 1.2
07/31/2007
Intel Dothan CPU - Power & GND 4-5
CPU:
Intel Alviso - Host & Memory Signals 6-8 Intel Pentium-M Processor/Celeron-M Processor
Intel Alviso - Power & GND 9-10 System Chipset:
Intel ICH6 - PCI & DMI & CPU & IRQ 11 Intel 915GME - GMCH (North Bridge)
Intel ICH6 - LPC & ATA & USB & GPIO & POWER 12-13 Intel ICH6M(South Bridge)
Clock -ICS954310& FWH 14 On Board Chipset:
LPC I/O - W83627DHF 15 Clock Generator - ICS954310
LAN1-Intel 82573L 16 LAN1 -- Intel 82573
LAN2 -- Intel 82573L/82562GZ
LAN2-Intel 82573L/82562GZ 17
LPC Super I/O -- W83627DHF
DDR2 DIMM 1 & 2 18 BIOS -- FWH EEPROM
A
DDR2 Termination Resistors 19 A




Main Memory:
PCI -Express x1 2Port 20
DDR2 * 2 (Max 2GB)
PCI -Express x8 1Port 21
Expansion Slots:
PCI Slot 22 PCI EXPRESS X1 SLOT * 2
AC'97 Codec-ALC662 & ALC888 23 PCI EXPRESS X8 SLOT * 1
PCI2.3 SLOT * 2
NMISwitch/PCIRST/JUMPER 24
SATA&IDEConnectors/TPM 25 Manual Part 33
USB CONNECTORS 26 System Clock Block Diagram 34
ATX ,Front Panel&VGA Conn 27 Power Delivery Block Diagram 35
System Power 28 Power on sequence 36
CPU Power 29 Board Map 37
FAN Connectors 30 History 38
POST LED/Status LED 31 MICRO-START INT'L CO.,LTD.
Title
COVER SHEET
GPIO SETTING 32 HW:MIA CHENG
http://laptop-motherboard-schematic.blogspot.com/ #8871 Size Document Number Rev
MS-9623 1.2
Date: Friday, August 24, 2007 Sheet 1 of 38
1
Intersil
ISL6218CV
Intel Pentium-M(478uFCPGA)
Celeron-M(ULV)(479uFCBGA) Block Diagram
4.3GB/s 533MHz FSB
SDRAM DIMM
2xDDR2-533
(Up to 2GB)
LVDS Intel Non ECC
4.3 GB/s
915GME Unbuffered
Alviso
Integrated Graphic
VGA (UMA-8M) 8 X PCI-E x 1 Slot
PCI-E x8
DMI




2 X PCI Slot
2GB/s
UltraDMA 33/66/100
PCI 32bits / 33Mhz
1 X PATA IDE

SATA 150MB/s
Intel
2 X SATA 1Gb LAN Intel 82573L
ICH6-M PCI-E x1
USB 1Gb LAN Intel 82573L
PCI-E x1 10/100 LAN Intel 82562GZ
8 X USB 2.0
(4 X Real) PCI-E x1
(4 X Internal) 1 X PCI-E x 1 Slot

PCI-E x1
Line-In
AC97 TPM 1 X PCI-E x 1 Slot
Code
Line-Out Realtek Support 3 slots riser card
Mic ALC662 &
ALC888
CD-ROM

LPC Bus

[email protected]/s
LPC SIO
Winbond
83627DHF
W/ HW monitor



FWH


..... PS2 KB 1 X IrDA 2 X Serial Ports MICRO-START INT'L CO.,LTD.
..
.. .... NMI (1 X Real) Title
. . Switch BLOCK DIAGRAM
..
.. .....
..... PS2 Mouse (1 X Internal)
Size Document Number Rev
.. ..... http://laptop-motherboard-schematic.blogspot.com/ MS-9623 1.2
Date: Friday, August 24, 2007 Sheet 2 of 38
5 4 3 2 1




HA#[3..31] HD#[0..63]
6 HA#[3..31] 6 HD#[0..63]
RS#[0..2] HDSTBP#[0..3]
6 RS#[0..2] 6 HDSTBP#[0..3]
HREQ#[0..4] HDSTBN#[0..3]
6 HREQ#[0..4] 6 HDSTBN#[0..3]
DBI#[0..3]
6 DBI#[0..3]

D D
U18B
V_FSB_VTT HD#0 A19 Y26 HD#32
U18A HD#1 #D0 #D32 HD#33
A25 #D1 #D33 AA24
HA#3 P4 N2 H_ADS# HD#2 A22 T25 HD#34
A3# ADS# H_ADS# 6 #D2 #D34
HA#4 U4 L1 H_BNR# HD#3 B21 U23 HD#35
A4# BNR# H_BNR# 6 #D3 #D35
HA#5 V3 J3 H_BPRI# HD#4 A24 V23 HD#36
A5# BPRI# H_BPRI# 6 #D4 #D36




ADDR GROUP 0




DATA GRP 2
HA#6 R3 R267 56_0603 H_IERR# HD#5 B26 R24 HD#37
A6# #D5 #D37




DATA GRP 0
HA#7 V2 L4 H_DEFER# HD#6 A21 R26 HD#38
A7# DEFER# H_DEFER# 6 #D6 #D38
HA#8 W1 H2 H_DRDY# R229 56_0603 H_BPM#5 HD#7 B20 R23 HD#39
A8# DRDY# H_DRDY# 6 #D7 #D39
HA#9 T4 M2 H_DBSY# HD#8 C20 AA23 HD#40
A9# DBSY# H_DBSY# 6 #D8 #D40
HA#10 W2 HD#9 B24 U26 HD#41




CONTROL
HA#11 A10# H_BR#0 HD#10 #D9 #D41 HD#42
Y4 A11# BR0# N4 H_BR#0 6 D24 #D10 #D42 V24
HA#12 Y1 HD#11 E24 U25 HD#43
HA#13 A12# H_IERR# HD#12 #D11 #D43 HD#44
U1 A13# IERR# A4 C26 #D12 #D44 V26
HA#14 AA3 B5 H_INIT# HD#13 B23 Y23 HD#45
A14# INIT# H_INIT# 11 #D13 #D45
HA#15 Y3 HD#14 E23 AA26 HD#46
HA#16 A15# H_LOCK# HD#15 #D14 #D46 HD#47
AA2 A16# LOCK# J2 H_LOCK# 6 C25 #D15 #D47 Y25
HASTB#0 U3 V_FSB_VTT HDSTBN#0 C23 W25 HDSTBN#2
6 HASTB#0 ADSTB#0 HDSTBP#0 DSTBN0# DSTBN2# HDSTBP#2
RESET# B11 H_CPURST# 6 C22 DSTBP0# DSTBP2# W24
HREQ#0 R2 H1 RS#0 DBI#0 D25 T24 DBI#2
HREQ#1 REQ0# RS0# RS#1 DINV0# DINV2#
P3 REQ1# RS1# K1
HREQ#2 T2 L2 RS#2 HD#16 H23 AB25 HD#48
HREQ#3 REQ2# RS2# H_TRDY# H_TMS R218 39.2R_1%_0402 HD#17 #D16 #D48 HD#49
P1 REQ3# TRDY# M3 H_TRDY# 6 G25 #D17 #D49 AC23
HREQ#4 T1 HD#18 L23 AB24 HD#50
REQ4# H_HIT# H_TDI R208 150_1%_0402 HD#19 #D18 #D50 HD#51
HIT# K3 H_HIT# 6 M26 #D19 #D51 AC20
HA#17 AF4 K4 H_HITM# HD#20 H24 AC22 HD#52
A17# HITM# H_HITM# 6 #D20 #D52




DATA GRP 3
HA#18 AC4 HD#21 F25 AC25 HD#53
A18# #D21 #D53




DATA GRP 1
C HA#19 AC7 C8 H_BPM#0 HD#22 G24 AD23 HD#54 C
HA#20 A19# BPM#0 H_BPM#1 HD#23 #D22 #D54 HD#55
AC3 A20# BPM#1 B8 J23 #D23 #D55 AE22
ADDR GROUP 1




HA#21 AD3 A9 H_BPM#2 HD#24 M23 AF23 HD#56
A21# BPM#2 #D24 #D56
ITP SIGNALS




HA#22 AE4 C9 H_BPM#3 H_TCK R203 27.4R1% HD#25 J25 AD24 HD#57
HA#23 A22# BPM#3 H_BPM#4 HD#26 #D25 #D57 HD#58
AD2 A23# PRDY# A10 L26 #D26 #D58 AF20
HA#24 AB4 B10 H_BPM#5 H_TRST# R206 680_0603 HD#27 N24 AE21 HD#59
HA#25 A24# PREQ# H_TCK HD#28 #D27 #D59 HD#60
AC6 A25# TCK A13 M25 #D28 #D60 AD21
HA#26 AD5 C12 H_TDI HD#29 H26 AF25 HD#61
HA#27 A26# TDI H_TDO HD#30 #D29 #D61 HD#62
AE2 A27# TDO A12 N25 #D30 #D62 AF22
HA#28 AD6 C11 H_TMS HD#31 K25 AF26 HD#63 0.5" max length
HA#29 A28# TMS H_TRST# HDSTBN#1 #D31 #D63 HDSTBN#3
AF3 A29# TRST# B13 K24 DSTBN1# DSTBN3# AE24
HA#30 AE1 A7 HDSTBP#1 L24 AE25 HDSTBP#3 25 MIL AWAY FROM HIGH SPEED
HA#31 A30# DBR# TP18 DBI#1 DSTBP1# DSTBP3# DBI#3 SIGNAL
AF1 A31# J26 DINV1# DINV3# AD20
HASTB#1 AE5 B17 H_PROCHOT#
6 HASTB#1 ADSTB#1 PROCHOT# HCOMP0 R170 27.4_1%_0603
B18 E1 P25
THERM




THERMDA CPU_TMPA 15 PSI# COMP0
C2 A18 P26 HCOMP1 R172 54.9_1%_0402
11 H_A20M# A20M# THERMDC VTIN_GND 15 COMP1
D3 CPU_BSEL0 C16 AB2 HCOMP2 R274 27.4_1%_0603
11 H_FERR# FERR# TRMTRIP# 14 CPU_BSEL0 CPU_BSEL1 BSEL0 COMP2 HCOMP3 R277 54.9_1%_0402
11 H_IGNNE# A3 IGNNE# THERMTRIP# C17 TRMTRIP# 7,11 14 CPU_BSEL1 C14 BSEL1 COMP3 AB1

H_STPCLK# C6 ITP_CLK0 V_FSB_VTT H_DPRSTP#
11 H_STPCLK#
D1
STPCLK# ITP_CLK0 A16
A15 ITP_CLK1 TP16 B2
A1
NC1 MISC
DPRSTP# G1
B7 H_DPSLP#
H_DPRSTP# 12
H CLK




11 H_INTR LINT0 ITP_CLK1 TP17 NC2 DPSLP# H_DPSLP# 12
D4 B15 CK_H_CPU C3 C19 H_DPWR#
11,24 H_NMI LINT1 BCLK0 CK_H_CPU 14 RSVD2 DPWR# H_DPWR# 6
B4 B14 CK_H_CPU# R169 AF7 E4 H_PWRGD
11 ICH_H_SMI# SMI# BCLK1 CK_H_CPU# 14 RSVD3 PWRGOOD H_PWRGD 11
AC1 A6 H_SLP#
RSVD [GTLREF3] SLP# H_SLP# 6,11
Dothan_Processor_Skt 1K_1%_0603 E26 RSVD [GTLREF1] R264 X_1K_0603
TEST1 C5
C143 CPU_GTLREF AD26 F23 R173 X_1K_0603
0.1U25V_0603 GTLREF0 TEST2

B
0.5" max Dothan_Processor_Skt B
R168
length
2K_1%_0603 G1: NC for Dothan and
PLACE AT CPU END OF ROUTE DPRSTP# for Yonah
V_FSB_VTT
V_FSB_VTT R216 X_56_0603 H_CPURST#
BSEL1 BSEL0 FREQ
R199 56_0603 H_PROCHOT#

V_FSB_VTT
L H 100 MHz
V_FSB_VTT R272 200R_0402 H_PWRGD ITP NOPOP -
Remove R880, R890, R871, R151, JTAG1 L L 133 MHz

V_FSB_VTT
H L REV
CPU ITP 700FLEX connector TDOITP < 1"
RESETITP < 0.5"
Celeron:A09-1020105-I06 ALL COMPONENTS CLOSE TO ITP V_FSB_VTT
H H REV
R185 JTAG1
Dothan:N12-4790010-L06 54.9_1%_0402
H_TDI
H_TRST#
1 TDI TMS 2
H_TMS Please near R151
3 TRST# NC 4
H_TCK 5 TCK 6 R178
U900 H_TDO R187 22.6_1%_0402 TDOITP NC CK_H_ITP# 220R_0402
7 TDO BCLK# 8
CK_H_ITP 9 BCLK
H_TCK GND 10 RESETITP# R171 22.6_1%_0402
11 FBO RESET# 12 H_CPURST# 6
VCC3_SB
Celeron-M H_BPM#5
H_BPM#4
13 BPM#5
15 BPM#4
GND 14
H_BPM#3 GND 16 CK_H_ITP
17 BPM#3 GND 18 CK_H_ITP 14
R157 H_BPM#2 19 BPM#2 CK_H_ITP#
A
240R_0402 H_BPM#1 GND 20 CK_H_ITP# 14 A
21 BPM#1 GND 22
H_BPM#0 23 BPM#0
ITP_DBR# DBA# 24
12,27 FP_RST# 25 DBR# VTAP 26 VCORE
R158 0R_0402 27 VCC VCC 28
X_I_Molex 52435-2891
MICRO-START INT'L CO.,LTD.
Title
Dothan (Host Bus)
http://laptop-motherboard-schematic.blogspot.com/ Size Document Number Rev
MS-9623 1.2
Date: Friday, August 24, 2007 Sheet 3 of 38
5 4 3 2 1
5 4 3 2 1




VCORE VCORE
U18D U18C
A2 VSS0 VSS97 D13 D6 VCC0 VCC59 AE11
A5 VSS1 VSS98 D15 D8 VCC1 VCC60 AE13
A8 VSS2 VSS99 D17 D18 VCC2 VCC61 AE15
A11 VSS3 VSS100 D19 D20 VCC3 VCC62 AE17
A14 VSS4 VSS101 D21 D22 VCC4 VCC63 AE19
A17 VSS5 VSS102 D23 E5 VCC5 VCC64 AF8
A20 D26 E9 AF10 CPU_VCCA
VSS6 VSS103 VCC6 VCC65
A23 VSS7 VSS104 E3 E17 VCC7 VCC66 AF12
D A26 VSS8 VSS105 E6 E19 VCC8 VCC67 AF14 D
AA1 VSS9 VSS106 E8 E21 VCC9 VCC68 AF16
AA4 VSS10 VSS107 E10 F6 VCC10 VCC69 AF18 0.01uf and 10uf of a pair capacitors
AA6 VSS11 VSS108 E12 F8 VCC11 VCC70 E7
AA8 VSS12 VSS109 E14 F18 VCC12 VCC71 AC19
AA10 VSS13 VSS110 E16 F20 VCC13
AA12 E18 F22 F26 C145 10U6.3V_0805
VSS14 VSS111 VCC14 VCCA0 R177
AA14 VSS15 VSS112 E20 G5 VCC15 VCCA1 B1
AA16 E22 G21 N1 V_FSB_VTT
VSS16 VSS113 VCC16 VCCA2 X_0_0402
AA18 VSS17 VSS114 E25 H6 VCC17 VCCA3 AC26
AA20 VSS18 VSS115 F1 H22 VCC18
AA22 VSS19 VSS116 F4 J5 VCC19 VCCP0 D10
AA25 F5 J21 D12 C144 0.01U25V_0402
VSS20 VSS117 VCC20 VCCP1
AB3 VSS21 VSS118 F7 K22 VCC21 VCCP2 D14
AB5 VSS22 VSS119 F9 U5 VCC22 VCCP3 D16
AB7 VSS23 VSS120 F11 V6 VCC23 VCCP4 E11
AB9 VSS24 VSS121 F13 V22 VCC24 VCCP5 E13
AB11 VSS25 VSS122 F15 W5 VCC25 VCCP6 E15
AB13 VSS26 VSS123 F17 W21 VCC26 VCCP7 F10
AB15 VSS27 VSS124 F19 Y6 VCC27 VCCP8 F12
AB17 VSS28 VSS125 F21 Y22 VCC28 VCCP9 F14
AB19 F24 AA5 F16 C146 0.01U25V_0402
VSS29 VSS126 VCC29 VCCP10
AB21 VSS30 VSS127 G2 AA7 VCC30 VCCP11 K6
AB23 VSS31 VSS128 G6 AA9 VCC31 VCCP12 L21
AB26 VSS32 VSS129 G22 AA11 VCC32 VCCP13 L5
AC2 VSS33 VSS130 G23 AA13 VCC33 VCCP14 M22
AC5 VSS34 VSS131 G26 AA15 VCC34 VCCP15 M6
AC8 VSS35 VSS132 H3 AA17 VCC35 VCCP16 N21
AC10 VSS36 VSS133 H5 AA19 VCC36 VCCP17 N5
C AC12 H21 AA21 P22 C
VSS37 VSS134 VCC37 VCCP18
AC14 VSS38 VSS135 H25 AB6 VCC38 VCCP19 P6
AC16 VSS39 VSS136 J1 AB8 VCC39 VCCP20 R21
AC18 VSS40 VSS137 J4 AB10 VCC40 VCCP21 R5
AC21 J6 AB12 T22 VCC3 VCC3
VSS41 VSS138 VCC41 VCC