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A B C D E




COMPAL CONFIDENTIAL
MODEL NAME : NCL00 NCL10(ATG)
1 1

PCB NO : LA-5471P ( DA80000G710)




2 2




REV : 1.0(A00)


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DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
MB PCB PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
Part Number Description BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Cover Sheet
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
DA80000G700 PCB 0AY LA-5471P REV0 M/B UMA PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
Date: Wednesday, January 20, 2010 Sheet 1 of 57
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A B C D E



Block Diagram
Compal confidential
Model : NCL00


1 1




FDI DMI
Lane x 8 Lane x 4




2 2




page 33


page 33
USB[8,9]
SATA5



Option




3 3




USB[10]




+3.3V_RUN
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DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
Block Diagram
Size Document Number Rev
1.0
LA-5471P
Date: Wednesday, January 20, 2010 Sheet 2 of 57
A B C D E
5 4 3 2 1




POWER STATES USB PORT# DESTINATION
Signal SLP SLP SLP S4 SLP ALWAYS M SUS RUN CLOCKS
State S3# S4# S5# STATE# M# PLANE PLANE PLANE PLANE 0 JUSB1 (Ext Right Side Top)

D
S0 (Full ON) / M0 HIGH HIGH HIGH HIGH HIGH ON ON ON ON ON 1 JUSB1 (Ext Right Side Bottom) D



S3 (Suspend to RAM) / M1 LOW HIGH HIGH HIGH HIGH ON ON ON OFF OFF 2 JESA1 (Ext Left Side Top)

S4 (Suspend to DISK) / M1 LOW LOW HIGH LOW HIGH ON ON OFF OFF OFF 3 JESA1 (Ext Left Side Bottom)

S5 (SOFT OFF) / M1 LOW LOW LOW LOW HIGH ON ON OFF OFF OFF 4 WLAN
PCH
S3 (Suspend to RAM) / M-OFF LOW HIGH HIGH HIGH LOW ON OFF ON OFF OFF 5 WWAN

S4 (Suspend to DISK) / M-OFF LOW LOW HIGH LOW LOW ON OFF OFF OFF OFF 6 Bluetooth

S5 (SOFT OFF) / M-OFF LOW LOW LOW LOW LOW ON OFF OFF OFF OFF 7 USH->BIO

8 DOCKING

C
PM TABLE 9 DOCKING C


+15V_ALW +3.3V_SUS +5V_RUN +3.3V_M +3.3V_M
10 Express card
+5V_ALW +1.5V_MEM +3.3V_RUN +1.05V_M +1.05V_M
+3.3V_ALW_PCH +1.8V_RUN (M-OFF)
power 11 Camera
plane +3.3V_RTC_LDO +1.5V_RUN
+0.75V_DDR_VTT
12 none
+VCC_CORE
+1.05V_RUN_VTT
13 JMINI3(PCIE/BKT CARD)
+1.05V_RUN
State



S0 ON ON ON ON
ON PCI EXPRESS DESTINATION
S3 ON ON OFF ON OFF
Lane 1 MINI CARD-1 WWAN
S5 S4/AC ON OFF OFF ON OFF
B Lane 2 MINI CARD-2 WLAN B



S5 S4/AC don't exist OFF OFF OFF OFF OFF
Lane 3 PCMCIA

Lane 4 EXPRESS CARD

Lane 5 MINI CARD-3 PCIE/BKT

Lane 6 10/100/1G LAN

Lane 7 None

Lane 8 None


A A




DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Index and Config.
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
1.0
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5471P
Date: Wednesday, January 20, 2010 Sheet 3 of 57
5 4 3 2 1
5 4 3 2 1




MODC_EN
HDDC_EN
EN_INVPWR FDC654P
+BL_PWR_SRC
Q17


ADAPTER
D
GFX_VR_ON MAX17028 SI3456BDV SI3456BDV D
+VCC_GFXCORE
(PU801) (Q32) (Q29)




+PWR_SRC
BATTERY +5V_HDD +5V_MOD



ALWON



+15V_ALW
MAX17020
CHARGER +5V_ALW RUN_ON
(PU19)

C C




FDS8878
+3.3V_ALW (Q55)




AUX_EN_WOWL




PCH_ALW_ON




AUX_ON
+5V_RUN




SUS_ON




RUN_ON




M_ON
MAX17030 VT356 TPS51100 ISL8014 NCP5222
(PU20) (PU4) (PU5) (PU301) (PU10) SI3456BDV SI3456BDV S13456 SI3456 NTMS4107 SI3456BDV
(Q47) (Q54) (Q60) (Q2) (Q61) (Q66)
CPU_VTT_ON
0.75V_VR_EN
IMVP_VR_ON




M_ON
DDR_ON




RUN_ON




Pop option
B B




+3.3V_WLAN +3.3V_ALW_PCH +3.3V_SUS +3.3V_LAN +3.3V_RUN +3.3V_M

+VCC_CORE +1.5V_MEM +0.75V_DDR_VTT +1.8V_RUN +1.05V_RUN_VTT +1.05V_M




REGCTL_PNP10
Pop option
RUN_ON




CPU1.5V_S3_GATE RUN_ON

+3.3V_M
DCP69
AO4430 S1S406 FDS8878 (Q45)
(Q200) (Q151) (Q183)
Pop option
+1.05V_M
A A

Pop option
+1.0V_LAN
+1.05V_RUN DELL CONFIDENTIAL/PROPRIETARY
+1.5V_CPU_VDDQ +1.5V_RUN
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Power Rail
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-5471P
Date: Wednesday, January 20, 2010 Sheet 4 of 57
5 4 3 2 1
5 4 3 2 1


2.2K


2.2K
+3.3V_ALW_PCH
H14 MEM_SMBCLK 202

C8 MEM_SMBDATA 200 DIMMA SMBUS Address [TBD]

2.2K
202
PCH
+3.3V_LAN 200 DIMMB
D
2.2K SMBUS Address [TBD] D


C6 LAN_SMBCLK 28
LAN_SMBDATA 31 LOM SMBUS Address [C8]
G8
G12 E10 53
51 XDP1 SMBUS Address [TBD]
2.2K
SML1_SMBDATA
+3.3V_ALW_PCH 2.2K
SML1_SMBCLK 2.2K 53
51 XDP2 2.2K
A5 B6 2.2K +3.3V_ALW SMBUS Address [TBD]

3A 3A B4 127 2.2K
+3.3V_RUN
1A DOCK_SMB_CLK
129 DOCKING 2N7002
A3 DOCK_SMB_DAT 14
1A G Sensor
2.2K SMBUS Address [TBD] 2N7002 13 SMBUS Address [TBD]


2.2K +LCD_VDD

B5 LCD_SMBCLK 17
1B LCD
C A4 18 C
LCD_SMDATA SMBUS Address [TBD]
1B (JeDP1)
2.2K


+3.3V_ALW
2.2K
100 ohm 7
1C A56 PBAT_SMBCLK
6 BATTERY SMBUS Address [TBD]
1C B59 PBAT_SMBDAT 100 ohm
KBC 2.2K
CONN



+3.3V_ALW
2.2K
1E A50 USH_SMBCLK M9
1E B53 USH_SMBDAT L9 USH SMBUS Address [TBD]

2.2K


+3.3V_ALW
B
2.2K B
7
2B A49 CARD_SMBCLK
8 Express card SMBUS Address [TBD]
2B B52 CARD_SMBDAT

MEC 5045 2.2K
+3.3V_ALW
2.2K
B50 CHARGER_SMBCLK 10
1G
A47 CHARGER_SMBDAT 9 Charger
1G SMBUS Address [TBD]




2.2K
+3.3V_RUN 0 ohm 0 ohm
2.2K
B7 CKG_FFS_SMBDAT 31
2D
A7 32 CLK GEN SMBUS Address [TBD]
CKG_FFS_SMBCLK
2D

2.2K
+3.3V_RUN
A 2.2K A
B49 DAI_GPU_R3P_SMBCLK
2A 8
B48 DAI_GPU_R3P_SMBDAT 9
A/D,D/A SMBUS Address [TBD]
2A
converter

Compal Electronics, Inc.
Title
SMBUS TOPOLOGY
Size Document Number Rev
1.0
LA-5471P
Date: Wednesday, January 20, 2010 Sheet 5 of 57
5 4 3 2 1
5 4 3 2 1




+3.3V_RUN

+3.3V_RUN +CK_VDD_MAIN +CLK_VDD_IO
H_STP_CPU# 1 2
D L89 D
R92 10K_0402_5%~D
1 2 +1.05V_RUN 1 2
BLM18AG601SN1D_0603~D L2




10U_0805_10V4Z~D




0.1U_0402_16V4Z~D




0.1U_0402_16V4Z~D




0.1U_0402_16V4Z~D




0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D




0.1U_0402_16V4Z~D




10U_0805_10V4Z~D




0.1U_0402_16V4Z~D




0.1U_0402_16V4Z~D
1 1 1 1 1 1 BLM18AG601SN1D_0603~D CLKREF
1 1 1




C2




C3




C4




C5
C5




C6




C7
1




C8




C10




C9
C9
2 2 2 2 2 2 @C1707
@C1707
2 2 2 10P_0402_50V8J~D
2

EMI


+CLK_VDD_IO CAN BE CHANGE FROM 1.05V TO 3V




+CK_VDD_MAIN


+CLK_VDD_IO
U1


1 VDD_DOT CPU_0 23
5 VDD_27
CPU_0# 22
C C
15 VDDSRC_IO
18 VDDCPU_IO
20 BUF_BCLK 1 2 CLK_BUF_BCLK
CPU_1 CLK_BUF_BCLK <16>
17 R11 0_0402_5%~D
VDDSRC_3.3 BUF_BCLK# CLK_BUF_BCLK#
24 19 1 2 CLK_BUF_BCLK# <16>
VDDCPU_3.3 CPU_1# R13 0_0402_5%~D
29 VDDREF_3.3
10 BUF_CKSSCD 1 2 CLK_BUF_CKSSCD CLK_BUF_CKSSCD <16>
SRC_1/SATA R1181 0_0402_5%~D
11 BUF_CKSSCD# 1 2 CLK_BUF_CKSSCD# CLK_BUF_CKSSCD# <16>
SRC_1/SATA# R1180 0_0402_5%~D

31 13 BUF_DMI 1 2 CLK_BUF_DMI CLK_BUF_DMI <16>
<40> CKG_FFS_SMBDAT SDA SRC_2 R49 0_0402_5%~D
32 14 BUF_DMI# 1 2 CLK_BUF_DMI# CLK_BUF_DMI# <16>
<40> CKG_FFS_SMBCLK SCL SRC_2# R52 0_0402_5%~D

3 DOT96 1 2 CLK_BUF_DOT96
DOT_96 CLK_BUF_DOT96 <16>
H_STP_CPU# 16 R37 0_0402_5%~D
CPU_STOP# DOT96# CLK_BUF_DOT96#
DOT_96# 4 1 2 CLK_BUF_DOT96# <16>
R38 0_0402_5%~D
+3.3V_RUN
CLK_PWRGD 25
X1 CKPWRGD/PD#