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Philips Semiconductors Linear Products
Product specification
Timer
NE/SA/SE555/SE555C
DESCRIPTION
The 555 monolithic timing circuit is a highly stable controller capable of producing accurate time delays, or oscillation. In the time delay mode of operation, the time is precisely controlled by one external resistor and capacitor. For a stable operation as an oscillator, the free running frequency and the duty cycle are both accurately controlled with two external resistors and one capacitor. The circuit may be triggered and reset on falling waveforms, and the output structure can source or sink up to 200mA.
PIN CONFIGURATIONS
D, N, FE Packages
GND 1 TRIGGER 2 OUTPUT 3 RESET 4 8 7 6 5
VCC DISCHARGE THRESHOLD CONTROL VOLTAGE
FEATURES
F Package
GND 1 NC 2 TRIGGER 3 OUTPUT 4 NC 5 RESET 6 NC 7 14 13 12 11 10 9 8 VCC NC DISCHARGE NC THRESHOLD NC CONTROL VOLTAGE
· Turn-off time less than 2µs · Max. operating frequency greater than 500kHz · Timing from microseconds to hours · Operates in both astable and monostable modes · High output current · Adjustable duty cycle · TTL compatible · Temperature stability of 0.005% per °C
APPLICATIONS
TOP VIEW
· Precision timing · Pulse generation · Sequential timing · Time delay generation · Pulse width modulation
ORDERING INFORMATION
DESCRIPTION 8-Pin Plastic Small Outline (SO) Package 8-Pin Plastic Dual In-Line Package (DIP) 8-Pin Plastic Dual In-Line Package (DIP) 8-Pin Plastic Small Outline (SO) Package 8-Pin Hermetic Ceramic Dual In-Line Package (CERDIP) 8-Pin Plastic Dual In-Line Package (DIP) 14-Pin Plastic Dual In-Line Package (DIP) 8-Pin Hermetic Cerdip 14-Pin Ceramic Dual In-Line Package (CERDIP) 14-Pin Ceramic Dual In-Line Package (CERDIP) 14-Pin Ceramic Dual In-Line Package (CERDIP) TEMPERATURE RANGE 0 to +70°C 0 to +70°C -40°C to +85°C -40°C to +85°C -55°C to +125°C -55°C to +125°C -55°C to +125°C -55°C to +125°C 0 to +70°C -55°C to +125°C -55°C to +125°C ORDER CODE NE555D NE555N SA555N SA555D SE555CFE SE555CN SE555N SE555FE NE555F SE555F SE555CF 0581B 0581B 0581B 0404B 0405B DWG # 0174C 0404B 0404B 0174C
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853-0036 13721
Philips Semiconductors Linear Products
Product specification
Timer
NE/SA/SE555/SE555C
BLOCK DIAGRAM
VCC 8
R THRESHOLD 6
CONTROL VOLTAGE 5
COMPARATOR
R TRIGGER COMPARATOR R 2
DISCHARGE 7 FLIP FLOP
RESET 4
OUTPUT STAGE
3 OUTPUT GND
1
EQUIVALENT SCHEMATIC
FM CONTROL VOLTAGE VCC R1 4.7K R2 330 R3 4.7 K R 4 1 K Q9 Q22 Q8 Q19 R13 3.9K R 7 5 K R12 6.8K
Q21 Q5 Q6 Q7
Q1 THRESHOLD Q2 Q3
Q4
R1 0 82. K C CB Q18 E R11 4.7K Q17 Q16
OUTPUT Q23 B
R5 10 K Q10 TRIGGER Q25 RESET DISCHARGE Q14 GND R16 100 R6 100K
Q11 Q12 Q13
R8 5K
Q20 R14 220 Q24 R15 4.7K
Q15 R9 5K
NOTE:
Pin numbers are for 8-Pin package
August 31, 1994
347
Philips Semiconductors Linear Products
Product specification
Timer
NE/SA/SE555/SE555C
ABSOLUTE MAXIMUM RATINGS
SYMBOL Supply voltage VCC PD TA SE555 NE555, SE555C, SA555 Maximum allowable power dissipation1 Operating ambient temperature range NE555 SA555 SE555, SE555C TSTG TSOLD Storage temperature range Lead soldering temperature (10sec max) 0 to +70 -40 to +85 -55 to +125 -65 to +150 +300 °C °C °C °C °C +18 +16 600 V V mW PARAMETER RATING UNIT
NOTES: 1. The junction temperature must be kept below 125°C for the D package and below 150°C for the FE, N and F packages. At ambient temperatures above 25°C, where this limit would be derated by the following factors: D package 160°C/W FE package 150°C/W N package 100°C/W F package 105°C/W
August 31, 1994
348
Philips Semiconductors Linear Products
Product specification
Timer
NE/SA/SE555/SE555C
DC AND AC ELECTRICAL CHARACTERISTICS
TA = 25°C, VCC = +5V to +15 unless otherwise specified. SYMBOL VCC ICC PARAMETER Supply voltage Supply current (low state)1 Timing error (monostable) tM tM/T tM/VS tA tA/T tA/VS VC Initial accuracy2 Drift with temperature Drift with supply voltage Timing error (astable) Initial accuracy2 Drift with temperature Drift with supply voltage Control voltage level VCC=15V VCC=5V VCC=15V VTH ITH VTRIG ITRIG VRESET IRESET Threshold voltage VCC=5V Threshold current3 Trigger voltage Trigger current Reset voltage4 Reset current Reset current VCC=15V VCC=5V VTRIG=0V VCC=15V, VTH =10.5V VRESET=0.4V VRESET=0V VCC=15V ISINK=10mA ISINK=50mA VOL Output voltage (low) ISINK=100mA ISINK=200mA VCC=5V ISINK=8mA ISINK=5mA VCC=15V ISOURCE=200mA VOH Output voltage (high) ISOURCE=100mA VCC=5V ISOURCE=100mA tOFF tR tF Turn-off time5 Rise time of output Fall time of output Discharge leakage current VRESET=VCC 3.0 3.3 0.5 100 100 20 2.0 200 200 100 2.75 3.3 0.5 100 100 20 2.0 300 300 100 V µs ns ns nA 13.0 12.5 13.3 12.75 12.5 13.3 V V 0.1 0.05 0.25 0.2 0.3 0.25 0.4 0.35 V V 0.1 0.4 2.0 2.5 0.15 0.5 2.2 0.1 0.4 2.0 2.5 0.25 0.75 2.5 V V V V 0.3 0.1 0.4 4.8 1.45 2.7 3.33 0.1 5.0 1.67 0.5 4.0 0.25 5.2 1.9 0.9 1.0 0.4 1.0 0.3 0.1 0.4 4.5 1.1 2.4 3.33 0.1 5.0 1.67 0.5 4.2 0.25 5.6 2.2 2.0 1.0 0.4 1.5 V µA V V µA V mA mA 9.6 2.9 9.4 RA, RB=1k to 100k C=0.1µF VCC=15V 0.15 10.0 3.33 10.0 4 6 500 0.6 10.4 3.8 10.6 9.0 2.6 8.8 0.3 10.0 3.33 10.0 5 13 500 1 11.0 4.0 11.2 % ppm/°C %/V V V V VCC=5V, RL= VCC=15V, RL= RA=2k to 100k C=0.1µF 0.5 30 0.05 2.0 100 0.2 1.0 50 0.1 3.0 150 0.5 % ppm/°C %/V TEST CONDITIONS SE555 Min 4.5 3 10 Typ Max 18 5 12 NE555/SE555C Min 4.5 3 10 Typ Max 16 6 15 UNIT V mA mA
NOTES: 1. Supply current when output high typically 1mA less. 2. Tested at VCC=5V and VCC=15V. 3. This will determine the max value of RA+RB, for 15V operation, the max total R=10M, and for 5V operation, the max. total R=3.4M. 4. Specified with trigger input high. 5. Time measured from a positive going input pulse from 0 to 0.8×VCC into the threshold to the drop from high to low of the output. Trigger is tied to threshold.
August 31, 1994
349
Philips Semiconductors Linear Products
Product specification
Timer
NE/SA/SE555/SE555C
TYPICAL PERFORMANCE CHARACTERISTICS
Minimum Pulse Width Required for Triggering
150 MINIMUM PULSE WIDTH (ns) SUPPLY CURRENT mA 125 100 75 +25oC 50 25 0 0 0.1 0.2 0.3 0.4 (XVCC) +70oC -55oC 0 oC 10.0 8.0 +25oC 6.0 -55oC 4.0 +125oC
Supply Current vs Supply Voltage
1.015 1.010 1.005 1.000 0.995
Delay Time vs Temperature
+125oC
2.0 0 5.0 10.0 SUPPLY VOLTAGE VOLTS 15.0
NORMALIZED DELAY TIME
0.990 0.985 -50 -25 0 +25 +50 +75 +100 +125
LOWEST VOLTAGE LEVEL OF TRIGGER PULSE
TEMPERATURE oC
Low Output Voltage vs Output Sink Current
10 VCC = 5V 1.0 V OUT VOLTS +25oC +25oC 0.1 V OUT VOLTS 1.0 -55oC 10
Low Output Voltage vs Output Sink Current
10 VCC = 10V -55oC V OUT VOLTS +25oC +25oC 0.1 +25oC -55oC +25oC 1.0
Low Output Voltage vs Output Sink Current
VCC = 15V
-55oC
0.1 +25oC
+25oC 55oC
0.001 1.0 2.0 5.0 10 20 50 100
0.01 1.0 2.0 5.0 10 20 50 100
0.01 1.0 2.0 5.0 10 20 50 100
ISINK mA
ISINK mA
ISINK mA
High Output Voltage Drop vs Output Source Current
2.0 1.8 1.6 V CC V OUT VOLTS 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 1.0 2.0 5.0 10 20 50 100 5V VCC 15V 0.985 0 +125oC 55oC +25oC NORMALIZED DELAY TIME 1.015
Delay Time vs Supply Voltage
300 250
Propagation Delay vs Voltage Level of Trigger Pulse
PROPAGATION DELAY ns
1.010 1.005 1.000 0.995 0.990
-55oC 200 0 oC 150 100 50 +25oC 0
+25oC +70oC
5
10
15
20
0
0.1
0.2
0.3
0.4
ISOURCE mA
SUPPLY VOLTAGE V
LOWEST VOLTAGE LEVEL OF TRIGGER PULSE XVCC
August 31, 1994
350
Philips Semiconductors Linear Products
Product specification
Timer
NE/SA/SE555/SE555C
TYPICAL APPLICATIONS
VCC
RA 8 DISCHARGE RB CONTROL VOLTAGE .01µF THRESHOLD 5 6 7 R
555 OR 1/2 556
COMP
R
FLIP FLOP
3 OUTPUT OUTPUT
2 TRIGGER
COMP
R
C 4 RESET
f+
1.49 (R A ) 2R B)C
Astable Operation
VCC
RA 8 DISCHARGE 7 R CONTROL VOLTAGE .01µF THRESHOLD C R 5 6
555 OR 1/2 556
COMP
| t |
FLIP FLOP
3 OUTPUT OUTPUT
2 TRIGGER
COMP
1 * V 3 CC
R
4 RESET
T = 1.1RC
Monostable Operation
August 31, 1994
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Philips Semiconductors Linear Products
Product specification
Timer
NE/SA/SE555/SE555C
TYPICAL APPLICATIONS
VCC VCC VCC
10k 1/3 VCC 2 555 OVOLTS
.001µF
1 DURATION OF TRIGGER PULSE AS SEEN BY THE TIMER
NOTE: All resistor values are in
SWITCH GROUNDED AT THIS POINT
Figure 1. AC Coupling of the Trigger Pulse
Trigger Pulse Width Requirements and Time Delays
Due to the nature of the trigger circuitry, the timer will trigger on the negative going edge of the input pulse. For the device to time out properly, it is necessary that the trigger voltage level be returned to some voltage greater than one third of the supply before the time out period. This can be achieved by making either the trigger pulse sufficiently short or by AC coupling into the trigger. By AC coupling the trigger, see Figure 1, a short negative going pulse is achieved when the trigger signal goes to ground. AC coupling is most frequently used in conjunction with a switch or a signal that goes to ground which initiates the timing cycle. Should the trigger be held low, without AC coupling, for a longer duration than the timing cycle the output will remain in a high state for the duration of the low trigger signal, without regard to the threshold comparator state. This is due to the predominance of Q15 on the base of Q16, controlling the state of the bi-stable flip-flop. When the trigger signal then returns to a high level, the output will fall immediately. Thus, the output signal will follow the trigger signal in this case.
Another consideration is the "turn-off time". This is the measurement of the amount of time required after the threshold reaches 2/3 VCC to turn the output low. To explain further, Q1 at the threshold input turns on after reaching 2/3 VCC, which then turns on Q5, which turns on Q6. Current from Q6 turns on Q16 which turns Q17 off. This allows current from Q19 to turn on Q20 and Q24 to given an output low. These steps cause the 2µs max. delay as stated in the data sheet. Also, a delay comparable to the turn-off time is the trigger release time. When the trigger is low, Q10 is on and turns on Q11 which turns on Q15. Q15 turns off Q16 and allows Q17 to turn on. This turns off current to Q20 and Q24, which results in output high. When the trigger is released, Q10 and Q11 shut off, Q15 turns off, Q16 turns on and the circuit then follows the same path and time delay explained as "turn off time". This trigger release time is very important in designing the trigger pulse width so as not to interfere with the output signal as explained previously.
August 31, 1994
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