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1 2 3 4 5
Clocking
AW1 BLOCK DIAGRAM 01
ICS952018 Mobile Prescott & SIS655FX
A page 03 A
FAN 1
Buffer
MOBILE PRESCOTT page 04
CPU Thermal
(DDR) 478 PIN (MPBGA) Sensor page 04 FAN 2
ICS93741 G791
page 04
page 03
page 04,05
Spread Spectrum
Control
PSB page 12
533MHZ
LVDS LCD Panel
DDR SDRAM 2.5V, 400MHz page 18
Video
B
DDR-SODIMM1
page 10,11
SIS AGP 1.5V, 66MHz Controller B
R.G,B CRT port
655FX ATI M11 page 19
693 BGA
DDR SDRAM 2.5V, 400MHz
DDR-SODIMM2
page 10,11 page 05,06,07,08,09 page 12,13,14 D-Terminal
page 19
TV out
page 19
VRAM
HyperZip
64/128/256MB
page 15,16,17
Primary IDE - HDD
page 29
Secondary IDE
C (DVD-RW) page 29
ATA100 SIS 33MHZ, 3.3V PCI
C
964L
AC97 USB 2.0 USB PORT 0,1,2,3
page 20,21,22 LAN MINI-PCI CARDBUS
page 29
Broadcom SOCKET TI PCI7411
BCM5788
LPC page25,26 page 27 page 23,24
STAC9752A MDC TV-TUNER
page 31 page 27 page 22
RJ45
PC87591L
page 26
IR Receiver
SPK AMP Woofer,CNN RJ11 176 Pins LQFP page 30
page 33 page 34
page 26
page 28
D D
QUANTA
Keyboard
page 29
FLASH
page 28 Title
COMPUTER
AW1 Block Diagram
Size Document Number Rev
Custom 1B
AW1 M/B
Date: Wednesday, August 11, 2004 Sheet 1 of 42
1 2 3 4 5
5 4 3 2 1
AW1 Schematic Page Description : 02
D D
01--BLOCK DIAGRAM 26--LAN (TR & CONNECTOR)
02--Schematic Sheet Number 27--MINI-PCI/MDC
03--CLOCK GENERATOR 28--PCU-87591 & FLASH
04--Mobile Prescott CPU-1 29--K/B,USB,HDD,CDROM
05--Mobile Prescott CPU-2 30--RTC,BEEP,T/P,BUTTON,RECEIVE
06--NB(655FX HOST & AGP) 31--AUDIO(STAC9752A,MIC CON)
07--NB(655FX UMCA&B) 32--AUDIO(AMP & POWER & HP CON)
08--NB(655FX LINK) 33--AUDIO (Power AMP, SP CON)
09--NB(655FX POWER) 34--AUDIO (Sub Woofer AMP)
C 10--SYSTEM DIMM1&2 35--1.5V/1.8V/2.5V & DDRVTT C
11--DDR_TERMINASION 36--VGA POWER
12--VGA(M11-P AGP INTERFACE) 37--DC/DC 3V/5V
13--VGA(M11-P MEM A&B) 38--BATTERY CHARGER
14--VGA(M11-P PWR&GROUN) 39--BATTERY CONNECTOR
15--VGA(VIDEO MEM A) 40--CPU POWER-1
16--VGA(VIDEO MEM B) 41--CPU POWER-2
17--VGA(TERMINATION & VGA ROM)
18--PANEL I/F,LED
19--CRT&S-VIDEO
B B
20--964L-1 PCI/IDE/Link.SCH
21--964L-2 LPC/MII/CPU/GPIO.SCH
22--964L-3 USB/SATA.SCH
23--PCI7411 PCMCIA CONTROLLER
24--PCMCIA CNN & 3 IN 1
25--LAN (BCM5788-10/100/GIGA)
A A
QUANTA
Title
COMPUTER
AW1 Block Diagram
Size Document Number Rev
A3 1B
AW1 M/B
Date: Wednesday, August 11, 2004 Sheet 2 of 42
5 4 3 2 1
1 2 3 4 5 6 7 8
VCC3
C1
0.1U
L1
FBM2125HM330
C9 C2
0.1U
C3
0.1U
C4
0.1U
C5
0.1U
C6
0.1U
CLK_VDD 1
11
13
19
28
U1
ICS952018
VDDREF
VDDZ
VDDPCI
VDDPCI
VDD48
CPUCLK0
CPUCLK#0
CPUCLK1
40
39
44
R_HCLK_CPU+ R1
R_HCLK_CPU- R2
R_HCLK_NB+ R3
33
33
33
HCLK_CPU+
HCLK_CPU-
HCLK_NB+
HCLK_CPU+ 4
HCLK_CPU- 4
HCLK_NB+ 6
03
10U/10V/Y5U 29 43 R_HCLK_NB- R4 33 HCLK_NB-
VDDAGP CPUCLK#1 HCLK_NB- 6
42 VDDCPU
48 HCLK_CPU+ R5 49.9_1%
VDDSRC R_AGPCLK R6 33 AGPCLK_NB HCLK_CPU- R7 49.9_1%
AGPCLK0 31 AGPCLK_NB 6
A C7 C8 C1065 5 30 R_AGPCLK1 R8 33 APGCLK_VGA HCLK_NB+ R9 49.9_1% A
GNDREF AGPCLK1 AGPCLK_VGA 12
0.1U 0.1U 0.1U 8 HCLK_NB- R10 49.9_1%
GNDZ R_ZCLK_NB R11 33 ZCLK_NB
18 GNDPCI ZCLK0 9 ZCLK_NB 8
VCC3 23 10 R_ZCLK_SB R12 33 ZCLK_SB HCLK_CPU+ C10 *10P
GNDPCI ZCLK1 ZCLK_SB 20
24 GND48
32 HCLK_CPU- C11 *10P
GNDAGP FS3 R13 33 PCLK_SB
41 GNDCPU **FS3/PCICLK6 14 PCLK_SB 20
45 15 FS4 HCLK_NB+ C12 *10P
R14 GNDSRC **FS4/PCICLK7 -PCI_STOP
PCICLK0 16 -PCI_STOP 21
10K 17 R_PCLK_LAN R15 33 PCLK_LAN HCLK_NB- C13 *10P
PCICLK1 PCLK_LAN 25
R16 4,5 CPUPWRGD_CPU R1053 *0 PD# 33 20 R_PCLK_591 R17 33 PCLK_591
Vtt_PwrGd/PD#* PCICLK2 PCLK_591 28
21 R_PCLK_7411 R18 33 PCLK_7411 AGPCLK_NB C14 *10P
PCICLK3 PCLK_7411 23
10K PD# R19 475/F IR EF 38 22 R_PCLK_MP R20 33 PCLK_MP
IREF PCICLK4 PCLK_MP 27
12 FS2 AGPCLK_VGA C15 *10P
3
-CPUSTOP 4 *FS2/PCICLK5 FS0 R21 33 AUDIO_CLK
4,21,41 -CPUSTOP RESET#/CPU_STOP# **FS0/REF0 2 AUDIO_CLK 31
Q2 2 Q1 3 FS1 R22 33 REFCLK1 ZCLK_NB C16 *10P
**FS1/REF1 REFCLK1 21
MMBT3904 MMBT3904 VCC3 1 2CLK_VDDA 36 VDDA
3
26 R_CLK48_7411 R23 33 CLK48_7411 ZCLK_SB C17 *10P
CLK48_7411 23
1
R24 10K L2 MLB_160808-0300P-N2 24_48MHz/SEL24_48#*
VCORE 2
3 0 0 o h ms@1 0 0 Mh z C18 C19 R994 10K PCLK_SB C20 *15P
0.1U 4.7U 35 CGCLK_SMB
1
SCLK CGDAT_SMB PCLK_LAN C21 *15P
37 GND SDATA 34
47 T1 PCLK_591 C22 *15P
SRCCLK T2
6 X1 SRCCLK# 46
PCLK_7411 C23 *15P
Y1 27 R_OSC12MHI R25 *33 OSC12MHI
12_48MHz/SEL12_48#** OSC12MHI 22
7 PCLK_MP C24 *15P
X2 R_CLK48_USB R26 *33 CLK48_USB
1 2 48MHz 25 CLK48_USB
B R27 10K FS0 R28 *10K CLK48_USB C25 *15P B
VCC3
14.318MHz/20PF/30ppm
R29 10K FS1 R30 *10K R993 10K VCC3 CLK48_7411 C26 *15P
C27 C28
R31 10K FS2 R32 *10K 27P 27P AUDIO_CLK C30 *15P
3 R33 *10K FS3 R34 10K REFCLK1 L81 C29 *15P
*39nH
SOT23 R35 *10K FS4 R36 10K VCC3
VCC3
2 1
2N7002
EC49
R38 *10K
R37 *10K
2
2
3 1 CGDAT_SMB
10,21 SMBDAT
3 1 CGCLK_SMB
10,21 SMBCLK
Q4
Q3 *2N7002E
*2N7002E
R962 0 R963 0
CPU ZCLK AGP PCI
FS4 FS3 FS2 FS1 FS0 (MHz) (MHz) (MHz) (MHz)
0 0 0 0 0 100.00 133.33 66.67 33.33
Clock Buffer (DDR)
C C
0 0 0 0 1 100.99 134.65 67.33 33.66
0 0 0 1 0 103.00 137.33 68.67 34.33 DDRCLKA0 C31 *10P
0 0 0 1 1 100.00 133.33 66.67 33.33
0 0 1 0 0 133.33 133.33 66.67 33.33 U2 ICS93741 DDRCLKA1 C32 *10P
0 0 1 0 1 134.65 134.65 67.32 33.66 CBVDDA 1 VDD2.5 R39 DDRCLKA0 DDRCLKA2 C33 *10P
0 0 1 1 0 137.33 137.33 68.66 34.33 8 VDD2.5 DDRAT0 5 0 DDRCLKA0 10
0 0 1 1 1 133.33 133.33 66.67 33.33 14 25 R40 0 DDRCLKA1
VDD2.5 DDRAT1 DDRCLKA1 10
22 27 R41 0 DDRCLKA2 DDRCLKA-0 C34 *10P
VDD2.5 DDRAT2 DDRCLKA2 10
0 1 0 0 0 200.00 133.33 66.67 33.33 6 R42 0 DDRCLKA-0
DDRAC0 DDRCLKA-0 10
0 1 0 0 1 201.98 134.65 67.33 33.66 FWDSDCLKOA 4 24 R43 0 DDRCLKA-1 DDRCLKA-1 C35 *10P
7 FWDSDCLKOA CLK_INTA DDRAC1 DDRCLKA-1 10
0 1 0 1 0 206.00 137.33 68.67 34.33 FWDSDCLKOB 13 26 R44 0 DDRCLKA-2
7 FWDSDCLKOB CLK_INTB DDRAC2 DDRCLKA-2 10
0 1 0 1 1 200.00 133.33 66.67 33.33 DDRCLKA-2 C36 *10P
0 1 1 0 0 166.66 125.00 66.66 33.33 R45 22 2 9 R46 0 DDRCLKB0
FB_OUTA DDRBT0 DDRCLKB0 10
0 1 1 0 1 168.31 126.23 67.32 33.66 19 R47 0 DDRCLKB1 DDRCLKB0 C37 *10P
DDRBT1 DDRCLKB1 10
0 1 1 1 0 171.66 128.74 68.66 34.33 C39 10P FB_OUTA 3 21 R48 0 DDRCLKB2
FB_INTA DDRBT2 DDRCLKB2 10
0 1 1 1 1 166.66 125.00 66.66 33.33 10 R49 0 DDRCLKB-0 DDRCLKB1 C38 *10P
DDRBC0 DDRCLKB-0 10
18 R50 0 DDRCLKB-1
DDRBC1 DDRCLKB-1 10
R51 22 11 20 R52 0 DDRCLKB-2 DDRCLKB2 C40 *10P
FB_OUTB DDRBC2 DDRCLKB-2 10
1 0 0 0 0 105.00 140.00 70.00 35.00
1 0 0 0 1 107.00 142.67 71.33 35.67 C43 10P FB_OUTB 12 DDRCLKB-0 C41 *10P
FB_INTB R53 0 SMBCLK
1 0 0 1 0 109.00 145.33 72.67 72.67 SCLK 16
1 0 0 1 1 110.00 146.67 73.33 36.67 17 R54 0 SMBDAT DDRCLKB-1 C42 *10P
GND
GND
GND
GND
SDATA
1 0 1 0 0 140.00 140.00 70.00 35.00
1 0 1 0 1 142.66 142.66 71.33 35.67 DDRCLKB-2 C44 *10P
1 0 1 1 0 145.33 145.33 72.66 36.33
7
15
23
28
1 0 1 1 1 146.66 146.66 73.33 36.67
1 1 0 0 0 210.00 140.00 70.00 35.00
D
1 1 0 0 1 214.00 142.67 71.33 35.67 D
1 1 0 1 0 218.00 145.33 72.67 36.33
1 1 0 1 1 220.00 146.67 73.33 36.67
1 1 1 0 0 266.66 133.33 66.67 33.33
1
1
1
1
1
1
0
1
1
0
269.33
274.66
134.67
137.33
67.33
68.67
33.67
34.33
VCC2.5 L3
FBM2125HM330
CBVDDA QUANTA
1 1 1 1 1 266.66 133.33 66.67 33.33
C45
0.1U
C46
0.1U
C47
0.1U
C48
0.1U
C49
Title
COMPUTER
10U/10V/Y5U
CLK GEN & DRAM Buffer
Size Document Number Rev
Custom 1B
AW1 M/B
Date: Thursday, August 12, 2004 Sheet 3 of 42
1 2 3 4 5 6 7 8
1 2 3 4