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A B C D E

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Calpella Platform
1 1

Table of Contents
Dual Channel DDRIII DDRIII-SODIMM0
Page Description
800/1066 MHz
01 : BLOCK DIAGRAM NB11M-Optimus/GE2 PCI-E x16
02 : Power Delivery
03 : Power Sequency DDR3 1024MB(128Mx8bitx8) Page 11
04: Clock/SMBus Distribution
Page 11~17
CPU
05 : PROCESSOR-1 (HOST BUS)
06 : PROCESSOR-2 (DDR3) Arrandale Dual Channel DDRIII DDRIII-SODIMM1
07 : PROCESSOR-3 (POWER) 800/1066 MHz
08 : PROCESSOR-4 (GRAPHICS POWER)
09 : PROCESSOR-5 (GND) HDMI CRT LVDS 2 Core
10 : PROCESSOR-6 (RESERVE) Page 19 Page 18 Page 18 Page 12
11 : DDR3 SODIMM 0
12 : DDR3 SODIMM 1
13 : NB11M_GE2(PCIE_Interface)
14 : NB11M_GE2(FB interface)
15 : NB11M_GE2(VRAMA) Page 5~10
16 : NB11M_GE2(VRAMB)
2
17 : NB11M_GE2(CRT/LVDS) 2
18 : NB11M_GE2(GPIO)
FDI Interface DMI Interface
19 : NB11M_GE2(STRAPS)
20 : CRT,LVDS connector & LID
21 :LEVEL SHIFT&HDMI
22 : PCH-1 (HDA,JTAG,SATA)
23 : PCH-2 (PCI-E,SMBUS,CLK) Express Card PCI-E LAN MINI PCIE
UMA DISPLAY SATA5 HDD USB0 USB PORT
24 : PCH-3 (DMI,FDI,GPIO)
RTL8111E Conn. X1 Page 34 Page 36
25 : PCH-4 (LVDS,DDI)
26 : PCH-5 (PCI,USB,NVRAM) Page 36 Page 33 Page 37
27 : PCH-6 (GPIO,VSS_NCTF,RSVD)
28 : PCH-7 (POWER) PCI-Express SATA0 ODD USB1 Camera Connector
29 : PCH-8 (POWER)
30 : PCH-9 (GND)
PCH Page 34 Page 37

31 : Clock Generator (9LRS3199AKL)
32 : KBC/EC/uP (KB3926) Bluetooth Connector
33 : PCI-E Lan (RTL8111E) Azalia USB2
34 : Cardreader ( UB6250) Page 37
35 : FAN,Lauch board
36 : HDD,CDROM,USB,NEWCARD,ESATA
ALC269 SPI Flash
37 : MINIPCIE,CAMERA,BLUETOOTH,SW NB-SPI Page 22~30 USB1.1/2.0 USB3 USB PORT/ESATA
38 : CODEC(ALC269) Page 38
32M Page 36
39 : M_Battery select Page 22
3 3
40 : M_Battery Charger
41 : M_System Power LPC
LPC BUS USB4 USB PORT
42 : SMDDR_VTERM/1_5VRUN DEBUG
43 : VTT POWER,+1.8VRUN Page 36
Page 32
44 : M_CPU power
45 : M_Graphic Core
46 : NVVDD,+1.03VRUN Keyboard BT/WIFI COMBO
USB5
47 : Screw/ ME Page 32
Page 37
48 : 168AA_USB BOARD
49 : 168AB_Lauch board Touch Pad KBC
50 : EMI Page 35
USB8 Card Reader
51 : Change List ENE 3926
LID Page 34
Page 20
Page 32
Smart Fan LED NEW Card
USB9
Page 35 Page 35
CPU & System
Page 36

EC-SPI
USB10 Mini_PCIE slot
Page 37
4
SPI BIOS 4

Page 32
USB11 BT/WIFI COMBO
Page 37

MICRO-STAR INT'L CO.,LTD.
Title

BLOCK DIAGRAM
Size Document Number Rev
Custom 0A
MS-168A
Date: Tuesday, January 05, 2010 Sheet 1 of 52
A B C D E
A B C D E

http://hobi-elektronika.net/
1 2 12
BATTERY PRW_SRC +3/5VALW
TPS
5 RUN_ON 2N7002 RUND
OR 51125RGER
+3/5VSUS
1
RUND
19V AC 13 +3/5VRUN
1 4 5 RUND 13
1

+1_5VRUN
SUS_ON 3VSUSPWROK
9 +1_5VDIMM 14 +0_75VRUN
DIMM_ON TPS51218DSCR 10 +1_5VRUN &PM_SLP_S3# CONTROL
+1_5VDIMM_PWROK
PM_DRAM_PWRGD 22
22 CPU 15 GFXVR_EN
H_CPUPWRGD
ARRANDALE VTT
3 RUN_ON 12 TPS51218DSCR 14
PWR_SW# 4 VTT_PWRGD
24 H_CPURST# 4
PM_PWR_BTN#
5 SUS_ON
3VSUSPWROK
PM_SLP_S4# 8 KBC 6 RSMRST#
12 +1_8VRUN
11 ENE3926 RUN_ON ALP5912KAC 14
PM_SLP_S3# 9
2 4 DIMM_ON +1_8VRUN_PWRGD 2
PWR_BTN# 7 17
PM_SLP_S5# EC_ALLSYSPG 12 RUN_ON
RSMRST# 6 8 7
PM_SLP_S4# PM_SLP_S5# 12 DGPU_PWR_EN_EC
11 18 15 +VCC_GFXCORE
PM_SLP_S3# VR_ON
PCH GFXVR_EN MAX17028GTJ 16
ec delay 120ms
CPU CONTROL VGR_PWRGD
HM55 22 PM_DRAM_PWRGD 10
+1_5VDIMM_PWROK
SYS_PWRGD 21 22 14 17
H_CPUPWRGD +1_8VRUN_PWRGD EC_ALLSYSPG

23 VTT_PWRGD 14
PLT_RST# NVDD_CORE
VGR_PWRGD 16 DGPU_PWR_ON 14 TPS51218DSCR 15
DGPU_PWR_EN
DGPU_PWROK
S3_CNTRL To KBC&PCH

PEG_CLKREQ#
18 19 V_CORE To PCH
VR_ON
3
20 12 14
3

ISL62882HRZ VR_PWRGD_CLKEN# DGPU_PWR_EN_EC AO3404 +3VRUN_VGA DGPU_PWR_ON
20 9LRS3189AKLFT EC CONTROL 13
21 AO4468 +1_05VRUN
SYS_PWROK VRAM_PWRGD_CLKEN# PCH DGPU_PWR_EN

15 16 VDDQ
DGPU_PWROK AO4468

4 4

MICRO-STAR INT'L CO.,LTD.
Title

Power Delivery
Size Document Number Rev
C 0A
MS-168A
Date: Saturday, December 26, 2009 Sheet 2 of 52
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A B C D E

http://hobi-elektronika.net/ Calpella System Power on Sequence DC mode
Power down Sequence DC mode S0 to G3
1 PWR_SRC PWR_SRC 1

+3VALW/+5VALW PWR_SRC PWR_SRC
Switch de-bounce time
+3VALW/+5VALW
>=50ms
SWITCH->EC PWRSW#
EC SUS_ON
EC->PCH PM_PWRBT#
+3VSUSPWROK
EC SUS_ON
EC->PCH RSMRST#
+3VSUSPWROK (+3VSUS,+5VSUS)
KBC Delay 50ms ( SPC. >10ms ) PCH->EC PM_SLP_S5#
Ta>30us
EC->PCH RSMRST#
PCH->EC PM_SLP_S4#
t07 PCH internal timing >100ms "boot after G3"
Tb>30us
PCH->EC PM_SLP_S5#
2 PCH->EC PM_SLP_S3# 2

t08 S5# to S4# PCH internal timing >30us EC->POWER DIMM_ON
PCH->EC PM_SLP_S4#

t09 S4# to S3# PCH internal timing >30us +V1.5_DIMM0
PM_SLP_S3#
PCH->EC EC->POWER RUN_ON
DIMM_ON
RUN POWER
+V1.5_DIMM
VTT
EC->POWER RUN_ON ( PM_SLP_S3# ) +VTT_CORE_PWRGD
t13 VTT to VTT_PWRGD 0.0001~500ms
Tf +VTT_CORE_PWRGD to 0.9*VTT >100ns
VTT
(+1_5VRUN, +3VRUN ) GFX_VR_EN
RUN POWER CPU->POWER
GFX_VR_EN VAXG
CPU->POWER
( +VCC_GFXCORE)
VAXG POWER->PCH ALLSYSPG
POWER->PCH (+V1.5_DIMM0_PWRGD, +VTT_PWRGD, +1_5VRUN_PWRGD, +VTT_CORE_PWRGD, S3_CNTRL )
ALLSYSPG
EC->POWER VR_ON
3 3

EC->POWER VR_ON t16 KBC Delay 99ms ( SPC. >99ms ) VHCORE (CPU POWER) Tg<200ns
VHCORE (CPU POWER)
POWER->CLK CLK_EN
t18 IMVP6.5 spec. 10~100us
POWER->CLK CLK_EN
CLKGEN
CLK_GEN

CLKGEN
CLK_GEN
t19 CLKIN_BCLK stable to IMVP_PWRGD >1ms IMVP_PWRGD(PWROK) Th<100ns
>99ms POWER->PCH
IMVP_PWRGD KBC Delay 150ms ( SPC. >99ms......RUN>>PWROK )
POWER->PCH
t20 CLK_EN to IMVP_PWRGD=3~20ms ( IMVP6.5 SPC ) PCH VCCcore 1.1V Ti>40ns
Tj>5us
PCH VCCcore 1.1V t26 IMVP_PWRGD to VCCPWRGOOD default 100ms PCH->CPU VCCPWRGOOD Tr>10us
t27 VHCORE to VCCPWRGOOD=0.05~650ms
PCH->CPU VCCPWRGOOD PCH->DEVICE PLT_RST# Tn>30us
PCH->DEVICE PLT_RST# t32 VCCPWRGOOD to PLT_RST# >1ms

4 System State S0 S3 S4 S5 G3 4

System State G3->S5 S5 S4 S3 -> S0 S0

MICRO-STAR INT'L CO.,LTD.
Title

Power Sequency
Size Document Number Rev
Custom 0A
MS-168A
Date: Saturday, December 26, 2009 Sheet 3 of 52
A B C D E
5 4 3 2 1

http://hobi-elektronika.net/
M_CLK_DDR0,1 133
DIMM0 BCLK_CPU#
M_CLK_DDR0,1#
BCLK_EXP
100
D
CPU BCLK_EXP# HDMI_TXCK_N
D

HDMI
CLK_DP HDMI_TXCK_P
M_CLK_DDR3,4 120
DIMM1 CLK_DP# LVDS_A/BCLK
M_CLK_DDR3,4# LVDS
LVDS_A/BCLK#
HDA_BIT_CLK ALC269

GFX_REFCLKP FBA_CLK_0/1
CLK_BUF_BCLK
133M
PCH 100M
GFX_REFCLKN
GPU VRAM
CLK_BUF_BCLK# +3RUN_VGA
FBA_CLK_0/1#
CLK_PCIE_LAN
CLK_BUF_DOT96 100M +3RUN_VGA
96M RTL811E +3VSUS +5VRUN GPU
CLK_PCIE_LAN# +3VSUS
CLK_BUF_DOT96# +3VALW Thermal Sensor
C
CLK_NEW_CARD C

CLK_BUF_SATA 100M
3189 100M
CLK_BUF_SATA#
CLK_NEW_CARD# New Card PCH P6263
G 2.2K 2.2K
CLK_MINI_PCIE SMB_CPU_CLK
CLK_BUF_EXP 2.2K 2.2K D
100M S
100M MINI CARD
CLK_MINI_PCIE#
CLK_BUF_EXP# G
SMB_CPU_DATA
CLK_BUF_REF14 33.33M D S
ENE 3926 KB3926
CARDREADER_48 BATCLK
ENE 6250 48M
BATDATA

+3RUN
B
+3VSUS +3VSUS 4.7K 4.7K B

BATTERY MAX8731

G +3VALW +3VALW
2.2K 2.2K 2.2K 2.2K
+3VALW
D S

PCH SM BUS DATA G
D S

SM BUS DCLK

A A

MINIPCIE NEWCARD DIMM0 DIMM1 CLKGen

+3VSUS +3VSUS +3RUN +3RUN +3RUN MICRO-STAR INT'L CO.,LTD.
Title
E28/M0
Clock/SMBus Distribution
Size Document Number Rev
D 0A

Date:
MS-168A
Saturday, December 26, 2009 Sheet 4 of 52
5 4 3 2 1
A B C D E

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ARRANDALE PROCESSOR (CLK,MISC,JTAG)

4 4
U35A U35B
B26 PEG_COMP R373 49.9R1%0402 20R1%0402 R372 COMP3 AT23
PEG_ICOMPI COMP3 BCLK_CPU_P_R ER47
PEG_ICOMPO A26 BCLK A16 BCLK_CPU 27

MISC
A24 B27 20R1%0402 R368 COMP2 AT24 B16 BCLK_CPU_N_R ER48
24 DMI_TXN0 DMI_RX#[0] PEG_RCOMPO COMP2 BCLK# BCLK_CPU# 27
C23 A25 R377 750R1%0402
24 DMI_TXN1 DMI_RX#[1] PEG_RBIAS COMP1 TPJNC_TPJNC38

CLOCKS
B22 49.9R1%0402 R149 G16 AR30 TPJNC26
24 DMI_TXN2 DMI_RX#[2] NB_RXN[15:0] 13 COMP1 BCLK_ITP
A21 K35 NB_RXN15 AT30 TPJNC_TPJNC39
24 DMI_TXN3 DMI_RX#[3] PEG_RX#[0] BCLK_ITP#
J34 NB_RXN14 49.9R1%0402 R366 COMP0 AT26 TPJNC25
PEG_RX#[1] NB_RXN13 COMP0 BCLK_EXP_P_R ER45
24 DMI_TXP0 B24 DMI_RX[0] PEG_RX#[2] J33 PEG_CLK E16 BCLK_EXP 23
D23 G35 NB_RXN12 D16 BCLK_EXP_N_R ER46
24 DMI_TXP1 DMI_RX[1] PEG_RX#[3] PEG_CLK# BCLK_EXP# 23

DMI
DMI
B23 G32 NB_RXN11 TP35 TPJNC_TP50 AH24
24 DMI_TXP2 DMI_RX[2] PEG_RX#[4] SKTOCC#
A22 F34 NB_RXN10 A18 CLK_DP_R ER43
24 DMI_TXP3 DMI_RX[3] PEG_RX#[5] DPLL_REF_SSCLK CLK_DP 23
F31 NB_RXN9 A17 CLK_DP#_R ER44
PEG_RX#[6] DPLL_REF_SSCLK# CLK_DP# 23
D24 D35 NB_RXN8 TP37 H_CATERR# AK14
24 DMI_RXN0 DMI_TX#[0] PEG_RX#[7] CATERR#

THERMAL
G24 E33 NB_RXN7 +VTT
24 DMI_RXN1 DMI_TX#[1] PEG_RX#[8]
F23 C33 NB_RXN6
24 DMI_RXN2 DMI_TX#[2] PEG_RX#[9]
H23 D32 NB_RXN5 F6 CPUDRAMRST#
24 DMI_RXN3 DMI_TX#[3] PEG_RX#[10] SM_DRAMRST#
B32 NB_RXN4 ER17 H_PECI_ISO AT15
PEG_RX#[11] 27 H_PECI PECI
D25 C31 NB_RXN3 AL1 SM_RCOMP_0 100R1%0402 R170
24 DMI_RXP0 DMI_TX[0] PEG_RX#[12] SM_RCOMP[0]
F24 B28 NB_RXN2 AM1 SM_RCOMP_1 24.9R1%0402 R169 R156 R158
24 DMI_RXP1 DMI_TX[1] PEG_RX#[13] SM_RCOMP[1]
E23 B30 NB_RXN1 AN1 SM_RCOMP_2 130R1%0402 R168 10KR1%0402 10KR1%0402
24 DMI_RXP2 DMI_TX[2] PEG_RX#[14] SM_RCOMP[2]
G23 A31 NB_RXN0 H_PROCHOT# AN26
24 DMI_RXP3 DMI_TX[3] PEG_RX#[15]