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5 4 3 2 1
Model Name:945G-DS3 Revision 2.02
SHEET TITLE SHEET TITLE
01 COVER SHEET 28 FRONT PANEL
D
02 BLOCK DIAGRAM 29 FRONT USB,REAL USB CONNECT D
03 BOM & PCB MODIFY HISTORY 30 PROCESSOR HOT
04 L775_A 31 ALC883
05 L775_B,D 32 REAR AUDIO JACK
06 L775_C 33 FRONT AUDIO CONNECTOR
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07 L775_E,F,G,H 34 MARVELL 88E8056
08 BROADWATER HOST 35 ITE 8712/8718 GBKX
09 BROADWATER DDR 36 COM_LPT
C C
10 BROADWATER PCI_EXP_16,DMI 37 VCORE PWM
11 BROADWATER VGA,MISC 38 DISCRETE POWER
12 BROADWATER GND 39 GPIO DEFINE
13 BROADWATER PWR 40 GPIO DEFINE
14 DDRII CHANNEL A-SHARE 1,2 41
15 DDRII CHANNEL B-SHARE 1,2 42
16 DDRII TERMINATION 43
17 PCI EXPRESS*16 SLOT 44
B B
18 ICH7 DMI, PCI, USB
19 ICH7 IDE, GPIO, SATA, CTRL
20 ICH7 VCC, GND Digitally signed by dd
21 ICS9LPRS587 CLOCK. DN: cn=dd, o=dd, ou=dd,
22 ATX,ATX_12V CONNECT,BIOS email=dddd@yahoo.
23 PCI EXPRESS*1 SLOT 1,2,3 com, c=US
24 PCI SLOT 1,2,3 Date: 2010.01.19 19:11:57
A
25 HWM/ FAN CONTROL +07'00' A
26 IDE/FLOPPY
Intel Confidential
Title
27 KB_PS2 Cover Sheet
Size Document Number Rev
Custom 945G-DS3 2.02
Date: Friday, November 17, 2006 Sheet 1 of 40
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BLOCK DIAGRAM
INTEL Pentium4
LGA775
D
CLOCK GENERATOR D
VCORE = 1.4V
VCC3
CKVDD = 3.3V
PCI EXPRESS X16
VDDQ = 1.5V (AGP POWER 4X)
CHANNEL A
VCC3 = 3.3V
+12V = 12V DDRII DIMM X 2
3VDUAL = 3.3V
VCC = 5V BROADWATER HOST 1.8VSTR = 1.8V(MEMORY,SUSPEND POWER)
MAA0~14 VTT_DDR = 0.9V
PAGE 14,15
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MAA_CPC1~5
MAB_CPC1~5
MDD0~63 CHANNEL B
-DQSD0~7 DDRII DIMM X 2
MARVELL 8056 DM0~7
1.8VSTR = 1.8V(MEMORY,SUSPEND POWER)
VCORE = 1.75V / SLEEP : 1.3V VTT_DDR = 0.9V
2_5VSTR = 2.5V(MEMORY) PAGE 16,17
VDDQ = 1.5V (AGP POWER 4X, HUBLINK)
C C
PCI EXPRESS X1
SLOT1
VDDQ = 1.5V (AGP POWER 4X) IDE Primary
VCC3 = 3.3V
+12V = 12V
3VDUAL = 3.3V
ICH7
VCC = 5V
VCC = 5V PAGE 28
USB PORTS 0~7 SERIAL ATA
VCC25 = 2.5V(I/O,MEMORY/I,VLINK/I)
VCC = 5V 3VDUAL = 3.3V(SUSPEND POWER)
5VSB = 5V VCC3 = 3.3V
5VUSB = 5V RTCVDD = 3.3V VCC = 5V PAGE 21
PCI BUS
B FWH/HWMO B
PCI SLOT
1,2,3
+12 = 12V
VCC = 5V
VCC3 = 3V PAGE 27
-12 = -12V
VCC = 5V
VCC3 = 3V
3VDUAL = 3V
LPC BUS
Azalia ALC883 LPC I/O ITE8718GB
+12V = 12V
VCC3 = 3.3V VCC = 5V
VCC = 5V 5VSB = 5V
AVDD = 5V PAGE 33 VBAT = 3V PAGE 39
A AUDIO PORTS : FRONT AUDIO I/O PORTS : A
LIN_ OUT LINE_IN MIC
TELE CD_IN AUX_IN COMA COMB LPT PS2 IR FDD
PAGE 34,35 PAGE 29,40
FRONT PANEL /CPU FAN
VCC = 5V Intel Confidential
5VSB = 5V
+12 = 12V Title
PVCC = 5V BOM & PCB MODIFY HISTORY
Size Document Number Rev
Custom 945G-DS3 2.02
Date: Friday, November 17, 2006 Sheet 2 of 40
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Circuit or PCB layout change
Model Name: 945G-DS3 for next version
Version:2.02
DATE Change Item Reason
D
1.0 1. GA-945PL-S3 Rev1.01 --> GA-945P-S3 Rev1.0 D
Component value change 1.01 Dual Channel DDRII
history 2006 LAN LED LD1 REMOVE
2.0 1. S/B HEATSINK90,
Data Change Item Reason
1.0A EVT Release 2. CEC11,CBC32 & CEC12,CBC37CO-LAYOUT
1.0B 1. PCB Rev1.0 --> REv1.01 2.01 1. 2uH Footprint : CHOKE2U-20A-SQ-1
2. DR68 200/6 --> 300/6 2. POWER NET VCC1_5PCIEX CHANGE TO VCC1_5
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3. CPU PIN.E7 ADD CPU_TP18
3. PROCHOT R379 2K/6/1 --> 1.78K/6/1 4. EC22 & CPU_FAN
4. 5. GA-945P-DS3 , GA-945G-DS3,
5. ADD COMP8 R101=30/6/1 GA-945P-S2,GA-945G-S2
C C
6. PROCHOT & STPCLK D13=BAT54A REMOVE 2.02
7. CONROE 266MHZ --> 133MHZ R189=8.2K/4 , R169=22K/4 1. ADD U23 FOR HSYNC & VSYNC LEVEL SHIFT
, ADD BC51 0.1U/4
8. DDRVTT ADD BC79,BC84=0.1U/6/Y5V/25V/Z
9. BC465,BC467,BC464,BC461
10CM3-041005-51R/54R/56R/57R/2AR
10. REMOVE PCI_BT1 , PCI_BT2
1.0C 1. LPC DUAL BIOS SELECT REMOVE R458 , ADD R459=1K/4
2. RTL8111B ADD CAP FOR LBC45,35,55=0.1U/6 , LEC4,LEC6=100u/D
B 2.0A 1. PWM 6 PHASE B
2. VISTA SUPPORT
2.0B 1. R224 1K/4 REMOVE
2. R2016 1K/4 --> 100/4
3. F2,F3 SMD FUSE 1.1A --> 1.6A
4. DL4,DL1,DL3:11LC5-40600C-W1R/W2R/W3R/W4R
5. L5,L13:11LC5-20200B-E1R/E2R/E3R/E4R
6. L12,L6:11LC5-20120B-W1R/W2R/W3R/W4R
7. PCB Rev2.0 --> Rev2.01
8.
9. PCB REMOVE
A A
2.0B-ECN 1. REMOVE CPU IMPSEL R147=62/4
2.0C 1.PCB REV2.01 -> REV2.02 (,,,,)
2. I/O SHIELD CHAMDE ADD Intel Confidential
Title
BOM & PCB MODIFY HISTORY
Size Document Number Rev
Custom 945P-DS3 2.02
Date: Friday, November 17, 2006 Sheet 3 of 40
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5 4 3 2 1
R212
124/6/1 GTLREF1
VTT_OR
HA/REQ:5/13 R235 C105
D 210/6/1 1u/6/Y5V/10V/Z D
ADSTB:5/17
R231
124/6/1 GTLREF0
VTT_OR
R237 C109
210/6/1 1u/6/Y5V/10V/Z
LGA775A
HA[3..16]
8 HA[3..16]
HA3 L5 D2 -HADS R146 62/4 -IERR
A<3>* ADS* -HADS 8 VTT_OR
HA4 -BNR
HA5
P6 A<4>* LGA775 BNR* C2
-HIT
-BNR 8
M5 A<5>* HIT* D4 -HIT 8
HA6 TP_CPU1 R201 62/4 -BR0
HA7
L4 A<6>* (1/8) RSP* H4
-BPRI
VTT_OL
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M4 A<7>* BPRI* G8 -BPRI 8
HA8 R4 B2 -DBSY
A<8>* DBSY* -DBSY 8
HA9 T5 C1 -DRDY R145 62/4 -CPURST
A<9>* DRDY* -DRDY 8 VTT_OR
HA10 U6 E4 -HITM
A<10>* HITM* -HITM 8
HA11 T4 AB2 -IERR
HA12 A<11>* IERR* -HINIT RN13 62/8P4R/6
U5 A<12>* INIT* P3 -HINIT 19
HA13 U4 C3 -HLOCK 7 8
C A<13>* LOCK* -HLOCK 8 VTT_OL C
HA14 V5 E3 -HTRDY 5 6 TESTHI10
A<14>* TRDY* -HTRDY 8
HA15 V4 AD3 TP_CPU2 3 4 TESTHI9
HA16 A<15>* BINIT* -DEFER TESTHI8
W5 A<16>* DEFER* G7 -DEFER 8 1 2
TP_CPU3 N4 RSVD_3
TP_CPU4 P5 RSVD_4 MCERR* AB3
-HREQ0 K4
8 -HREQ0 REQ<0>*
-HREQ1 J5 U2 TP_CPU5
8 -HREQ1 REQ<1>* AP<0>*
-HREQ2 M6 U3 TP_CPU6
8 -HREQ2 -HREQ3 REQ<2>* AP<1>*
8 -HREQ3 K6 REQ<3>*
-HREQ4 J6 F3 -BR0
8 -HREQ4 REQ<4>* BR<0>* -BR0 8
-HADSTB0 R6 G3 TESTHI8 CR121
8 -HADSTB0 ADSTB<0>* TESTHI_8
HA[17..35] HA17 AB6 G4 TESTHI9 CPU RETAINTION/X
8 HA[17..35] A<17>* TESTHI_9
HA18 W6 H5 TESTHI10
HA19 A<18>* TESTHI_10
Y6 A<19>*
HA20 Y4
HA21 A<20>* TP_CPU7
AA4 A<21>* DP<0>* J16
HA22 AD6 H15 TP_CPU8
HA23 A<22>* DP<1>* TP_CPU9
AA5 A<23>* DP<2>* H16
HA24 AB5 J17 TP_CPU10 C108220p/4/NPO/50V/J/X
HA25 A<24>* DP<3>* C102220p/4/NPO/50V/J/X
AC5 A<25>*
HA26 AB4 H1 GTLREF0
HA27 A<26>* GTLREF0 GTLREF1
AF5 A<27>* GTLREF1 H2
HA28 AF4 E24 GTLREF_MCH
A<28>* GTLREF2 GTLREF_MCH 8
B HA29 AG6 H29 B
A<29>* GTLREF_SEL GTL_DET 6,8
HA30 AG4
HA31 A<30>*
AG5 A<31>*
HA32 AH4 G23 -CPURST
A<32>* RESET* -CPURST 8
HA33 AH5
HA34 A<33>*
AJ5 A<34>*
HA35 AJ6 B3 -RS0
A<35>* RS<0>* -RS0 8
AC4 F5 -RS1
RSVD_1 RS<1>* -RS1 8
AE4 A3 -RS2
RSVD_2 RS<2>* -RS2 8
-HADSTB1 AD5
8 -HADSTB1 ADSTB<1>*
CPU-SK/775/S/15
VCORE VCORE
BC461 BC462 BC463 BC464 BC465 BC466 BC467 BC468
10u/12/X7R/6.3V/K 10u/12/X7R/6.3V/K 10u/12/X7R/6.3V/K 10u/12/X7R/6.3V/K 10u/12/X7R/6.3V/K 10u/12/X7R/6.3V/K 10u/12/X7R/6.3V/K 10u/12/X7R/6.3V/K
A A
Gigabyte Technology
Title
P4_LGA775-A
Size Document Number Rev
B 945G-DS3 2.02
Date: Friday, November 17, 2006 Sheet 4 of 40
5 4 3 2 1
5 4 3 2 1
HD[0..15] LGA775B HD[32..47] RN7 470/8P4R/6
8 HD[0..15] HD[32..47] 8
HD0 B4 G16 HD32 7 8 FSBSEL2
D<0>* D<32>* VTT_GMCH FSBSEL0
HD1 C5 LGA775 E15 HD33 5 6
HD2 D<1>* D<33>* HD34 FSBSEL1
A4 D<2>* D<34>* E16 3 4
HD3 C6 (2/8) G18 HD35 1 2
HD4 D<3>* D<35>* HD36
A5 D<4>* D<36>* G17
HD5 B6 F17 HD37 RN15 62/8P4R/6
HD6 D<5>* D<37>* HD38 -BPM1
B7 D<6>* D<38>* F18 VTT_OR 7 8
HD/DBI:5/13 HD7 A7 E18 HD39 5 6 -BPM0
HD8 D<7>* D<39>* HD40 -BPM5
A10 D<8>* D<40>* E19 3 4
DSTBP:5/17 HD9 A11 F20 HD41 1 2 -BPM3
D HD10 D<9>* D<41>* HD42 -BPM2 D
B10 D<10>* D<42>* E21 7 8
HD11 C11 F21 HD43 C94 5 6 TDI
HD12 D<11>* D<43>* HD44 0.1u/6/Y5V/25V/Z -BPM4
D8 D<12>* D<44>* G21 3 4
HD13 B12 E22 HD45 1 2 TMS
HD14 D<13>* D<45>* HD46 RN14 62/8P4R/6
C12 D<14>* D<46>* D22
HD15 D11 G22 HD47
-DBI0 D<15>* D<47>* -DBI2 R206 62/4 TDO
8 -DBI0 A8 DB1<0>* DBI<2>* D19 -DBI2 8
STBN0 C8 G20 STBN2 R213 680/4 VR_RDY
8 STBN0 DSTBN<0>* DSTBN<2>* STBN2 8
HD[16..31] STBP0 B9 G19 STBP2 HD[48..63]
8 HD[16..31] 8 STBP0 DSTBP<0> DSTBP<2> STBP2 8 HD[48..63] 8
HD16 G9 D20 HD48 R197 62/4 -TRST
HD17 D<16>* D<48>* HD49 R198 62/4 TCK
F8 D<17>* D<49>* D17
HD18 F9 A14 HD50
HD19 D<18>* D<50>* HD51
E9 D<19>* D<51>* C15
HD20 D7 C14 HD52
HD21 D<20>* D<52>* HD53 FSBSEL0 R77 8.2K/4/X BSEL0
E10 D<21>* D<53>* B15 21 FSBSEL0 BSEL0 11
HD22 D10 C18 HD54 FSBSEL1 R75 8.2K/4/X BSEL1
D<22>* D<54>* 21 FSBSEL1 BSEL2 BSEL1 11
HD23 F11 B16 HD55 FSBSEL2 R80 8.2K/4
D<23>* D<55>* 21 FSBSEL2 BSEL2 11
HD24 F12 A17 HD56
HD25 D<24>* D<56>* HD57
D13 D<25>* D<57>* B18
HD26 E13 C21 HD58
HD27 D<26>* D<58>* HD59
G13 D<27>* D<59>* B21
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HD28 F14 B19 HD60
HD29 D<28>* D<60>* HD61
G14 D<29>* D<61>* A19
HD30 F15 A22 HD62
HD31 G15
D<30>*
D<31>*
D<62>*
D<63>* B22 HD63
VTT_GMCH VTT_GMCH
FOR ALL DDR CLK RATIOVTT_GMCH VTT_GMCH
-DBI1 G11 C20 -DBI3
8 -DBI1 DB1<1>* DBI<3>* -DBI3 8
STBN1 G12 A16 STBN3
8 STBN1 DSTBN<1>* DSTBN<3>* STBN3 8
STBP1 E12 C17 STBP3
8 STBP1 DSTBP<1> DSTBP<3> STBP3 8
R79 R69 R64 R65
470/4 470/4 R78 470/4 470/4 R70
CPU-SK/775/S/15 8.2K/4 8.2K/4
BSEL0 BSEL1
C
Q12 C
3
3
2N7002/SOT23/25pF/5 Q11
3
3
VTT_GMCH 2N7002/SOT23/25pF/5
LGA775D D Q9 D Q8
A29 MMBT2222A/S OT23/600mA/40 MMBT2222A/S OT23/600mA/40
TCK VTT_1 G S G S
AE1 TCK LGA775 VTT_2 B25
SOT23 SOT23 SOT23 SOT23
TDI AD1 B29
TDI VTT_3 35 BSEL166_1 35 BSEL166_2
TDO
2
1
2
1
2
1
2
1
AF1 TDO (4/8) VTT_4 B30
TMS AC1 C29
-TRST TMS VTT_5 R72 0/4/X R73 0/4/X
AG1 TRST* VTT_6 A26
-BPM0 AJ2 B27
-BPM1 BPM<0>* VTT_7
AJ1 BPM<1>* VTT_8 C28
-BPM2 AD2 A25
-BPM3 BPM<2>* VTT_9
AG2 BPM<3>* VTT_10 A28
-BPM4
-BPM5
AF2
AG3
BPM<4>* VTT_11 A27
C30
CHECK BSEL0/1 ITE8712 POWER ON 1.2V
BPM<5>* VTT_12
CPU
-SYS_RST AC2 A30
19,21,28 -SYS_RST DBR* VTT_13
AK3 ITPCLK<0> VTT_14 C25
AJ3 ITPCLK<1> VTT_15 C26
FSBSEL0 G29 C27
FSBSEL1 FSBSEL11 BSEL<0> VTT_16
H30 BSEL<1> VTT_17 B26 FSA FSB NA
R422 FSBSEL2 G30 D27
0/4/SHT/X BSEL<2> VTT_18
N5 SPARE0 VTT_19 D28 FSBSEL0 FSBSEL1 FSBSEL2 Clock
C9 SPARE1 VTT_20 D25
TP_CPU18 E7 SPARE2 VTT_21 D26 1 0 1 100MHz
AE6 SPARE4 VTT_22 B28
R230 D16 D29 1 0 0 133MHz 3/4
1K/4/X NC_DSS2 VTT_23
A20 NC_DSS3 VTT_24 D30
E23 AM6 VR_RDY 1 1 0 166MHz
NC VTT_PWRGD
VTT_OUT_1 AA1
VR_RDY 37
VTT_OR
# POWER ON
VTT_OUT_2 J1 VTT_OL 0 1 0 200MHz 2.0/2.66/3.33
VTT_SEL F27
EXTBGREF F23 0 0 0 266MHz 1.5/2.0/2.5
SFRANAD D14
B
SFRANAC E6 B
DCLKPH E5
ACLKPH J3
HFPLL D1
CPU-SK/775/S/15
VCC