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5 4 3 2 1

X8601
27Mhz
JE43-CP Block PCB P/N : 91.4NI01.001
Project code: 91.4NI01.001(JE43-CP) CPU DC/DC
ISL62881 54

REVISION : 10277-1 INPUTS OUTPUTS
Diagram DCBATOUT

SYSTEM DC/DC
VCC_CORE


Clock Generator Intel CPU N12P-GS 50
RT8209E
ICS9LRS3197AKLFT 3 DDRIII Slot 0 DDR3
DDRII Channel A N12P-GV VRAM INPUTS OUTPUTS
1066/1333 20
Arrandale PCI EXPRESS GRAPHIC 800MHz
2GB/1GB/512MB DCBATOUT 1D05V_VTT
1D05V_S0
X16 Nvida 88,89,90,91

D
DDRIII Slot 1 DDR II Channel B 4,5,..,9,10 SYSTEM DC/DC D
1066/1333 21 60,..,68 49
X1
RT8223
INPUTS OUTPUTS
14.318Mhz
FDIx8 DMIx4 Discreet/UMA/PX Co-lay 5V_S5
DCBATOUT 3D3V_S5


SYSTEM DC/DC
Mini-Card RT8209E 50
PCIE(Port2) USB 2.0(Port3) INTEL Level 23 HDMI
WLAN 37 shifter HDMI 25
INPUTS OUTPUTS
1D5V_S3
PCH LVDS(Single Channel)
DCBATOUT 0D75V_S0
DDR_VREF_S3
LCD 23
SIM
Mini-Card PCIE(Port3) USB 2.0(Port12)
14 USB 2.0/1.1 ports SYSTEM DC/DC
37 3G ETHERNET (10/100/1000Mb) RGB CRT ISL62881 54
37
High Definition Audio INPUTS OUTPUTS
6 SATA ports DCBATOUT VCC_GFXCORE_PWR

Giga LAN 8 PCIE ports VGA
RJ45 CRT 24 55
AR8151 Port1 PCIE ACPI 1.1 Port4 WEBCAM RT8208B
CONN 31
23
30
LPC I/F INPUTS OUTPUTS
DCBATOUT VGA_CORE
PCI/PCI BRIDGE
Port11
BLUETOOTH
28
X4 TI CHARGER
X3
25Mhz BQ24745 53
25Mhz
C
USB 2.0 Port1 & Port9 USB x 2 29 INPUTS OUTPUTS C

DCBATOUT BT+
INT MIC
HD AUDIO 26
CardReader SD/MMC SYSTEM DC/DC
CODEC AZALIA Port13
RTS5138 MS/MS Pro/xD36 RT9025 52
ALC271 32 36 INPUTS OUTPUTS
MIC IN 3D3V_S0 1D8V_S0

USB_BD
PCIE*1(Port4) USB2.0*1(Port0) USB_BD
SYSTEM DC/DC
uPD720200 38 RT9025 56
HP1 uPD720200 38
INPUTS
26
OUTPUTS
SATA 3D3V_VGA_S0 1D8V_VGA_S0
Port0 SATA HDD 26

Switches 56
11,12,...,18,19 SPI
2CH SPEAKER INPUTS OUTPUTS
1D5V_S3 1D5V_VGA_S0
X2 3D3V_S0 3D3V_VGA_S0
32.768Khz Port4 SATA ODD 27 1D05V_VTT 1V_VGA_S0



LPC Bus LPC debug 41

B Flash ROM B

4MB 41 PCB STACKUP
KBC
X6
ENE 3930 32.768Khz TOP
SPI
40
GND

S
CardReader-->5138
Power_ BD S
Audio---->271X Thermal GND
Flash ROM Touch Int.
Sensor
128KB 41 PAD43 KB40
G787 39 BOTTOM

CPU FAN




A A




Hynix 1G 800M N11PGV SKU


Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Block Diagram
Size Document Number Rev
A2
JE43-CP -1
Date: Wednesday, November 24, 2010 Sheet 1 of 69
5 4 3 2 1
A B C D E
PCH Strapping Processor Strapping
Name Schematics Notes Pin Name Strap Description Configuration (Default value for each bit is Default
SPKR Reboot option at power-up 1 unless specified otherwise) Value
Default Mode: Internal weak Pull-down.
CFG[4] Embedded 1: Disabled - No Physical Display Port attached to 1
No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with 8.2-k Embedded DisplayPort.
- 10-k weak pull-up resistor. DisplayPort
Presence 0: Enabled - An external Display Port device is
INIT3_3V# Weak internal pull-down. Do not pull high. connected to the Embedded Display Port.
4 GNT3#/ Default Mode: Internal pull-up. CFG[3] PCI-Express Static 1: Normal Operation. 1
4
GPIO55 Low (0) = Top Block Swap Mode (Connect to ground with 4.7-k weak Lane Reversal 0: Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
pull-down resistor).
CFG[0] PCI-Express 1: Single PCI-Express Graphics 1
INTVRMEN High (1) = Integrated VRM is enabled Configuration 0: Bifurcation enabled
Low (0) = Integrated VRM is disabled Select
GNT0#, Default (SPI): Left both GNT0# and GNT1# floating. No pull up
GNT1# required. CFG[7] Reserved - Clarksfield (only for early samples pre-ES1) - 0
Temporarily used Connect to GND with 3.01K Ohm/5% resistor
Boot from PCI: Connect GNT1# to ground with 1-k pull-down
resistor. Leave GNT0# Floating. for early Note: Only temporary for early CFD samples
Clarksfield (rPGA/BGA) [For details please refer to the WW33
Boot from LPC: Connect both GNT0# and GNT1# to ground with 1-k samples. MoW and sighting report].
pull-down resistor. For a common motherboard design (for AUB and CFD),
GNT2#/ Default - Internal pull-up. the pull-down resistor should be used. Does not
GPIO53 Low (0)= Configures DMI for ESI compatible operation (for servers impact AUB functionality.
only. Not for mobile/desktops).

GPIO33 Default: Do not pull low.
Disable ME in Manufacturing Mode: Connect to ground with 1-k
pull-down resistor.

SPI_MOSI Enable iTPM: Connect to Vcc3_3 with 8.2-k weak pull-up resistor.
3 Disable iTPM: Left floating, no pull-down required. 3
NV_ALE Enable Danbury: Connect to Vcc3_3 with 8.2-k weak pull-up
resistor.
Disable Danbury: Connect to ground with 4.7-k weak pull-down
resistor.
NC_CLE Weak internal pull-up. Do not pull low.
HAD_DOCK_EN# Low (0): Flash Descriptor Security will be overridden.
/GPIO[33] High (1) : Flash Descriptor Security will be in effect.
HDA_SDO Weak internal pull-down. Do not pull high.
HDA_SYNC Weak internal pull-down. Do not pull high.
GPIO15 Weak internal pull-down. Do not pull high.
GPIO8 Weak internal pull-up. Do not pull low.
GPIO27 Default = Do not connect (floating)
High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.


2 2
USB Table
PCIE Routing
Pair Device
LANE1 LAN 0 USB3
LANE2 MiniCard1 1 USB2
2 USB4
LANE3 MiniCard2 3 MINICARD1
4 WECAM
5 Touch Panel
6 NC
7 NC
8 NC
9 USB1(HS)
10 Finger Print Hynix 1G 800M N11PGV SKU
1 11 Blue Tooth 1
12 MINIC2 Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
13 Cardreader Taipei Hsien 221, Taiwan, R.O.C.

Title

Table of Content
Size Document Number Rev
A3
JE43-CP -1
Date: W ednesday, November 24, 2010 Sheet 2 of 69
A B C D E

1D5V_S0_CLKGEN

1D5V_S0_CLKGEN
C1




1



1




1
SCD1U16V2ZY-2GP




Do Not Stuff
R1 C2 C3




SC10U6D3V3MX-GP
1D5V_S0 1 2 DY
Do Not Stuff 1D05V_VTT




2



2




2
Do Not Stuff
1 2
R2

3D3V_S0 20101026 20101108 3D3V_S0

4 Do Not Stuff 4
1 2 3D3V_CK505 1 DY 2 3D3V_CK505_IO R5 1 2
R3 C4 C10 Do Not Stuff




1




1




1




1




1




1




1
SCD1U16V2ZY-2GP




SCD1U16V2ZY-2GP




Do Not Stuff




SCD1U16V2ZY-2GP
C5 R4 C6 C7 C8
DY




SC10U6D3V3MX-GP




SC10U6D3V3MX-GP
Do Not Stuff DY C9 DY




Do Not Stuff
2




2




2




2




2




2




2
SA 0622 EMI


VGA_XIN1_L 1 2
OSC_SPREAD_L DY EC1
1 2 Do Not Stuff
DY EC2 Do Not Stuff




U1

1D5V_S0_CLKGEN 1 10 CLK_PCIE_SATA_R 2 Do Not Stuff
1 R6 CLK_PCIE_SATA 12
3D3V_CK505 VDD96_1_5 SATAT_LR CLK_PCIE_SATA#_R2 Do Not Stuff R7
5 VDD27_3_3 SATAC_LR 11 1 CLK_PCIE_SATA# 12
3D3V_CK505_IO 15 VDDPCIEX_IO_LV
17 VDDPCIEX_1_5
18 3 DREFCLK_R 2 Do Not Stuff R8
1 DREFCLK 12
VDDCPU_IO_LV DOT96T_LR DREFCLK#_R Do Not1Stuff R9
24 VDDCPU_1_5 DOT96C_LR 4 2 DREFCLK# 12
29 VDDREF_3_3
DY 23 CLK_CPU_BCLK_R 2 Do Not Stuff
1 R10 CLK_CPU_BCLK 12
3 RN42 VGA_XIN1_L CPUT_LR0 CLK_CPU_BCLK#_RDo Not Stuff 1 R11 3
63 OSC_SPREAD 4 1 6 27FIX CPUC_LR0 22 2 CLK_CPU_BCLK# 12
63 VGA_XIN1 3 2 Do Not Stuff OSC_SPREAD_L 7 27SS CPUT_LR1 20
CPUC_LR1 19

12,20,21 PCH_SMBCLK 32 SCLK_3_3
12,20,21 PCH_SMBDATA 31 13 CLKIN_DMI_R 2 Do Not Stuff
1 R12 CLKIN_DMI 12