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A B C D E
MODEL NAME : QCL00_QCL20
PCB NO : LA-8241P
BOM P/N : 4619GP31L21 Inspiron DIS
1 4619GQ31L21 Inspiron UMA 1
4619GP31L01 Vostro DIS
4619GQ31L01 Vostro UMA
Dell / Compal Confidential
Schematic Document
Inspron A5 & Vostro 3560 (Intel Chief River)
2 2
Ivy Bridge(rPGA) + Panther Point(mainstream)
Discrete AMD Thames-XT
2012-02-01 X76@ : VRAM Group
3 46@ : for 46 level CH@ : Chelsea M2 3
@ : Nopop Component Rev: 1.0 SE@ : Seymour M2
CONN@ : Connector Component TH@ : Thames-XT
KB930@ : ENE KB930 Implemented MB Type BOM P/N Config DIS@ : Only for Discrete
KB9012@ : ENE KB9012 Implemented
EXP@ : Express Card Implemented
FFS@ : Only for Free Fall Sensor
VOS@ : Only for Vostro
4 INS@ : Only for Inspiron 4
UMA@ : Only for UMA
GCLK@ : Green CLK implemented Security Classification Compal Secret Data Compal Electronics, Inc.
AMP@ : External Amplifier implemented Issued Date 2012/01/17 Deciphered Date 2013/01/16 Title
Cover Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KBBL@ : Keyboard Back Light implemented AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
Date:
Document Number
LA-8241P
Wednesday, February 01, 2012 Sheet 1 of 56
Rev
1.0
A B C D E
A B C D E
Compal Confidential CPU XDP
Fan Control
Project Code : QCL00 / QCL20 P.25 Conn. P.6
File Name : LA-8241P 64M*16
VRAM * 4 Intel
DDR3 P.40
64bit
Ivy Bridge Memory Bus (DDR3)
1
Dual Channel DDRIII-DIMM X2 1
AMD PEG 3.0 x16
Processor BANK 0, 1, 2, 3, 4 ,5 ,6 ,7
64M*16 Thames-XT / 1.5V DDR3 1333 MHz page 11,12
VRAM * 4
35W QC rPGA 988
Chelsea Pro
DDR3 P.41 64bit
24-26 W P.34~39 35W DC rPGA 988 8GB Max
P.5~10
FDI x8 DMI x4
100MHz 100MHz
2.7GT/s 5GB/s
SATA3.0 Port 0
SATA HDD Conn. FFS P.29
P.29
CRT Port 1
CRT Conn. Mini Card-2 (mSATA)
P.22 ( Full )
Port 5 P.32
2 LVDS Daughter board 2
LVDS Conn. Port 2
P.22
Intel SATA ODD Conn.
P.29
HDMI Panther Point
HDMI Conn. PCH HM77 USB 3.0 Port 1,2
P.23
USB 3.0 Conn. 1 P.33
Port 0,1 USB 3.0 Conn. 2 -( USB Charger )
USB2.0 USB2.0 Port 3,4
Port 2,3 USB 3.0 Conn. 3
Port 11 PCI-E x1
BGA 989 Balls USB 3.0 Conn. 4 P.32
Daughter board
Port 12
Port 3 Port 2 Port 1 Digital Camera P.22
Mini Card-1 Express Card Ethernet Port 4 Mini Card-1 (WLAN)
WLAN / BT4.0 RTL8105E (10/100) ( Half ) P.32
Half RTL8111F (10/100/1000) Daughter board
P.32 P.28 P.32
Port 10 Card Reader
RTS5139 P.32 3 in 1 Socket
3
34mm Slot RJ45 Daughter board 3
Port 8
Finger Print P.32
Daughter board Daughter board Daughter board HD Audio
P13~20
SPI Digital Mic.
RTC CKT. SPI ROM
P.13 4MB P.13 LPC Bus Audio Codec Headphone Jack
33MHz CX20672 P.30
Power On/Off CKT. SPI Mic. Jack
P.25 SPI ROM
2MB P.13
ENE KBC SPI
DC/DC Interface CKT. KB9012 / Amplifier
P.27
TPA3113D2 P.31 Int. Speaker R/L
KB930 page 24
PS/2 only for Vostro 3560
4 4
Int.KBD Touch Pad Dashboard SPI ROM
page 25 page 25
Button page 32
x3 128K page 26
reserved for KB930
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2012/01/17 Deciphered Date 2013/01/16 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-8241P
Date: Wednesday, February 01, 2012 Sheet 2 of 56
A B C D E
A B C D E
Compal Confidential
Project Code : QCL00 / QCL20
File Name : LA-8241P
1 1
8 pin-Hot Bar LS-8241P (Ins) LED/B
Led1 Led2
4 pin-Hot Bar
LS-8251P (Vos)
Led1 Led2 Led3
LS-8245P (Ins)
LS-8255P (Vos) SW1 SW1 SW2 SW3
LED/B
FFC FFC
4 pin 8 pin Lid (Vostro)
JFC
JPWR JLVDS
8 pin FFC
40 pin
4 pin 4 pin
2
LA-8241P M/B LS-8242P (Ins) IO/B 2
Lid (Inspiron) 80 pin
JBTB1
LS-8252P (Vos)
Touch Pad
L R
JFP
6 pin
JTP JCR2
Camera
4 pin
4 pin (Vostro)
TP Led (Vos)
TP Led (Ins)
LCD Panel
FFC 40 pin Wire
4 pin
4 pin-Hot Bar
3 JLED JCR1 3
Card Reader/B
4 pin 26
10 pin JEXP
LS-8243P (Ins)
26 pin
1 LS-8253P (Vos)
(Vostro) (Inspiron)
FFC
10 pin
LS-8244P (Ins)
LS-8254P (Vos) LED/B
Express Card
10 pin-Hot Bar
4 pin-Hot Bar
Led1 Led2 Led3 Led4
Finger Print/B
LS-8256P (Vos)
Top Side
4 4
Bottom Side
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2012/01/17 Deciphered Date 2013/01/16 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagram
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, February 01, 2012 Sheet 3 of 56
A B C D E
A
Board ID Table for AD channel
Vcc 3.3V +/- 5% BOARD ID Table USB PORT# DESTINATION
Ra 100K +/- 5%
Board ID Rb V AD_BID min V AD_BID typ V AD_BID max EC AD3 Board ID PCB Revision 0 USB conn.1
0 0 0 V 0 V 0.155 V 0x00-0x0C 0 0.1
1 8.2K +/- 5% 0.168 V 0.250 V 0.362 V 0x0D-0x1C 1 0.1 1 USB conn.2 - Power Share
2 18K +/- 5% 0.375 V 0.503 V 0.621 V 0x1D-0x30 2 0.2
3 33K +/- 5% 0.634 V 0.819 V 0.945 V 0x31-0x49 3 0.2 2 USB conn.3
4 56K +/- 5% 0.958 V 1.185 V 1.359 V 0x4A-0x69 4 0.3 0.2
5 100K +/- 5% 1.372 V 1.650 V 1.838 V 0x6A-0x8E 5 0.3 0.3 3 USB conn.4
6 200K +/- 5% 1.851 V 2.200 V 2.420 V 0x8F-0xBB 6 1.0 1.0
7 NC 2.433 V 3.300 V 3.300 V 0xBC-0xFF 7 1.0 4 MINI CARD-1 (WLAN)
QCL00 QCL20 QCL01 PCH
SMBUS Control Table
5 NC
Express Thermal VGA Thermal
SOURCE MINI1 MINI2 BATT SODIMM FFS VGA XDP Charger
Card Sensor Sensor 6 NC
EC_SMB_CK1
EC_SMB_DA1
KB9012
V V 7 NC
EC_SMB_CK2
EC_SMB_DA2
KB9012
V V 8 Finger Print
PCH_SML0CLK PCH Link
PCH_SML0DATA 9 NC
PCH_SML1CLK PCH
PCH_SML1DATA 10 Card Reader
MEM_SMBCLK
MEM_SMBDATA
PCH
V V V V V V 11 Express Card
12 Camera
CLKOUT DESTINATION 13 NC
1 1
PCI0 PCH_LOOPBACK
PCI1 EC LPC
PCI2 None
SATA DESTINATION PCI EXPRESS DESTINATION
PCI3 None
SATA0 HDD Lane 1 10/100/1G LAN
PCI4 None
SATA1 SSD Lane 2 MINI CARD-1 (WLAN)
SATA2 ODD Lane 3 Express Card
DIFFERENTIAL DESTINATION FLEX CLOCKS DESTINATION
SATA3 None Lane 4 None
CLKOUT_PCIE0 10/100/1G LAN CLKOUTFLEX0 None
SATA4 None Lane 5 None
CLKOUT_PCIE1 MINI CARD-1 WLAN CLKOUTFLEX1 None
SATA5 None Lane 6 None
CLKOUT_PCIE2 Express Card CLKOUTFLEX2 None
Symbol Note : Lane 7 None
CLK CLKOUT_PCIE3 None CLKOUTFLEX3 None
Lane 8 None
CLKOUT_PCIE4 None : means Digital Ground
CLKOUT_PCIE5 None
: means Analog Ground
CLKOUT_PCIE6 None
Security Classification Compal Secret Data Compal Electronics, Inc.
CLKOUT_PCIE7 None Issued Date 2012/01/17 Deciphered Date 2013/01/16 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
Size Document Number Rev
CLKOUT_PEG_B None AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
LA-8241P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, February 01, 2012 Sheet 4 of 56
A
5 4 3 2 1
+VCCP
PEG_ICOMPI and RCOMPO signals should be shorted and routed
1
with - max length = 500 mils - typical impedance = 43 mohms JCPU1I
RC2 PEG_ICOMPO signals should be routed with - max length = 500 mils
24.9_0402_1% - typical impedance = 14.5 mohms
T35 F22
2
JCPU1A VSS161 VSS234
T34 F19
D PEG_COMP VSS162 VSS235 D
J22 T33 E30
PEG_ICOMPI VSS163 VSS236
J21 T32 E27
PEG_ICOMPO VSS164 VSS237
<15> DMI_CRX_PTX_N0 B27 H22 T31 E24
DMI_RX#[0] PEG_RCOMPO VSS165 VSS238
<15> DMI_CRX_PTX_N1 B25 T30 E21
DMI_RX#[1] VSS166 VSS239
<15> DMI_CRX_PTX_N2 A25 T29 E18
DMI_RX#[2] VSS167 VSS240
<15> DMI_CRX_PTX_N3 B24 K33 T28 E15
DMI_RX#[3] PEG_RX#[0] VSS168 VSS241
M35 T27 E13
PEG_RX#[1] VSS169 VSS242
<15> DMI_CRX_PTX_P0 B28 L34 T26 E10
DMI_RX[0] PEG_RX#[2] VSS170 VSS243
<15> DMI_CRX_PTX_P1 B26 J35 P9 E9
DMI_RX[1] PEG_RX#[3] VSS171 VSS244
DMI
<15> DMI_CRX_PTX_P2 A24 J32 P8 E8
DMI_RX[2] PEG_RX#[4] VSS172 VSS245
<15> DMI_CRX_PTX_P3 B23 H34 P6 E7
DMI_RX[3] PEG_RX#[5] VSS173 VSS246
PEG_RX#[6] H31 P5 VSS174 VSS247 E6
<15> DMI_CTX_PRX_N0 G21 DMI_TX#[0] PEG_RX#[7] G33 P3 VSS175 VSS248 E5
E22 G30 PEG_GTX_C_HRX_N7 PEG_GTX_C_HRX_N7 <34> P2 E4
<15> DMI_CTX_PRX_N1 DMI_TX#[1] PEG_RX#[8] PEG_GTX_C_HRX_N6 VSS176 VSS249
<15> DMI_CTX_PRX_N2 F21 DMI_TX#[2] PEG_RX#[9] F35 PEG_GTX_C_HRX_N6 <34> N35 VSS177 VSS250 E3
D21 E34 PEG_GTX_C_HRX_N5 PEG_GTX_C_HRX_N5 <34> N34 E2
<15> DMI_CTX_PRX_N3 DMI_TX#[3] PEG_RX#[10] PEG_GTX_C_HRX_N4 VSS178 VSS251
PEG_RX#[11] E32 PEG_GTX_C_HRX_N4 <34> N33 VSS179 VSS252 E1
G22 D33 PEG_GTX_C_HRX_N3 PEG_GTX_C_HRX_N3 <34> N32 D35
<15> DMI_CTX_PRX_P0 DMI_TX[0] PEG_RX#[12] VSS180 VSS253
D22 D31 PEG_GTX_C_HRX_N2 PEG_GTX_C_HRX_N2 <34> N31 D32
<15> DMI_CTX_PRX_P1 DMI_TX[1] PEG_RX#[13] VSS181 VSS254
PCI EXPRESS* - GRAPHICS
F20 B33 PEG_GTX_C_HRX_N1 PEG_GTX_C_HRX_N1 <34> N30 D29
<15> DMI_CTX_PRX_P2 DMI_TX[2] PEG_RX#[14] PEG_GTX_C_HRX_N0 VSS182 VSS255
<15> DMI_CTX_PRX_P3 C21 DMI_TX[3] PEG_RX#[15] C32 PEG_GTX_C_HRX_N0 <34> N29 VSS183 VSS256 D26
N28 VSS184 VSS257 D20
PEG_RX[0] J33 N27 VSS185 VSS258 D17
PEG_RX[1] L35 N26 VSS186 VSS259 C34
PEG_RX[2] K34 M34 VSS187 VSS260 C31
FDI_CTX_PRX_N0 A21 H35 L33 C28
<15> FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI0_TX#[0] PEG_RX[3] VSS188 VSS261
<15> FDI_CTX_PRX_N1 H19 FDI0_TX#[1] PEG_RX[4] H32