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A B C D E




COMPAL CONFIDENTIAL
MODEL NAME : NLM01
1 1

PCB NO : LA-6132P ( DA80000I500) DAZ0DD00200
BOM P/N : 43185331L01 (K325)
43185331L02 (K125)
43185331L03 (V105)


M10 Andros
AMD ASB2/ RS880M / SB820M
2 2




2010-05-11
REV : 1.0(A00)
@ : Nopop Component
3 WWAN@: WWAN function 3




NONWWAN@: NON WWAN function
CONN@: Connector only




4 4




DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Cover Sheet
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6132P
Date: Tuesday, May 11, 2010 Sheet 1 of 45
A B C D E
A B C D E




Thermal Sensor Clock Generator Spread Spectrum
EMC1402 x 2 SB820M ECS2P8211
AMD ASB2 DDR3-SO-DIMM X2
(CPU/NB) K325 / 2C / 1.3G / 2M
1
Internal CKG K125 / 1C / 1.7G / 1M Page 10, 11 1


Page 8/13 Page 16 Page 18 DDR3 BUS
Dual Channel
Page 6,7,8,9
DDRIII 800MHz
Hyper Transport Link
HT3 16x16 1.0GHz up to 1.6GHz

LVDS SidePort DDR3 64x16Mb
LVDS conn. Page 27
128MB LFB Page 14
TMDS
AMD-RS880M
HDMI conn. Page 22
BGA 528
USB port2
VGA USB conn.
Page 33
CRT conn. Page 24 Page 12,13,14,15

USB port0,1
PCI Express USB conn. x 2
A-Link Express Sub/B & Page 23
2 2
4 x PCIE
GPP PCIE0 GPP PCIE1 GPP PCIE2 USB port4 Mini Card
WLAN Page 28
LAN Mini Card Mini Card
Atheros AR8132 WLAN WWAN AMD-SB820M USB2.0 USB port5 Mini Card
WWAN Page 28 SIM conn.
Page 20 Page 28 Page 28 Page 28
BGA 605
USB port6
Bluetooth conn.
Page 28
RJ45 conn.
Page 16,17,18,19
Page 20 Page 21
USB port8 CardBus 3 in 1 conn.
Realtek RTS5138 Page 21

LPC BUS USB port9
Camera
Page 27
DC/DC Power Button
3
(Power Control) Page 30 Sub/B 3




Power Circuit EC ENE KB926 CODEC Audio Jack x 2
Sub/B
+3VALW / +5VALW Page 26 AZ-Audio I/F Realtek ALC259
BATT IN &OTP
+1.1VALW
Page 33 Sub/B
+0.75VS Digital MIC
Camera side
+1.5V
+1.8V DC IN & DECTOR Int. KBD
+2.5VDDA / +CPU_VDDR Page 26
Page 34
+CPU_CORE / +VDDNB T/P conn.
+NB_CORE Page 31
SPI ROM
CHARGER
Page 31
Page 36~43 Page 35




4 4




DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Block Diagram
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6132P
Date: Monday, May 03, 2010 Sheet 2 of 45
A B C D E
5 4 3 2 1




SB820M
POWER STATES USB PORT# DESTINATION
Signal SLP SLP SLP S4 SLP ALWAYS M SUS RUN CLOCKS
State S3# S4# S5# STATE# M# PLANE PLANE PLANE PLANE 0 USB (Right)

D
S0 (Full ON) / M0 HIGH HIGH HIGH HIGH HIGH ON ON ON ON ON 1 USB (Right) D



S3 (Suspend to RAM) / M1 LOW HIGH HIGH HIGH HIGH ON ON ON OFF ON 2 USB (Left)

S4 (Suspend to DISK) / M1 LOW LOW HIGH LOW HIGH ON ON OFF OFF ON 3 None

S5 (SOFT OFF) / M1 LOW LOW LOW LOW HIGH ON ON OFF OFF ON 4 MINI CARD - WLAN

S3 (Suspend to RAM) / M-OFF LOW HIGH HIGH HIGH LOW ON OFF ON OFF OFF 5 MINI CARD - WWAN

S4 (Suspend to DISK) / M-OFF LOW LOW HIGH LOW LOW ON OFF OFF OFF OFF 6 Bloetooth

S5 (SOFT OFF) / M-OFF LOW LOW LOW LOW LOW ON OFF OFF OFF OFF 7 None

8 Card Reader

C
PM TABLE 9 Camera C


B+ +1.5V +5VS 10 None
+5VALW +3VS
+3VALW +1.8VS
power +1.1VALW +1.5VS 11 None
plane +1.1VS
+0.75VS
+2.5VDDA 12 None
+CPU_VDDR
+NB_CORE
+CPU_CORE
13 None
State +VDDNB

RS880M
S0 ON ON ON PCIE DESTINATION
S3 ON ON OFF Lane 1 10 / 100 LAN
B
S5 S4/AC ON OFF OFF Lane 2 MINI CARD - WLAN B



S5 S4/AC don't exist OFF OFF OFF Lane 3 MINI CARD - WWAN

Lane 4 None

Lane 5 None




A A




DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Index and Config.
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6132P
Date: Monday, May 03, 2010 Sheet 3 of 45
5 4 3 2 1
5 4 3 2 1




EN_INVPWR
ADAPTER
SI3457 INVPWR_B+
(QV6)
D D


VR_ON
ISL6265 +CPU_CORE
(PU14)
BATTERY +PWR_SRC
+VDDNB




CHARGER TPS51427
(PU2)
MAINPWON

C C




+5VALW +3VALW




TPS51218 TPS2062 TPS2062 TPS2062 NTMS4920 TPS51218 TPS51218 NTMS4920 SI3456DY APL5912
(PU15) (UI13) (UI14) (UI15) (QZ3) (PU10) (PU7) (QZ8) (QZ11) (PU11)




EN_WOL#
USB_EN#




USB_EN#




SYSON




POK
SUSP




SUSP
SUSP#




SUSP#
USB_PWR_EN#



B B
+USB_SIDE
+NB_CORE +USB_VCCA +5V_ESAUSB +5VS +1.5V +1.1VALW +3VS +3V_LAN +1.8VS
_PWR




SI2301 SI4634DY APL5912 APL5331 SI4634DY APL5508 AO3413
(QO4) (QZ12) (PU12) (PU8) (QZ15) (PU13) (QV8)

ENVDD
SUSP




SUSP




SUSP
SUSP#


CAM_ON/OFF# LCD_VCC_TEST_EN




+5VS_CAM +1.5VS +CPU_VDDR +0.75VS +1.1VS +2.5VDDA +LCD_VDD
A (0.9V) A




DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Power Rail
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6132P
Date: Monday, May 03, 2010 Sheet 4 of 45
5 4 3 2 1
5 4 3 2 1




+1.5V
1K
D 1K D


MMBT3904 UT5 @
AN4 CPU_SIC 8 SMBUS Address [TBD]
ASB2 AN5 CPU_SID
MMBT3904 7
(CPU_Thermal)




+3VS
2.2K
2.2K

AD22 MEM_SMBCLK 202 JDIMMA SMBUS Address [TBD]
AE22 MEM_SMBDATA 200
C +3VALW C
10K
10K 202 JDIMMB SMBUS Address [TBD]
200
F5 SB_SMB_CLK1
F4 SB_SMB_DAT1
UT7
SB 820M +3VALW 8
(NB_Thermal) SMBUS Address [TBD]
10K 7
10K

D25 SB_SMB_CLK2
F23 SB_SMB_DAT2

+1.5V
1K
1K

B26 SB_SMB_CLK3
0R @
F26 SB_SMB_DAT3
0R @
B B




+5VALW
4.7K
4.7K
0R @ WWAN_SMB_CK_R 30 JWLAN1 SMBUS Address [TBD]
100R PJBATT 0R @
77 EC_SMB_CK1 7 SMBUS Address [TBD] WWAN_SMB_DA_R 32
(BattERy conn)
78 EC_SMB_DA1
100R 6

0R @ WWAN_SMB_CK_R 30
+3VALW +3VS JWWAN1 SMBUS Address [TBD]
KB 926 2.2K @ 2.2K 0R @ WWAN_SMB_DA_R 32
2.2K @ 2.2K

79 EC_SMB_CK2
0R @ LAN_SMB_CK_R 30 UL10 (LAN) SMBUS Address [TBD]
80 EC_SMB_DA2
0R @ LAN_SMB_DA_R 32




A A




DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, SMBus Topology
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6132P
Date: Monday, May 03, 2010 Sheet 5 of 45
5 4 3 2 1
5 4 3 2 1




D D




UU1A K325@


H_CADIP0 H2 AK1 H_CADOP0 H_CADOP0 <12>
<12> H_CADIP0 L0_CADIN_H0 L0_CADOUT_H0
H_CADIN0 H1 AK2 H_CADON0 H_CADON0 <12>
<12> H_CADIN0 L0_CADIN_L0 L0_CADOUT_L0
H_CADIP1 K2 AF4 H_CADOP1 H_CADOP1 <12>
<12> H_CADIP1 L0_CADIN_H1 L0_CADOUT_H1
H_CADIN1 K1 AF3 H_CADON1 H_CADON1 <12>
<12> H_CADIN1 L0_CADIN_L1 L0_CADOUT_L1
H_CADIP2 K3 AF1 H_CADOP2 H_CADOP2 <12>
<12> H_CADIP2 L0_CADIN_H2 L0_CADOUT_H2
H_CADIN2 K4 AF2 H_CADON2 H_CADON2 <12>
<12> H_CADIN2 L0_CADIN_L2 L0_CADOUT_L2
H_CADIP3 M2 AD4 H_CADOP3 H_CADOP3 <12>
<12> H_CADIP3 L0_CADIN_H3 L0_CADOUT_H3
H_CADIN3 M1 AD3 H_CADON3 H_CADON3 <12>
<12> H_CADIN3 L0_CADIN_L3 L0_CADOUT_L3
H_CADIP4 P2 AB4 H_CADOP4 H_CADOP4 <12>
<12> H_CADIP4 L0_CADIN_H4 L0_CADOUT_H4
H_CADIN4 P1 AB3 H_CADON4 H_CADON4 <12>
<12> H_CADIN4 L0_CADIN_L4 L0_CADOUT_L4
H_CADIP5 P3 AB1 H_CADOP5 H_CADOP5 <12>
<12> H_CADIP5 L0_CADIN_H5 L0_CADOUT_H5
H_CADIN5 P4 AB2 H_CADON5 H_CADON5 <12>
<12> H_CADIN5 L0_CADIN_L5 L0_CADOUT_L5
H_CADIP6 T2 Y4 H_CADOP6 H_CADOP6 <12>
C <12> H_CADIP6 L0_CADIN_H6 L0_CADOUT_H6 C
H_CADIN6 T1 Y3 H_CADON6 H_CADON6 <12>
<12> H_CADIN6 L0_CADIN_L6 L0_CADOUT_L6
H_CADIP7 T3 Y1 H_CADOP7 H_CADOP7 <12>
<12> H_CADIP7 L0_CADIN_H7 L0_CADOUT_H7
H_CADIN7 T4 Y2 H_CADON7 H_CADON7 <12>
<12> H_CADIN7 L0_CADIN_L7 L0_CADOUT_L7
H_CADIP8 G6 AH1 H_CADOP8 H_CADOP8 <12>
<12> H_CADIP8 L0_CADIN_H8 L0_CADOUT_H8
H_CADIN8 G5 AH2 H_CADON8 H_CADON8 <12>
<12> H_CADIN8 L0_CADIN_L8 L0_CADOUT_L8
H_CADIP9 H4 AK3 H_CADOP9 H_CADOP9 <12>
<12> H_CADIP9 L0_CADIN_H9 L0_CADOUT_H9




HT LINK
H_CADIN9 H3 AK4 H_CADON9 H_CADON9 <12>
<12> H_CADIN9 L0_CADIN_L9 L0_CADOUT_L9
H_CADIP10 J6 AH3 H_CADOP10 H_CADOP10 <12>
<12> H_CADIP10 L0_CADIN_H10 L0_CADOUT_H10
H_CADIN10 J5 AH4 H_CADON10 H_CADON10 <12>
<12> H_CADIN10 L0_CADIN_L10 L0_CADOUT_L10
H_CADIP11 L6 AE9 H_CADOP11 H_CADOP11 <12>
<12> H_CADIP11 L0_CADIN_H11 L0_CADOUT_H11
H_CADIN11 L5 AE8 H_CADON11 H_CADON11 <12>
<12> H_CADIN11 L0_CADIN_L11 L0_CADOUT_L11
H_CADIP12 P6 AE6 H_CADOP12 H_CADOP12 <12>
<12> H_CADIP12 L0_CADIN_H12 L0_CADOUT_H12
H_CADIN12 P5 AE5 H_CADON12 H_CADON12 <12>
<12> H_CADIN12 L0_CADIN_L12 L0_CADOUT_L12
H_CADIP13 R7 AC7 H_CADOP13 H_CADOP13 <12>
<12> H_CADIP13 L0_CADIN_H13 L0_CADOUT_H13
H_CADIN13 R6 AC6 H_CADON13 H_CADON13 <12>
<12> H_CADIN13 L0_CADIN_L13 L0_CADOUT_L13
H_CADIP14 U6 AB9 H_CADOP14 H_CADOP14 <12>
<12> H_CADIP14 L0_CADIN_H14 L0_CADOUT_H14
H_CADIN14 U5 AB8 H_CADON14 H_CADON14 <12>
<12> H_CADIN14 L0_CADIN_L14 L0_CADOUT_L14
H_CADIP15 W7 AB6 H_CADOP15 H_CADOP15 <12>
<12> H_CADIP15 L0_CADIN_H15 L0_CADOUT_H15
H_CADIN15 W6 AB5 H_CADON15 H_CADON15 <12>
<12> H_CADIN15 L0_CADIN_L15 L0_CADOUT_L15

H_CLKIP0 M3 AD1 H_CLKOP0 H_CLKOP0 <12>
<12> H_CLKIP0 L0_CLKIN_H0 L0_CLKOUT_H0
H_CLKIN0 M4 AD2 H_CLKON0 H_CLKON0 <12>
<12> H_CLKIN0 L0_CLKIN_L0 L0_CLKOUT_L0
H_CLKIP1 M8 AF6 H_CLKOP1 H_CLKOP1 <12>
<12> H_CLKIP1 L0_CLKIN_H1 L0_CLKOUT_H1
H_CLKIN1 M7 AF5 H_CLKON1 H_CLKON1 <12>
<12> H_CLKIN1 L0_CLKIN_L1 L0_CLKOUT_L1

H_CTLIP0 V2 V4 H_CTLOP0 H_CTLOP0 <12>
<12> H_CTLIP0 L0_CTLIN_H0 L0_CTLOUT_H0
H_CTLIN0 V1 V3 H_CTLON0 H_CTLON0 <12>
<12> H_CTLIN0 L0_CTLIN_L0 L0_CTLOUT_L0
H_CTLIP1 Y6 Y8 H_CTLOP1 H_CTLOP1 <12>
<12> H_CTLIP1 L0_CTLIN_H1 L0_CTLOUT_H1
H_CTLIN1 Y5 Y9 H_CTLON1 H_CTLON1 <12>
<12> H_CTLIN1 L0_CTLIN_L1 L0_CTLOUT_L1
B B



ASB2_BGA812




UU1 K125@ UU1 V105@




ASB2_BGA812 ASB2_BGA812
SA00003RI0L SA00003TL0L

V105 PART NO. need apply again




A A




DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, ASB2 HT I/F & FAN
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 1.0
LA-6132P
Date: Tuesday, May 04, 2010 Sheet 6 of 45
5 4 3 2 1
5 4 3 2 1




UU1B K325@ Processor DDR3 Memory Interface UU1C K325@


DDR_A_MA0 AC26 F11 DDR_A_D0 DDR_B_MA0 AC33 A14 DDR_B_D0
<10> DDR_A_MA0 MA_ADD0 MA_DATA0 DDR_A_D0 <10> <11> DDR_B_MA0 MB_ADD0 MB_DATA0 DDR_B_D0 <11>
DDR_A_MA1 W29 E11 DDR_A_D1 DDR_B_MA1 Y32 C14 DDR_B_D1
<10> DDR_A_MA1 MA_ADD1 MA_DATA1 DDR_A_D1 <10> <11> DDR_B_MA1 MB_ADD1 MB_DATA1 DDR_B_D1 <11>
DDR_A_MA2 AB29 E14 DDR_A_D2 DDR_B_MA2 Y33 A17 DDR_B_D2
<10> DDR_A_MA2 MA_ADD2 MA_DATA2 DDR_A_D2 <10> <11> DDR_B_MA2 MB_ADD2 MB_DATA2 DDR_B_D2 <11>
DDR_A_MA3 Y30 E15 DDR_A_D3 DDR_B_MA3 Y31 B18 DDR_B_D3
<10> DDR_A_MA3 MA_ADD3 MA_DATA3 DDR_A_D3 <10> <11> DDR_B_MA3 MB_ADD3 MB_DATA3 DDR_B_D3 <11>
DDR_A_MA4 U27 H12 DDR_A_D4 DDR_B_MA4 W33 A13 DDR_B_D4
<10> DDR_A_MA4 MA_ADD4 MA_DATA4 DDR_A_D4 <10> <11> DDR_B_MA4 MB_ADD4 MB_DATA4 DDR_B_D4 <11>
DDR_A_MA5 V30 G12 DDR_A_D5 DDR_B_MA5 V31 B14 DDR_B_D5
<10> DDR_A_MA5 MA_ADD5 MA_DATA5 DDR_A_D5 <10> <11> DDR_B_MA5 MB_ADD5 MB_DATA5 DDR_B_D5 <11>
DDR_A_MA6 U28 H14 DDR_A_D6 DDR_B_MA6 V33 A16 DDR_B_D6
<10> DDR_A_MA6 MA_ADD6 MA_DATA6 DDR_A_D6 <10> <11> DDR_B_MA6 MB_ADD6 MB_DATA6 DDR_B_D6 <11>
DDR_A_MA7 R27 H15 DDR_A_D7 DDR_B_MA7 U33 C16 DDR_B_D7
D <10> DDR_A_MA7 MA_ADD7 MA_DATA7 DDR_A_D7 <10> <11> DDR_B_MA7 MB_ADD7 MB_DATA7 DDR_B_D7 <11> D
DDR_A_MA8 R26 E17 DDR_A_D8 DDR_B_MA8 V32 A19 DDR_B_D8
<10> DDR_A_MA8 MA_ADD8 MA_DATA8 DDR_A_D8 <10> <11> DDR_B_MA8 MB_ADD8 MB_DATA8 DDR_B_D8 <11>
DDR_A_MA9 P27 D16 DDR_A_D9 DDR_B_MA9 T33 C20 DDR_B_D9
<10> DDR_A_MA9 MA_ADD9 MA_DATA9