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SECTION

3

ISOLATED SWITCHED-MODE P O W E R SUPPLY

3.1.

CIRCUIT DESCRIPTION _I .

The power supply is a self-oscillating switching type of converter which, under normal conditions, operates at a free-running frequency l of between 20 and 3OkHz. A l control functions are performed within 1801 (TDA4600). The output transistor, Q801, switches the primary winding of the transformer, T801, across the rectified mains voltage developed on the reservoir capacitor, C804. The output voltages, (121V and 18V, are generated at taps on the secondary winding and rectified and smoothed by D812, D811, C822, C826 and C821. The base drive for Q801 is generated in I801, the current at pin 8 controlling the switch-on period and that at pin 7 controlling the turn-off conditions of Q801. R808, R810 and C813 develop a sawtooth voltage at pin 4 which simulates the collector current of Q801. This is used to generate a sawtooth base drive at pin 8 to avoid over-saturation of Q801. 0803 and C314 rectify and smooth a voltage from the feedback winding on T801 which is proportional to the output voltages. This voltage is attenuated by R313, R312, R807 and R806 with respect to a reference voltage at pin 1 and applied to pin 3. Any changes in the output are thus transmitted via pin 3 to the control logic and the base current amplifier e within the I.C. In this way the frequency and duty cycle of the output pulses are adjusted to correct for the changes. R813 (set H.T.) adjusts the proportion of voltage fed back and hence adjusts the output vol+age. In order to complete the oscillator feedback loop R8i4 feeds an attenuated voltage from the feedback winding on T801 and pin 2. This enables the I.C. to identify the points at which the output pulse crosses the zero voltage level and so provide correctly timed base drive pulses to Q801.
The supply for the I.C. is developed by D806 and C808 from a

third winding on T801.

D805 and R802 provide a start-up supply for the I.C.

If an overload occurs on the 121V output voltage, the frequency and the duty cycle are reduced, thus limiting the power supplied to the load, If the overload becomes a short circuit, the frequency reduces further to 1.4kHz and the power output is limited to a low level. 3.2. VOLTAGE ADJUSTMENT

with the receiver operating with a normal picture signal, reduce the brightness control for zero beam current. Adjust the 'Set H.T.' preset potentiometer R813 to give a meter reading of 117V at TP45, the supply voltage- to the line scan output transistor.

3-l

3.3.

VOLTAGE MEASUREMENTS
low

Measured with a multimeter (2OkOhm/V) cn a normal picture displayed unless otherwise state?

d.c. range With

Integrated Circuit I801 (TDA4600) Rectified mains across C 8 0 4 330V d.c. (iOOOV range) IMPORTANT: All other voltages on I801 and Q801 are measured with respect to the heat sink tab of I801 as a reference level o for the power supply. Integrated Circuit 1801 Pin 1 2 3 4 5 V 4.4 0.1 2.2 2.2 6.3 Pin 6 7 8 9 V 0 1.8 1.8 16.5 (3OV range)

Transistor Q801 BU426A Emitter V 0 Base V -0.2 (O.5V a.c.) Collector V 300 (1OOOV range)

3-2

SECTION 4

SYNC. PROCESSOR/LINE AND FIELD OSCILLATORS

4.1. 4.1.1.

CIRCUIT DESCRIPTION Introduction

The generation of timebase'sync., gating, line drive pulses and field oscillator ramp are derived from 1401, (TDA2578A). From inputs of positive going composite video, (or merely negative going sync. pulses), line flyback pulses and field output feedback, three main output signals are produced:(1) A line drive pulse to switch the line driver transistor Q401
(2) A field oscillator ramp voltage to drive the field output

I.C., 1301 (3) A 3-level sandcastle pulse for gating, clamping, blanking and switching in the various functions required of the monitor 4.1.2. Sync. Separator

A positive going video signal, (negative going sync. pulse), is fed to Pin 5 of 1401 via a low-pass filter, R414/C411 which attenuates any colour burst and/or noise content that may be present. The sync. separator within the I.C. incorporates a noise inverter and a self-adjusting pulse slicer, to produce a constant amplitude sync. pulse train over a wide range of inputs. 4.1.3. Line Oscillator Control and Output

The pulses from the sync. separator are compared in a phase locked loop with a 15.625kHz oscillator. The free-running frequency is determined by C410, R415 and R416. The phase locked loop has a short time constant to provide rapid locking from the out-of-sync. condition, but a coincidence detector switches the loop to a long time constant for the in-sync. state, affording excellent noise immunity. The 'flywheel' time constant is determined by the network connected to Pin 8 of the I.C. trol loop includes a phase detector which compares the A second contr timing of the output of the 15.625kHz oscillator, with a line flyback reference pulse coming from an auxiliary winding, (the Picture Tube heater winding), on the line scan transformer. The reference pulse is coupled to Pin 12 via C401 and R401. This loop corrects for any phase errors due to storage time variations of the line output transistor Q402. R406 provides a small amount of adjustment to the loop phase detector control stage, enabling the picture information to be centred on the raster. The resulting output pulses are fed via a n open collector output stage to Pin 11 of the I.C. from whence they are led away via the network R424/C416/R425 to switch the line driver transistor Q401.

4.1.4.

Field Oscillator

Pulses from the sync. separator are fed into the vertical sync. integrator whose slice level is controlled at ?in 4 of 1401. The output pulses are used to trigger a vertical oscillator/ sawtooth generator. The oscillator is connected to an internal comparator, the other input of which is fed with an inverted and attenuated sample of the field scan output derived from the negative feedback from 1301 and connected to 1401 at Pin 2. The error corrected output of the comparator is buffered before being led out at Pin 1. The field oscillator ramp signal is frequency controlled at Pin 3 by R418, R419, R421, R423 and C413.
Two currents from the 121V and 25V supplies are used to charge C413 and, in this way, optimise vertical ramp linearity and minimise vertical 'breathing'.

Additional internal circuitry ensures that spurious triggering of the field oscillator, (by noise), is automatically inhibited. 1401 also embodies a circuit which detects 50/60Hz field standards and, as necessary, corrects picture height without the need for manual adjustment. 4.1.5. Sandcastle Pulse

The 15.625kHz oscillator feeds a burst gate pulse generator whose output is mixed with line flyback pulses and an internally generated field blanking pulse, (obtained by first doubling, and then dividing down from line frequency). The result is a 3-level sandcastle pulse train which is brought out at Pin 17. 4.2. 4.2.1. SETTING-UP PROCEDURE Line Frequency

If it is necessary to adjust the 15.62kHz oscillator, connect a shorting link between TP41 and Tp42, (across C411), and adjust R415 until the picture drifts slowly through horizontally, then remove the shorting link. 4.2.2. Field Frequency

If it is necessary to adjust the field oscillator, the following procedure should be adopted: With a suitable signal applied to the monitor, turn R307, (Height), to mid. position and place shorting links between TP41 and TP42 and between TP43 and TP44, (across R419). Adjust R421, (Field Frequency), so that the unlocked picture just runs through vertically. Remcve the shorting links (With the links in, the free-running. and reset R307 for correct height, field frequency when correctly set is 46.5Hz +/-0.5Hz.

4-2

4.3.

VCLTAGE MEASUREMENTS Measured with a multi-meter (2OkOhms/V) with

respect t0 chassis (unless otherwise stated), with nor-21 picture displayed. on 1OV d.c. range,

Integrated Circuit 1401 (TDA 2578A) Pin 1 2 3 4 5 6 7
a 9 10 11

Voltage (V) 3.5 Do not measure 4.0 4.5 3.6 7.1 4.8 2.6 0 12.0 2.6 1.0 N/C 2.4 3.7 (loss of line hold)0 a.2 1.6 3.0

12 13 14 15 16 17

18

4-3