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Volks DIS/UMA (14"/15.6") Ultra/Slim 01
PCB 6L STACK UP
D
Intel Chief River Platform Block Diagram LAYER 1 : TOP
LAYER 2 : SGND D
LAYER 3 : IN1(High)
VRAM DDR3 x 4
LAYER 4 : IN2(Low)
Max 1GBs/2GBs
LAYER 5 : SVCC
900Mhz PAGE 18
LAYER 6 : BOT
Intel Ivy Bridge 64bit
DDR3 SODIMM1 Sandy Bridge
DDR3 800 ~ 1600 MT/s
Maxima 4GBs
Processor : Daul Core
PAGE 12
PCI-E Gen3 NVIDIA N13P-GV2
Power Source
Power : 35/17 (Watt)
x 8 Lane S3 Package 23*23mm
DDR3 SO-DIMM2 BQ24738
DDR3 800 ~ 1600 MT/s Package : BGA1023 System Charge Power (+BATCHG)
Maxima 4GBs
PAGE 13
Size : 31x 27 (mm) ph
27.5W
PAGE 2~5
Ricktek RT8223P
BCLK133M
Green CLK
PAGE 14~17 System Power (+3VPCU/+5VPCU/
FDI x 8
DMI x 4
32.768KHz LCD Conn (14") +3VS5/+5VS5)
PAGE 25
C C
27MHz PAGE 26
PAGE 16 NCP6132/NCP5911/RT8240P/
SATA - 1st HDD TPS51462RGER
SATA0 6GB/s LVDS Interface Processor Power (+VCC_CORE/
Package : 9.5 (mm) Intel Cougar/Panther Point
HDMI Conn +1.05_VTT/+VCCSA)
Power : PAGE 24
Platform Controller Hub PAGE 26
HDMI Interface DP PortB SLG55448V
mSATA SATA1 6GB/s Power : 3.5 Watt System Discharge Power
Package : 12.7 (mm) USB3.0 Port x 1 (+1.5V/+3V/+5V)
Package : FCBG989 USB3.0 Interface USB 3.0 Port1(USB 2.0 Port0)
Power : PAGE 24 Port0,1 PAGE 22
Size : 25 x 25 (mm) Richtek RT8207
G-Sensor SM BUS USB2.0 Interface
PAGE 6~11 System Memory Power (+1.5VSUS/
PAGE 22 +0.75V_DDR_VTT)
Azalia
USB2.0 Port x 1(Left side) Camera
System BIOS Port9 Port2 NCP3218G
SPI ROM SPI Interface
PAGE 7 PAGE 19 PAGE 26 GPU core power(+VGACORE)
LPC Interface PCIE Gen 1 x 1 Lane
B B
EnE KB3940QF A1 IDT RTS5229-GR Realtek RTL8105 Intel Rambo Peak
Embedded Controller 92HD99 Card Reader LAN Controller Halt Mini Card
EC SPI ROM Power : Power : Power : Power :
PAGE 25 WLAN / BT Combo
Package : LQPF128 Package : LQPF48 Package : LQPF48 Package : OFN48
Keyboard
PAGE 22
Size : 14 x 14 (mm) Size : 7 x 7 (mm) Size : 7 x 7 (mm) Size : 6 x 6 (mm)
Touch Pad PAGE 25 PAGE 19 PAGE 21 PAGE 20 PAGE 23
PAGE 24
FAN Controller Combo Jack
iPHONE type
PAGE 24 PAGE 19
A A
PROJECT : VOLKS
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Block Diagram
NB5 Date: Thursday, June 07, 2012 Sheet 1 of 37
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Ivy Bridge Processor (DMI,PEG,FDI)
U20A
PEG_COMP connect to PIN G3&G4 W:4mils/S:15mils/L: 500mils.
PEG_COMP connect to PIN G1 W:12mils/S:15mils/L: 500mils.
G3 PEG_COMP
02
PEG_ICOMPI G1 U20B
M2 PEG_ICOMPO G4
6 DMI_TXN0 P6 DMI_RX#[0] PEG_RCOMPO J3
6 DMI_TXN1 DMI_RX#[1] PEG_RX#[0..7] 14 BCLK CLK_CPU_BCLKP 8
P1 H2
6 DMI_TXN2 DMI_RX#[2] BCLK# CLK_CPU_BCLKN 8
MISC
P10 H22 PEG_RX#0
CLOCKS
6 DMI_TXN3 DMI_RX#[3] PEG_RX#[0] J21 PEG_RX#1 F49
PEG_RX#[1] 7 H_SNB_IVB# PROC_SELECT#
N3 B22 PEG_RX#2 AG3 R410 1K/F_4
D 6 DMI_TXP0 P7 DMI_RX[0] PEG_RX#[2] D21 PEG_RX#3 DPLL_REF_CLK AG1 D
R408 1K/F_4 +1.05V
6 DMI_TXP1 DMI_RX[1] PEG_RX#[3] DPLL_REF_CLK#
DMI
P3 A19 PEG_RX#4 SKTOCC# C57
6 DMI_TXP2 P11 DMI_RX[2] PEG_RX#[4] D17 PEG_RX#5 TP3 PROC_DETECT#
6 DMI_TXP3 DMI_RX[3] PEG_RX#[5] B14 PEG_RX#6
K1 PEG_RX#[6] D13 PEG_RX#7
6 DMI_RXN0 M8 DMI_TX#[0] PEG_RX#[7] A11
6 DMI_RXN1 N4 DMI_TX#[1] PEG_RX#[8] B10 C49
TP_CATERR#
6 DMI_RXN2 R2 DMI_TX#[2] PEG_RX#[9] G8 TP7 CATERR#
6 DMI_RXN3 DMI_TX#[3] PEG_RX#[10]
THERMAL
A8 Placement close to EC.
K3 PEG_RX#[11] B6
6 DMI_RXP0 M7 DMI_TX[0] PEG_RX#[12] H8 A48 AT30
H_PECI CPU_DRAMRST# C616 *43P/50V_4
6 DMI_RXP1 DMI_TX[1] PEG_RX#[13] 25 H_PECI PECI SM_DRAMRST#
P4 E5
6 DMI_RXP2 T3 DMI_TX[2] PEG_RX#[14] K7
PEG_RX[0..7] 14 47P/50V_4 C589
6 DMI_RXP3 DMI_TX[3] PEG_RX#[15]
DDR3
MISC
BF44 SM_RCOMP_0 R175 140/F_4
K22 PEG_RX0 H_PROCHOT#_R R375 56.2/F_4 C45 SM_RCOMP[0] BE43 SM_RCOMP_1 R176 25.5/F_4
PEG_RX[0] 25,34 H_PROCHOT# PROCHOT# SM_RCOMP[1]
K19 PEG_RX1 BG43 SM_RCOMP_2 R177 200/F_4
PEG_RX[1] C21 PEG_RX2 SI modify on 4/2 SM_RCOMP[2]
PEG_RX[2] SM_RCOMP[0] W:20mils/S:20mils/L: 500mils,
U7 D19 PEG_RX3 SM_RCOMP[1] W:20mils/S:20mils/L: 500mils,
6 FDI_TXN0 W 11 FDI0_TX#[0] PEG_RX[3] C19 D45
PEG_RX4 9,21 PM_THRMTRIP# SM_RCOMP[2] W:15mils/S:20mils/L: 500mils,
6 FDI_TXN1 W1 FDI0_TX#[1] PEG_RX[4] D16 THERMTRIP#
PEG_RX5
6 FDI_TXN2 AA6 FDI0_TX#[2] PEG_RX[5] C13 PEG_RX6
6 FDI_TXN3 W6 FDI0_TX#[3] PEG_RX[6] D12 N53
PEG_RX7 XDP_PRDY#
PCI EXPRESS -- GRAPHICS
6 FDI_TXN4 FDI1_TX#[0] PEG_RX[7] PRDY# TP2
V4 C11 N55 XDP_PREQ# CPU XDP
6 FDI_TXN5 Y2 FDI1_TX#[1] PEG_RX[8] C9 PREQ#
6 FDI_TXN6 FDI1_TX#[2] PEG_RX[9]
AC9 F8 L56 XDP_TCLK
6 FDI_TXN7 FDI1_TX#[3] PEG_RX[10] TCK
Intel(R) FDI
C8 L55 XDP_TMS
PEG_RX[11] TMS
PWR MANAGEMENT
C5 J58 XDP_TRST#
U6 PEG_RX[12] H6 TRST#
JTAG & BPM
6 FDI_TXP0 FDI0_TX[0] PEG_RX[13]
W 10 F6 C48 M60 XDP_TDI_R
6 FDI_TXP1 FDI0_TX[1] PEG_RX[14] 14 PEG_TX#[0..7] 6 PM_SYNC PM_SYNC TDI
W3 K6 L59 XDP_TDO
C 6 FDI_TXP2 AA7 FDI0_TX[2] PEG_RX[15] TDO C
R373 10K/F_4
6 FDI_TXP3 FDI0_TX[3]
W7 G22 C_PEG_TX#0 C183 0.22U/10V_4 PEG_TX#0
6 FDI_TXP4 T4 FDI1_TX[0] PEG_TX#[0] C23 C_PEG_TX#1 C180 PEG_TX#1 B46
0.22U/10V_4 9 H_PWRGOOD
6 FDI_TXP5 FDI1_TX[1] PEG_TX#[1] UNCOREPW RGOOD
AA3 D23 C_PEG_TX#2 C182 0.22U/10V_4 PEG_TX#2 K58 XDP_DBRST#
6 FDI_TXP6 FDI1_TX[2] PEG_TX#[2] DBR# XDP_DBRST# 6
AC8 F21 C_PEG_TX#3 C173 0.22U/10V_4 PEG_TX#3 C588 *43P/50V_4
6 FDI_TXP7 FDI1_TX[3] PEG_TX#[3] H19 C_PEG_TX#4 C169 PEG_TX#4
0.22U/10V_4
AA11 PEG_TX#[4] C17 C_PEG_TX#5 C171 0.22U/10V_4 PEG_TX#5 PM_DRAM_PWRGD_R BE45 G58
6 FDI_FSYNC0 AC12 FDI0_FSYNC PEG_TX#[5] K15 SM_DRAMPW ROK BPM#[0] E55
C_PEG_TX#6 C158 0.22U/10V_4 PEG_TX#6
6 FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] F17 BPM#[1] E59
C_PEG_TX#7 C166 0.22U/10V_4 PEG_TX#7 Intel DG request
U11 PEG_TX#[7] F14 BPM#[2] G55
6 FDI_INT FDI_INT PEG_TX#[8] A15 BPM#[3] G59
6 FDI_LSYNC0
AA10
AG8 FDI0_LSYNC
PEG_TX#[9]
PEG_TX#[10]
J14
H13
PEG x8 8,14,20,21,23,25 PLTRST# R376 1.5K/F_4 CPU_RESET# D44
RESET#
BPM#[4]
BPM#[5]
H60
J59 XDP_BPM6
6 FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] M10 BPM#[6] J61 XDP_BPM7
PEG_TX#[12] F10 BPM#[7]
PEG_TX#[13] D9
14 PEG_TX[0..7]
CPU RESET# R393
PEG_TX#[14] J4 C590
eDP_COMP AF3 PEG_TX#[15] 750/F_4
eDP_COMPIO 4mils *43P/50V_4
AD2 F22 C_PEG_TX0 C178 0.22U/10V_4 PEG_TX0
INT_eDP_HPD_Q AG11 eDP_ICOMPO 12mils PEG_TX[0] A23 C_PEG_TX1 C179 0.22U/10V_4 PEG_TX1
eDP_HPD# PEG_TX[1] D24 C_PEG_TX2 C181 0.22U/10V_4 PEG_TX2 IC,IVB_2CBGA,0P7
PEG_TX[2] E21 C_PEG_TX3 C172 0.22U/10V_4 PEG_TX3
AG4 PEG_TX[3] G19 C_PEG_TX4 C167 0.22U/10V_4 PEG_TX4
AF4 eDP_AUX# PEG_TX[4] B18 C_PEG_TX5 C170 0.22U/10V_4 PEG_TX5
eDP_AUX PEG_TX[5] K17 C_PEG_TX6 C164 0.22U/10V_4 PEG_TX6 +1.5VSUS
PEG_TX[6]
eDP
G17 C_PEG_TX7 C165 0.22U/10V_4 PEG_TX7
AC3 PEG_TX[7] E14
AC4 eDP_TX#[0]
eDP_TX#[1]
PEG_TX[8]
PEG_TX[9]
C15 DDR3 DRAM RESET +3V_DEEP_SUS
AE11 K13 R447
AE7 eDP_TX#[2] PEG_TX[10] G13
eDP_TX#[3] PEG_TX[11] 1K/F_4
B K10 B
AC1 PEG_TX[12] G10 R543
AA4 eDP_TX[0] PEG_TX[13] D8 DRAMRST_CNTRL_DDR 1K/F_4 R448
eDP_TX[1] PEG_TX[14] 1K/F_4 DDR3_DRAMRST# 12,13
AE10 K4 12,13 DRAMRST_CNTRL_DDR
eDP_TX[2] PEG_TX[15]
3
AE6 +1.5V_CPU Q30
eDP_TX[3] 2N7002K
for DS3
CPU_DRAMRST#_R
IC,IVB_2CBGA,0P7 R532 0_4 2
ph SM_DRAMPWROK 8 DRAMRST_CNTRL_PCH
R533 *0_4
25 DRAMRST_CNTRL_EC
Processor Input. R458
200/F_4
C618
1
eDP_COMPIO and ICOMPO signals should be shorted PM_DRAM_PWRGD R460 130/F_4 PM_DRAM_PWRGD_R 0.047U/10V_4
near balls and routed with typical impedance <25 mohms
6 PM_DRAM_PWRGD
CPU_DRAMRST# Processor pull-up (CPU)
R461
+1.05V
R407 24.9/F_4 eDP_COMP
+1.05V
3
*39_4 PV modify on 5/24
R444 H_PROCHOT# R374 62_4
R459 4.99K/F_4
R396 24.9/F_4 PEG_COMP *3K/F_4 2 XDP_TDO R384 51_4
+1.05V MAIN_ONG 4,36
XDP_TMS R387 51_4
Q33
1 *2N7002K XDP_TDI_R R383 51_4
R405 *10K/F_4 INT_eDP_HPD_Q
+1.05V
XDP_PREQ# R388 *51_4
XDP_BPM6 XDP_TCLK R386 51_4
TP8
TP26
Connect a Test Point on
A
BPM# 6 signal, very close XDP_TRST# R385 51_4 A
For iFDIM to processor.