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A B C D E
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Compal confidential
Schematics Document
2
Mobile Penryn uFCPGA with Intel 2
Cantiga_PM+ICH9-M core logic
2009-02-13
www.rosefix.com
REV : 1.0
3 3
4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/12/10 Deciphered Date 2008/12/10 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-4731P Rhett discrete 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, February 13, 2009 Sheet 1 of 51
A B C D E
A B C D E
Compal confidential Montevina Consumer Discrete
CK505 72QFN
VRAM DDR2
Thermal Sensor Clock Generator
1
128/512MB Mobile Penryn 1
EMC1402 SLG8SP553V
page 23,24
P17
uFCPGA-478 CPU
P6
500 MHz P6,7, 8
64bits Fan conn P6 H_A#(3..35)
Discrete FSB
H_D#(0..63) 667/800/1066 MHz 1.05V
vidia PEG X16 DDR2 SO-DIMM X2
DDR2 800 MHz 1.8V
10M-GE1-S BA K 0, 1, 2, 3 P15, 16
P20,21,22
Intel Cantiga MCH
Dual Channel
LVDS Panel FCBGA 1329
Interface P19
USB conn x3 P36
P9, 10, 11, 12, 13, 14
2
CRT 2
P18 USB2.0 X12
BT Conn
P36
Support V1.3 DMI X4 C-Link
HDMI P42
USB Camera
P19
PCI-E BUS*5 Azalia
SATA Master-1
Intel ICH9-M Finger print
P36
SATA Slave
Realtek Mini-Card*2 ew Card mBGA-676 5 in1 Slot
SATA Slave
WLA & WA CardReader P32
8111DL(Gbe) P25,26,27,28 P32
P30 P31 P31
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Audio CKT AMP & Audio Jack
Codec_IDT92HD75B TPA6047
P33 P35
RJ45/11 CO LPC BUS
P30
3 3
LED SATA HDD Connector
P29
P39
E E
KB926 (D2) SATA ODD Connector
P29
RTC CKT. P38
P26
e-SATA Connector
Int.KBD With 3'th USB P29
Touch Pad CO .
DC/DC Interface CKT. P39 P38
P41 SPI
CIR Conn
SPI ROM P35
25LF080A P37
4 Capsense switch Conn 4
P39
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/11/04 Deciphered Date 2008/11/04 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagram
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-4731P Rhett discrete 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, February 12, 2009 Sheet 2 of 51
A B C D E
A
X MEANS BOM Symbol Note :
Voltage Rails O MEANS ON OFF
NB SA00002JJ80 R1 FRU
: means Digital Ground
NB SA00002JJE0 R3
+5VS
+3VS SB SA00002JH50 R1 FRU
power +1.5VS
: means Analog Ground
plane
SB SA00002JHB0 R3
+0.9V
+B +5VALW +1.8V +VCCP
+CPU_CORE
@ : means just reserve , no build
+3VALW +2.5VS 45@ : means need be mounted when 45 level assy or rework stage.
+1.8VS
+NVVDD
DEBUG@ : means just reserve for debug.
State
+PCIE BATT @ : means need be mounted when 45 level assy or rework stage.
USB assignment:
CONN@ : means ME part
USB-0 Right side(with ESATA)
ESATA @ : means just reserve for ESATA USB-1 Left side
GS @ : means just reserve for G sensor USB-2 Left side
S0 O O O O USB-3 Dock
FP @ : means just reserve for Finger Print USB-4 Camera
S1 O O O O NewC@ : means just reserve for New card USB-5 WLAN
USB-6 Bluetooth
S3 O O O X Main@ : means just reserve for Main stream USB-7 Finger Printer
OPP@ : means just reserve for OPP USB-8 MiniCard(WWAN/TV)
S5 S4/AC O O X X USB-9 Express card
2MiniC@ : means just reserve for 2nd Mini card slot USB-10 X
S5 S4/ Battery only O X X X PA @ : means just reserve for PA USB-11 X
S5 S4/AC & Battery
don't exist X X X X PR @ : means just reserve for PR PCIe assignment:
1 1
PCIe-1 TV tuner/WWAN/Robeson
PCIe-2 X
PCIe-3 WLAN
SMBUS Control Table
www.rosefix.com
PCIe-4 GLAN (Marvell)
N10M
SERIAL Thermal PCIe-6 New Card
SOURCE INVERTER BATT EEPROM Sensor SODIMM CLK CHIP MINI CARD Sensor board Thermal N10M G-sensor
Sensor
SMB_EC_CK1
KB926 X V V X X X X V X X X
SMB_EC_DA1
SMB_EC_CK2
KB926 X X X V X X X X V V X
SMB_EC_DA2
ICH_SMBCLK
ICH9 X X X X V V V X X X V
ICH_SMBDATA
NB9M SMBUS Control Table
SOURCE LVDS CRT HDMI HDCP
DDC2_DATA I2C / SMBUS ADDRESSING
DDC2_CLK N10M
V X X X
3VDDCDA DEVICE HEX ADDRESS
N10M X V X X
3VDDCCL
DDR SO-DIMM 0 A0 10100000
HDMIDAT_VGA
N10M X X V X DDR SO-DIMM 1 A4 10100100
HDMICLK_VGA
CLOCK GENERATOR (EXT.) D2 11010010
HDCP_SDA
N10M X X X V
HDCP_SCL
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/11/04 Deciphered Date 2008/11/04 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
otes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-4731P Rhett discrete 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, February 12, 2009 Sheet 3 of 51
A
5 4 3 2 1
50mA
Finger printer
50mA
PC Camera
177mA
ICH9 25mA +3VS_DVDD
1A ALC268
D
+V_BATTERY Dock con D
300mA 35mA
LAN MDC 1.5
60mA 1A
+3VAUX_BT New card
1A
0.3A 20mA Mini card (WLAN)
INVPWR_B+ LVDS CON +3VALW_EC
10mA 278mA
AC VIN SPI ROM ICH9
1.7A 5.89A 5.39A
+3VALW +3VS 1.5A
2A 550mA +LCDVDD LVDS CON
B++ JMB385
250mA
+3VS_CK505
C
657mA ICH_VCC1_5 C
ICH9 390mA
0.3A 2.2A N10M (VGA)
+1.5VS 1.56A
ICH9
1A
Mini card (WWAN/WLAN)
35mA +VDDA
0.58A 1.3A
+5VALW +5VS IDT 9275B
B+
7A
10mA
www.rosefix.com
+5VAMP
360mA
N10M (VGA) 1.8A
ODD
B B
3.7 X 3=11.1V 3.7A 700mA
MCH SATA
DC BATT
1.9A 12.11A 8 A
B+++ +1.8V DDR2 800Mhz 4G x2
50mA
+0.9V
1.17A
ICH9
4.7A
1.26A
+VCCP MCH
2.3A
CPU
2A 10mA 34A/1.025V
CPU_B+ +VCC_CORE CPU
A A
2.725A
0.27A
+NVVDDP +NVVDD N10M (VGA)
2A/1.1V Security Classification Compal Secret Data
0.19A Title
Compal Electronics, Inc.
Issued Date 2008/11/04 Deciphered Date 2008/11/04
+1.1V_PCIE +PCIE N10M (VGA) Power delivery
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C LA-4731P Rhett discrete 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, February 12, 2009 Sheet 4 of 51
5 4 3 2 1
A
1
www.rosefix.com
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/11/04 Deciphered Date 2008/11/04 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power sequence
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-4731P Rhett discrete 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Date: Thursday, February 12, 2009 Sheet 5 of 51
5 4 3 2 1
Change value in 5/02 +VCCP
XDP_TDI R2 1 2 54.9_0402_1%
XDP_TMS R3 1 2 54.9_0402_1%
D D
XDP_TDO R4 1 2 54.9_0402_1%
XDP_TRST# R7 1 2 54.9_0402_1%
9 H_A#[3..16]
JCPU1A
H_A#3 J4 H1 H_ADS# XDP_TCK R8 1 2 54.9_0402_1%
A[3]# ADS# H_ADS# 9
H_A#4 L5 E2 H_BNR#
H_A#5 A[4]# BNR# H_BPRI# H_BNR# 9
L4 G5 H_BPRI# 9
H_A#6 A[5]# BPRI#
K5 This shall place near CPU
H_A#7 A[6]# H_DEFER#
M3 H5 H_DEFER# 9
H_A#8 A[7]# DEFER# H_DRDY#
N2 A[8]# DRDY# F21 H_DRDY# 9
H_A#9 J1 E1 H_DBSY#
H_A#10 A[9]# DBSY# H_DBSY# 9
N3
A[10]#
ADDR GROUP_0
H_A#11 P5 F1 H_BR0#
A[11]# BR0# H_BR0# 9
H_A#12 P2
H_A#13 A[12]# H_IERR# T1
L2 A[13]# IERR# D20
H_A#14 P4 B3 H_INIT# @
H_A#15 A[14]# INIT# H_INIT# 26
P1
H_A#16 A[15]# H_LOCK#
R1 H4 H_LOCK# 9
H_ADSTB#0 A[16]# LOCK#
M1
CONTROL
CONTROL
9 H_ADSTB#0 ADSTB[0]#
C1 H_RESET#
RESET# H_RESET# 9
H_REQ#0 K3 F3 H_RS#0
9 H_REQ#0 H_REQ#1 REQ[0]# RS[0]# H_RS#1 H_RS#0 9
9 H_REQ#1 H2 F4 H_RS#1 9
H_REQ#2 REQ[1]# RS[1]# H_RS#2
9 H_REQ#2 K2 G3 H_RS#2 9
H_REQ#3 REQ[2]# RS[2]# H_TRDY#
9 H_REQ#3 J3 G2 H_TRDY# 9
H_REQ#4 REQ[3]# TRDY#
9 H_REQ#4 L1 REQ[4]#
G6 H_HIT#
9 H_A#[17..35] H_A#17 HIT# H_HITM# H_HIT# 9
Y2 E4 H_HITM# 9
C H_A#18 A[17]# HITM# C
U5
H_A#19 A[18]#
R3 A[19]# BPM[0]# AD4
H_A#20 W6 AD3
H_A#21 A[20]# BPM[1]#
U4 AD1
H_A#22 A[21]# BPM[2]#
Y5 AC4
H_A#23 A[22]# BPM[3]#
U1 AC2
H_A#24 A[23]# PRDY#
R4 AC1
H_A#25 A[24]# PREQ# XDP_TCK +3VS
T5 AC5
H_A#26 A[25]# TCK XDP_TDI
T3 AA6
A[26]# TDI
ADDR GROUP_1
H_A#27 W2 AB3 XDP_TDO
H_A#28 A[27]# TDO XDP_TMS
W5 AB5
H_A#29 A[28]# TMS XDP_TRST#
Y4 AB6 1
H_A#30 A[29]# TRST# XDP_DBRESET#
U2 C20 XDP_DBRESET# 27
H_A#31 A[30]# DBR# C2
V4
XDP/ITP SIGNALS
XDP/ITP SIGNALS
H_A#32 A[31]# U1
W3
H_A#33 A[32]# 2
AA4 THERMAL
H_A#34 A[33]# H_PROCHOT# R13
AB2 1 2 56_0402_1%
H_A#35 A[34]# +VCCP SMB_EC_CK2
AA3 D21 1 8 SMB_EC_CK2 21,37
H_ADSTB#1 A[35]# PROCHOT# H_THERMDA_R R14 H_THERMDA